Patents by Inventor Kenya Kobayashi

Kenya Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9871131
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type on the first semiconductor region, a first electrode surrounded by the first semiconductor region and including a first electrode portion and a second electrode portion provided on the first electrode portion, and a first insulating section including first and second insulating portions. The second insulating portion is arranged side by side with the second electrode portion in a second direction perpendicular to a first direction from the first semiconductor region to the second semiconductor region. The first insulating portion is arranged side by side with the first electrode portion in the second direction. A length and a thickness of the first insulating portion in the first direction are greater than a length and a thickness of the second insulating portion in the first direction, respectively.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: January 16, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenya Kobayashi
  • Patent number: 9853023
    Abstract: A semiconductor package in an embodiment includes a semiconductor device which has a first semiconductor element, a second semiconductor element, and a common first electrode between the first and second semiconductor elements. A second electrode is electrically connected to the first semiconductor element. A third electrode extends through the second semiconductor element and electrically connects to the first electrode. A fourth electrode is electrically connected to the second semiconductor element. A first terminal of the package is electrically connected to the third electrode. A second terminal of the package is electrically connected to the second electrode and the fourth electrode. An insulating material surrounds the semiconductor device.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: December 26, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Akaike, Kenya Kobayashi, Yukie Nishikawa
  • Publication number: 20170263752
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type on the first semiconductor region, a first electrode surrounded by the first semiconductor region and including a first electrode portion and a second electrode portion provided on the first electrode portion, and a first insulating section including first and second insulating portions. The second insulating portion is arranged side by side with the second electrode portion in a second direction perpendicular to a first direction from the first semiconductor region to the second semiconductor region. The first insulating portion is arranged side by side with the first electrode portion in the second direction. A length and a thickness of the first insulating portion in the first direction are greater than a length and a thickness of the second insulating portion in the first direction, respectively.
    Type: Application
    Filed: August 30, 2016
    Publication date: September 14, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenya KOBAYASHI
  • Publication number: 20170263699
    Abstract: A semiconductor device includes a layer having first and second surfaces and a first type first region, a second type second region in the layer between the first region and first surface, a first type third region in the layer between the second region and first surface, first and second gate electrodes, wherein the second region is between the first and second gate electrodes, a first field plate electrode between the second surface and first gate electrode, a second field plate electrode between the second surface and second gate electrode, a first film, at least a portion between the first field plate electrode and first region, a second film at least a portion between the second field plate electrode and first region, and a second type fourth region in the first region between the first and second films. A portion of the first region is between second and fourth regions.
    Type: Application
    Filed: August 29, 2016
    Publication date: September 14, 2017
    Inventors: Kenya KOBAYASHI, Masatoshi ARAI
  • Patent number: 9716009
    Abstract: According to one embodiment, a semiconductor device includes: a first semiconductor region; a second semiconductor region selectively provided on the first semiconductor region; a third semiconductor region selectively provided on the second semiconductor region; a first electrode provided on the third semiconductor region and connected to the third semiconductor region; a second electrode electrically connected to the first semiconductor region; a third electrode provide via an insulating film on the first semiconductor region, the second semiconductor region, and the third semiconductor region; and a fourth electrode provided on the second electrode side of the third electrode, the fourth electrode being provided via the insulating film on the first semiconductor region. The insulating film has three or more regions between the fourth electrode and the first semiconductor region.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: July 25, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenya Kobayashi, Toshifumi Nishiguchi
  • Publication number: 20170117269
    Abstract: A semiconductor package in an embodiment includes a semiconductor device which has a first semiconductor element, a second semiconductor element, and a common first electrode between the first and second semiconductor elements. A second electrode is electrically connected to the first semiconductor element. A third electrode extends through the second semiconductor element and electrically connects to the first electrode. A fourth electrode is electrically connected to the second semiconductor element. A first terminal of the package is electrically connected to the third electrode. A second terminal of the package is electrically connected to the second electrode and the fourth electrode. An insulating material surrounds the semiconductor device.
    Type: Application
    Filed: January 3, 2017
    Publication date: April 27, 2017
    Inventors: Yasuhiko AKAIKE, Kenya KOBAYASHI, Yukie NISHIKAWA
  • Patent number: 9570439
    Abstract: A semiconductor device includes a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type, a first electrode, a third semiconductor region of the second conductive type, a fourth semiconductor region of the first conductive type, and a conductive portion. The second semiconductor region is provided on the first semiconductor region. The first electrode is provided on the second semiconductor region. The third semiconductor region is provided on the first electrode. The fourth semiconductor region is provided on the third semiconductor region. The conductive portion is surrounded by the third semiconductor region and an intervening insulation portion and is electrically connected to the first electrode.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 14, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Akaike, Kenya Kobayashi, Yukie Nishikawa
  • Patent number: 9536959
    Abstract: A semiconductor device includes first to third semiconductor regions, first to fourth electrodes and a first insulating film. The first insulating film is provided between the third electrode and the first semiconductor region, between the third electrode and the second semiconductor region, between the third electrode and the third semiconductor region, and between the fourth electrode and the first semiconductor region. The first insulating film has a first insulating region, a second insulating region and a third insulating region. A first width in the first insulating region is different from a second width in the second insulating region. The first insulating region and the second insulating region are arranged in the direction. A third width of the third insulating region is constant along the second direction.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: January 3, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenya Kobayashi
  • Patent number: 9525059
    Abstract: A semiconductor device includes a semiconductor layer that has a first surface and a second surface, a drift region of a first conductivity type in the semiconductor layer, a body region of a second conductivity type between the drift region and the first surface, a source region of first conductivity type, a first gate electrode, a second gate electrode with the body region interposed between the first gate electrode and the second gate electrode, first and second gate insulating films, a first field plate electrode between the second surface and the first gate electrode, a second field plate electrode between the second surface and the second gate electrode, a first region of the first conductivity type in the drift region, a second region between the first region and the body region, and a third region between the second region and the body region.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: December 20, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenya Kobayashi
  • Publication number: 20160268254
    Abstract: A semiconductor device includes a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type, a first electrode, a third semiconductor region of the second conductive type, a fourth semiconductor region of the first conductive type, and a conductive portion. The second semiconductor region is provided on the first semiconductor region. The first electrode is provided on the second semiconductor region. The third semiconductor region is provided on the first electrode. The fourth semiconductor region is provided on the third semiconductor region. The conductive portion is surrounded by the third semiconductor region and an intervening insulation portion and is electrically connected to the first electrode.
    Type: Application
    Filed: August 31, 2015
    Publication date: September 15, 2016
    Inventors: Yasuhiko AKAIKE, Kenya KOBAYASHI, Yukie Nishikawa
  • Publication number: 20160260808
    Abstract: According to one embodiment, a semiconductor device includes: a first semiconductor region; a second semiconductor region; a third semiconductor region; a first electrode; a second electrode; a third electrode; a fourth electrode provided on the first electrode side of the third electrode, and the fourth electrode extending in the second direction; and a first insulating film. The first insulating film is provided between the third electrode and the first semiconductor region, between the third electrode and the second semiconductor region, between the third electrode and the third semiconductor region, and between the fourth electrode and the first semiconductor region. The first insulating film has a first insulating region and a second insulating region. A first width in the first insulating region is different from a second width in the second insulating region. The first insulating region and the second insulating region are arranged in the second direction.
    Type: Application
    Filed: August 27, 2015
    Publication date: September 8, 2016
    Inventor: Kenya Kobayashi
  • Publication number: 20160093719
    Abstract: According to one embodiment, a semiconductor device includes: a first semiconductor region; a second semiconductor region selectively provided on the first semiconductor region; a third semiconductor region selectively provided on the second semiconductor region; a first electrode provided on the third semiconductor region and connected to the third semiconductor region; a second electrode electrically connected to the first semiconductor region; a third electrode provide via an insulating film on the first semiconductor region, the second semiconductor region, and the third semiconductor region; and a fourth electrode provided on the second electrode side of the third electrode, the fourth electrode being provided via the insulating film on the first semiconductor region. The insulating film has three or more regions between the fourth electrode and the first semiconductor region.
    Type: Application
    Filed: March 5, 2015
    Publication date: March 31, 2016
    Inventors: Kenya Kobayashi, Toshifumi Nishiguchi
  • Publication number: 20160079416
    Abstract: According to an embodiment, a semiconductor device includes first semiconductor layers and a second semiconductor layer disposed between adjacent first semiconductor layers. The first semiconductor layers have first end surfaces, and the second semiconductor layer has a second end surface between the adjacent first semiconductor layers. The device includes a first electrode facing each first end surface of the adjacent first semiconductor layers via an insulating film, a second electrode in contact with side surfaces of the adjacent first semiconductor layers and the second end surface, a first semiconductor region between the second electrode and the adjacent first semiconductor layers, and a second semiconductor region in the first semiconductor region between the second electrode and each of the adjacent first semiconductor layers. The first semiconductor region and the second semiconductor region face the first electrode via the insulating film, and electrically connected to the second electrode.
    Type: Application
    Filed: March 2, 2015
    Publication date: March 17, 2016
    Inventors: Koichi Sato, Kenya Kobayashi
  • Patent number: 8592896
    Abstract: A semiconductor device includes a semiconductor layer of a second conductive type, a first diffused region of a first conductive type formed in the semiconductor layer, a second diffused region of the second conductive type selectively formed in the first diffused region, a trench formed in the semiconductor layer, a gate electrode housed in the trench with a gate insulator intervening, a top surface of the gate electrode being lower than a top surface of the second diffused region, a first oxide film housed in the trench and formed over the gate electrode, a second oxide film housed in the trench and formed over the first oxide film, a third oxide film housed in the trench and formed over the second oxide film, and a source electrode formed over the third oxide film and electrically connecting to the first and second diffused regions.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: November 26, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshimitsu Murase, Kenya Kobayashi, Atsushi Kaneko, Hideo Yamamoto
  • Patent number: 8361865
    Abstract: A method of manufacturing a semiconductor device, includes forming a first trench and a second trench in a semiconductor region of a first conductivity type simultaneously, forming a gate insulating film and a gate electrode in the first trench, forming a channel region of a second conductivity type in the semiconductor region, forming a source region of the first conductivity type in the channel region, forming a diffusion region of the first conductivity type which has a higher concentration than that of the semiconductor region in a part of the semiconductor region located immediately under the second trench by implanting impurity ions of the first conductivity type through the second trench, and forming a drain electrode in a part of the second trench.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: January 29, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Kenya Kobayashi
  • Patent number: 8314460
    Abstract: A semiconductor apparatus according to the present invention includes a first semiconductor layer of a first conductive type, a low concentration base region of a second conductive type formed on the first semiconductor layer, a gate electrode formed in a trench with insulating film on an inner surface of the trench that is formed to reach the first semiconductor layer from a surface of the low concentration base region, a source region of the first conductive type formed, contacting the insulating film, on a surface of the low concentration base region, a first high concentration base region, a second high concentration base region provided below and separated from the first concentration base region, and a third high concentration base region of the second conductive type included inside the low concentration base region, provided below and separated from the second high concentration base region.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: November 20, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kinya Ohtani, Kenya Kobayashi
  • Patent number: 8310005
    Abstract: A semiconductor device includes a semiconductor layer, a first diffused region formed in the semiconductor layer, a second diffused region formed in the first diffused region, a trench formed in the semiconductor layer, a gate electrode disposed in the trench, a top surface of the gate electrode being lower than a top surface of the semiconductor layer and sagging downwards in a center thereof, a non-doped silicate glass film disposed in the trench and formed over the gate electrode, a top surface of the silicate glass film sagging downwards in a center thereof, an oxide film disposed in the trench and formed over the non-doped silicate glass film, a top surface of the oxide film sagging downwards in a center, and a source electrode formed over the semiconductor layer so that the source electrode contacts the first and second diffusion regions, and the oxide film at the top surface thereof.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshimitsu Murase, Kenya Kobayashi, Hideo Yamamoto, Atsushi Kaneko
  • Patent number: 8222690
    Abstract: A semiconductor apparatus includes a doped semiconductor layer formed on a semiconductor substrate of a first conductivity type and first and second gate trenches formed in the semiconductor layer, the second gate trench being separated from the first gate trench in a first direction. The doped semiconductor layer includes a low concentration base region of a second conductivity typed formed between the first and second gate trenches, a first source region of the first conductivity type, a second source region of the first conductivity type, a first high concentration base region of the second conductivity type, and a second high concentration base region of the second conductivity type formed so that the first and second high concentration base regions are separated by the low concentration base region, and the second high concentration base region is not below both of the first and second source regions.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: July 17, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kinya Ohtani, Kenya Kobayashi
  • Patent number: 8173508
    Abstract: A method (and resultant structure) includes forming a semiconductor layer having plural stripe-like trenches, forming a gate electrode buried partially in each of the plural trenches, and introducing an impurity into the semiconductor layer by ion implantation after forming the gate electrode. The gate electrode has a buried portion formed in each of the trenches and a protruding portion situating above the buried portion and having a width larger than that of the buried portion. The introducing the impurity includes introducing an impurity into the semiconductor layer below the protruding portion by oblique ion implantation.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: May 8, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Wataru Sumida, Kenya Kobayashi
  • Publication number: 20120043604
    Abstract: A semiconductor device includes a semiconductor layer, a first diffused region formed in the semiconductor layer, a second diffused region formed in the first diffused region, a trench formed in the semiconductor layer, a gate electrode disposed in the trench, a top surface of the gate electrode being lower than a top surface of the semiconductor layer and sagging downwards in a center thereof, a non-doped silicate glass film disposed in the trench and formed over the gate electrode, a top surface of the silicate glass film sagging downwards in a center thereof, an oxide film disposed in the trench and formed over the non-doped silicate glass film, a top surface of the oxide film sagging downwards in a center, and a source electrode formed over the semiconductor layer so that the source electrode contacts the first and second diffusion regions, and the oxide film at the top surface thereof.
    Type: Application
    Filed: October 28, 2011
    Publication date: February 23, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Yoshimitsu MURASE, Kenya KOBAYASHI, Hideo YAMAMOTO, Atsushi KANEKO