Patents by Inventor Kenzo Hatada

Kenzo Hatada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5115545
    Abstract: An apparatus for connecting a semiconductor device having multi-electrodes at small pitches to a wiring board in such a manner as to secure the alignment between the electrodes and the wiring patterns, the chips being secured to the wiring board with an insulating resin of a photo-setting nature. The apparatus eliminates the necessity of using heat or supersonic waves, thereby reducing equipment costs.
    Type: Grant
    Filed: March 20, 1990
    Date of Patent: May 26, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Fujimoto, Kenzo Hatada, Yoshinobu Takeshita, Kazuya Otani, Kimiaki Takeda
  • Patent number: 5089772
    Abstract: Tests of a semiconductor IC is conducted first by bringing a plurality of conductive pattern circuits formed on an insulator sheet into contact with a plurality of bump electrodes formed on a substrate of the semiconductor, second by connecting a plurality of signal transmission pattern circuits formed on a transmission circuit substrate with each conductive pattern circuit of the insulator sheet, and then by connecting the transmission circuit substrate with a body of the testing device. A probing test can be simplified since there is no need to manually adjust positions of conventional probe needles. Further, semiconductor ICs having a lot of bump electrodes can be test without being damaged.
    Type: Grant
    Filed: March 9, 1990
    Date of Patent: February 18, 1992
    Assignees: Matsushita Electric Industrial Co. Ltd., Martec Corporation
    Inventors: Kenzo Hatada, Takeshi Ishihara, Nobuaki Suzuki, Satowaka Kuroda
  • Patent number: 5089750
    Abstract: Lead connection in a structure is provided by leads disposed against electrodes of wiring board through resin, which resin is then stiffened by the application of light. Accordingly, an electrical and a mechanical connection of the leads and the electrodes is accomplished.
    Type: Grant
    Filed: February 13, 1989
    Date of Patent: February 18, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenzo Hatada, Koichi Nagao
  • Patent number: 5012969
    Abstract: A face-down connecting an electrode formed on a semiconductor device surface and an electrode on a circuit substrate using an insulating resin, is arranged such that after positioning the electrode of the circuit substrate and the electrode of the semiconductor device, they are pressed from the side of semiconductor device or circuit substrate, and, in this state, a light-stiffening insulating resin is applied to the side surface of the semiconductor device, and then the light-stiffening insulating resin is stiffened. Since the light-stiffening insulating resin is applied and injected between the semiconductor device and circuit substrate with the electrodes of the semiconductor device and circuit substrate pressed together, the light-stiffening insulating resin intervenes between the two electrodes, and the problems of failure of the electrical contact between the two electrodes or a high electrical connection resistance will be avoided.
    Type: Grant
    Filed: May 17, 1990
    Date of Patent: May 7, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenzo Hatada, Hiroaki Fujimoto
  • Patent number: 4996583
    Abstract: In a semiconductor device, an outer lead is divided into plural leads at an outer lead region connected to an inner lead which is connected to an electrode terminal of a semiconductor chip, a plurality of TAB packages on which the semiconductor chip has been packaged are stacked in plural layers, at least one of the plural divided leads every stacked layers is left and a predetermined number of the divided leads are cut out, and these stacked TAB packages are mounted on a circuit board.
    Type: Grant
    Filed: February 9, 1990
    Date of Patent: February 26, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kenzo Hatada
  • Patent number: 4959590
    Abstract: Lead connection in a structure is provided by leads disposed against electrodes of wiring board through resin, which resin is then stiffened by the application of light. Accordingly, an electrical and a mechanical connection of the leads and the electrondes is accomplished.
    Type: Grant
    Filed: December 18, 1986
    Date of Patent: September 25, 1990
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenzo Hatada, Koichi Nagao
  • Patent number: 4876221
    Abstract: Disclosed is a method for bonding one of the principal planes of a lead formed on a film or the like and an electrode formed on the face side of a semiconductor element, by way of metal bumps, wherein the electrode, metal bumps and lead are pressurized between a support for supporting the semiconductor element and a jig placed at the other principal plane side of the lead, and the semiconductor element is heated so that the temperature at the back side of the semiconductor element may be higher than that at the face side of the semiconductor element. According to this method, it is enough to heat the support at the semiconductor element side, and it is not necessary, as required in the prior art, to heat temperature, and the conventional problems such as fusion of lead to the boding tool are solved.
    Type: Grant
    Filed: May 3, 1988
    Date of Patent: October 24, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kenzo Hatada
  • Patent number: 4784972
    Abstract: Disclosed is a method for making beam leads with projections and for joining such beam leads to electrodes of a semiconductor device. On a substrate (10), beam leads (12) with projections (12A) are concurrently formed using a single process. Semiconductor device (16) is pressed to beam lead (2) to join electrode (14) to projection (12A). When the semiconductor device is lifted, beam leads which are joined into the device are removed from the substrate. The concurrent formation of the beam leads (12) and projections (12A) can be carried out by plating using a substrate (10) having either a projection (10A) or a region (24A) of different resistance.
    Type: Grant
    Filed: April 17, 1987
    Date of Patent: November 15, 1988
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventor: Kenzo Hatada
  • Patent number: 4766426
    Abstract: A display panel assembly has a display panel, a printed circuit board, a plurality of semiconductor devices, and a plurality of film carrier tapes. The display panel has a plurality of electrodes. The printed circuit board is mounted on the display panel. The semiconductor devices are disposed between the electrodes of the display panel and the printed circuit board. Each film carrier tape has an opening and first and second lead group which extend from the tape in two opposite directions. Each lead group has a plurality of leads. One end of each lead group projects from the tape, and other end of each lead group projects into the opening. Each semiconductor device is mounted on a tape and is pressed to contact the electrodes. The one end of the second lead group is connected to the printed circuit board.
    Type: Grant
    Filed: February 14, 1986
    Date of Patent: August 23, 1988
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenzo Hatada, Koji Matsunaga
  • Patent number: 4749120
    Abstract: Method of connecting a semiconductor device to a wiring board in which electrical connection of metal bumps of a semiconductor device and wiring pattern of a wiring board is accomplished by pressure application between the bumps and wiring pattern, and mechanical fixing of the semiconductor device on the wiring board is accomplished by stiffened resin by use of which resin, the semiconductor device is fixed to the wiring board. By such separation of electrical connection and mechanical fixing, reliability of both function may be improved.
    Type: Grant
    Filed: December 18, 1986
    Date of Patent: June 7, 1988
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kenzo Hatada
  • Patent number: 4693770
    Abstract: Disclosed is a method of realizing high-density and inexpensive semiconductor apparatus by joining the electrodes of two semiconductor devices. A metal bump formed on a substrate is transferred and joined onto the electrode of first semiconductor device, and electrode of second semiconductor device and the metal bump transferred and joined on the first semiconductor device are positioned, pressed and heated, thereby joining the two semiconductor devices together.
    Type: Grant
    Filed: June 24, 1986
    Date of Patent: September 15, 1987
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kenzo Hatada
  • Patent number: 4684974
    Abstract: A film carrier on which semiconductor devices are disposed and which is excised so as to have a predetermined size and has leads in at least two directions is placed on a connecting frame member which has a cushion material at one end and in which a circuit substrate is fixed to the other end. The lead at one end of the film carrier is disposed on the cushion material and the opposite surface of this lead contacts with a group of external lead-out electrodes of the flat device mounted on the cushion material. The lead at the other end of the film carrier is connected to the circuit substrate. A supporting frame member is fixed to the connecting frame member such that it comes into pressure contact with the opposite surfaces of the group of external lead-out electrodes of the flat device.
    Type: Grant
    Filed: November 13, 1985
    Date of Patent: August 4, 1987
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Koji Matsunaga, Kenzo Hatada
  • Patent number: 4494688
    Abstract: A method suitable for connecting a plurality of metal leads at the same time with electrodes of a semiconductor device. Metal leads are provided each of which has a metal bump bonded thereto. The metal of the metal bump is softer than that of the lead. Those metal leads are located above the semiconductor device so that the bumps are contacted with the electrodes and then the bumps are bonded to the electrodes by heating, whereby the metal leads are connected with the electrodes.
    Type: Grant
    Filed: March 11, 1982
    Date of Patent: January 22, 1985
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenzo Hatada, Isamu Kitahiro
  • Patent number: 4293637
    Abstract: Method of making metal electrode, characterized by having the steps of:forming double layers of metal on the principal face of the semiconductor substrate which has electrode pads contacting specified regions of the semiconductor substrate,forming a photosensitive film on the whole surface of the metal double layers,etching said photosensitive film in a manner to selectively form openings on areas above the electrode pads, thereby exposing parts of the double layers above the electrode pads,forming metal bumps on said exposed surfaces of said double layers,removing said photosensitive film while retaining narrow surrounding parts around said metal bumps, andetching said double layers of metal by utilizing said narrow surrounding parts as etching mask, thereby removing the parts of said double layers which is covered by said narrow surrounding parts.
    Type: Grant
    Filed: October 5, 1979
    Date of Patent: October 6, 1981
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenzo Hatada, Takao Kajiwara
  • Patent number: 4176518
    Abstract: The present invention is an electronic time indicating signal clock of a hand indication type. It has a time indicating signal generating function marking time by one or more electronic tones and a correction function in which the number of tones made for a set time may be easily corrected.
    Type: Grant
    Filed: July 8, 1977
    Date of Patent: December 4, 1979
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hakuhei Kawakami, Takeshi Ishihara, Kenzo Hatada
  • Patent number: 4098071
    Abstract: A time signal clock is equipped with a time indicating graduation, a dividing circuit for dividing a standard oscillation frequency, a drive for time indication provided with an electronic circuit for driving a pointer over the time indicating graduation by the signal from the dividing circuit, a time detecting device provided with a time detecting circuit for detecting a set time, a time signal electronic circuit receiving as its input signal the output signal from the time detecting device and a time signal device operated by the signal from the time signal electronic circuit.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: July 4, 1978
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hakuhei Kawakami, Kenzo Hatada, Takeshi Ishihara