Patents by Inventor Keun-hyuk Lee

Keun-hyuk Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7659559
    Abstract: Provided is a semiconductor package in which an adhesion force between an insulation metal substrate and a molding member is increased by removing a solder mask layer from the insulation metal substrate and a method of fabricating the semiconductor package. The semiconductor package includes an insulation metal substrate that includes a base member, an insulating layer disposed on the base member, and conductive patterns formed on the insulating layer. Semiconductor chips are arranged on the conductive patterns. Solder mask patterns are arranged on the conductive patterns to surround the semiconductor chips. Leads are electrically connected to the conductive patterns through wires. A sealing member is arranged on an upper surface and side surfaces of the substrate to cover portions of the leads, the wires, the semiconductor chips, and the solder mask patterns.
    Type: Grant
    Filed: November 4, 2008
    Date of Patent: February 9, 2010
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventor: Keun-hyuk Lee
  • Publication number: 20090184406
    Abstract: Provided is a semiconductor package in which an adhesion force between an insulation metal substrate and a molding member is increased by removing a solder mask layer from the insulation metal substrate and a method of fabricating the semiconductor package. The semiconductor package includes an insulation metal substrate that includes a base member, an insulating layer disposed on the base member, and conductive patterns formed on the insulating layer. Semiconductor chips are arranged on the conductive patterns. Solder mask patterns are arranged on the conductive patterns to surround the semiconductor chips. Leads are electrically connected to the conductive patterns through wires. A sealing member is arranged on an upper surface and side surfaces of the substrate to cover portions of the leads, the wires, the semiconductor chips, and the solder mask patterns.
    Type: Application
    Filed: November 4, 2008
    Publication date: July 23, 2009
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
    Inventor: Keun-hyuk Lee
  • Publication number: 20090179325
    Abstract: Provided is a semiconductor package, and in particular a semiconductor package which is capable of electrically connecting to the outside without a lead.
    Type: Application
    Filed: January 7, 2009
    Publication date: July 16, 2009
    Inventors: Sung-min Park, Keun-hyuk Lee, Seung-Won Lim
  • Publication number: 20090140369
    Abstract: Provided are a semiconductor power module package and a method of fabricating the same. The semiconductor power module package includes a substrate, semiconductor chips arranged on a top surface of the substrate, and a temperature sensor mounted on a top surface of at least one of the semiconductor chips. The semiconductor chips and the temperature sensor are electrically connected to each other through leads. A sealing material covers the top surface of the substrate, the semiconductor chips, and the temperature sensor except for portions of the leads and a bottom surface of the substrate. The temperature sensor may include a thermistor, and the thermistor may include first and second electrode terminals connected to corresponding leads of the leads. A first wiring pattern may be in contact with the first electrode terminal, and a second wiring pattern may be in contact with the second electrode terminal.
    Type: Application
    Filed: November 25, 2008
    Publication date: June 4, 2009
    Inventor: Keun-hyuk Lee
  • Publication number: 20090127691
    Abstract: Provided are semiconductor power module packages, which are structurally simplified by bonding electrodes onto substrates, and methods of fabricating the same. An exemplary package includes a substrate and semiconductor chips disposed on a top surface of the substrate. Electrodes are bonded to the top surface of the substrate and electrically coupled to the semiconductor chips. Parts of the semiconductor chips are electrically coupled to parts of the electrodes by interconnection lines. An encapsulation unit covers the semiconductor chips, the electrodes, and the interconnection lines and exposes at least top surfaces of the electrodes.
    Type: Application
    Filed: November 4, 2008
    Publication date: May 21, 2009
    Inventor: Keun-hyuk Lee
  • Publication number: 20080224285
    Abstract: Provided are a power module having a stacked flip-chip and a method of fabricating the power module. The power module includes a lead frame; a control device part including a control device chip; a power device part including a power device chip and being electrically connected to the lead frame; and an interconnecting substrate of which the control and power device parts are respectively disposed at upper and lower portions, and each of the control and power device chips may be attached to one of the lead frame and the interconnecting substrate using a flip-chip bonding method.
    Type: Application
    Filed: February 28, 2008
    Publication date: September 18, 2008
    Inventors: Seung-won Lim, O-Seob Jeon, Joon-seo Son, Keun-hyuk Lee, Yun-hwa Choi
  • Publication number: 20080203559
    Abstract: Provided are a power device package coupled to a heat sink using a bolt and a semiconductor package mold for fabricating the same. The power device package includes: a substrate; at least one power device mounted on the substrate; a mold member sealing the substrate and the power device; and at least one bushing member fixed to the mold member to provide a through hole for a bolt member for coupling a heat sink to the mold member.
    Type: Application
    Filed: January 29, 2008
    Publication date: August 28, 2008
    Inventors: Keun-hyuk Lee, Seung-won Lim, Sung-min Park
  • Publication number: 20080164588
    Abstract: Provided is a high power semiconductor package including: an insulation substrate having first and second surfaces opposite to each other; an interconnection patterns formed on the first surface of the insulation substrate, the interconnection patterns including a plurality of first dimples; a power control semiconductor chip mounted on the first surface of the insulation substrate, the power control semiconductor chip electrically connected with the interconnection patterns; and an encapsulation member encapsulating the insulation substrate, the interconnection patterns, and the power control semiconductor chip and exposing at least a portion of the second surface of the insulation substrate.
    Type: Application
    Filed: January 4, 2008
    Publication date: July 10, 2008
    Applicant: Fairchild Korea Semiconductor, Ltd.
    Inventors: Keun-hyuk Lee, Seung-won Lim, Sung-min Park, Taek-keun Lee
  • Publication number: 20080136015
    Abstract: A high power semiconductor package includes a substrate including a base metal layer, a base insulation layer formed on the base metal layer, and a plurality of conductive patterns formed on the base insulation layer. In one embodiment one or more high power semiconductor chips are mounted on the substrate, each including a plurality of bonding pads, one or more first package leads having end portions that are electrically connected to the corresponding conductive patterns, and a second lead having an end portion electrically which may be connected to either the base insulation layer or the base metal layer.
    Type: Application
    Filed: December 6, 2007
    Publication date: June 12, 2008
    Applicant: Fairchild Korea Semiconductor, Ltd.
    Inventors: Keun-hyuk Lee, Seung-won Lim
  • Publication number: 20070284947
    Abstract: Provided are a power system module allowing a user's requirements to be easily met, and having economic practicality and high integration, and a manufacturing method thereof. The power system module includes a plastic case, a molding type power module package, a control circuit board, and at least one external terminal. The plastic case defines a bottom and a side wall. The molding type power module package is fixed to the bottom of the plastic case and includes at least a power device therein. The control circuit board is fixed to the side wall of the plastic case, includes at least a control device mounted thereon which is electrically connected to the power module package. The external terminal protrudes to outside the plastic case and is electrically connected to the control circuit board.
    Type: Application
    Filed: April 5, 2007
    Publication date: December 13, 2007
    Applicant: Fairchild Korea Semiconductor, Ltd.
    Inventors: Keun-hyuk Lee, Seung-won Lim, Seung-han Paek, Sung-min Park
  • Publication number: 20070257351
    Abstract: A power module with low thermal resistance buffers the stress put on a substrate during a package molding operation to virtually always prevent a fault in the substrate of the module. The power module includes a substrate, a conductive adhesive layer formed on the substrate, a device layer comprising a support tab, a power device, and a passive device which are formed on the conductive adhesive layer, and a sealing material hermetically sealing the device layer. The support tab is buffers the stress applied by a support pin to the substrate, thereby virtually always preventing a ceramic layer included in the substrate from cracking or breaking. As a result, a reduction in the isolation breakdown voltage of the substrate is virtually always prevented and the failure of the entire power module is do to a reduction in the breakdown voltage of the substrate is virtually always prevented.
    Type: Application
    Filed: May 3, 2007
    Publication date: November 8, 2007
    Applicant: Fairchild Korea Semiconductor, Ltd.
    Inventors: Keun-hyuk Lee, O-seob Jeon, Seung-won Lim
  • Patent number: 6774465
    Abstract: A semiconductor power module in which a power circuit chip and a control circuit chip are integrated in a package, is provided. The semiconductor power module includes a case; a terminal inserted into the case, the terminal including portions protruding upward to the outside of the case, and portions exposed in the case; a first substrate to which the power circuit chip is attached, the first substrate attached to the case for encapsulating the bottom of the package; a second substrate to which the control circuit chip is attached, the second substrate being spaced from the first substrate at a predetermined interval in a perpendicular direction in the case; and a cover for covering the top of the case, and for encapsulating the top of the package.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: August 10, 2004
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Keun hyuk Lee, Ji-hwan Kim, Dae-woong Chung, O-seob Jeon
  • Patent number: 6710439
    Abstract: A power semiconductor module in which a main circuit terminal lead frame part and a control circuit lead frame part are bent toward a main circuit lead frame part, is provided. The power semiconductor module includes a main circuit part; a control circuit part and a control circuit terminal which are placed along a plane perpendicular to the main circuit part; a main circuit terminal placed along another plane perpendicular to the main circuit part, facing the control circuit part the control circuit terminal; a bonding wire; and a mold compound. Accordingly, it is possible to realize a light and compact intelligent power module that is simple to manufactured at a low cost.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: March 23, 2004
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Keun-hyuk Lee, Gi-Young Jeun, O-seob Jeon
  • Publication number: 20030085456
    Abstract: A semiconductor power module in which a power circuit chip and a control circuit chip are integrated in a package, is provided. The semiconductor power module includes a case; a terminal inserted into the case, the terminal including portions protruding upward to the outside of the case, and portions exposed in the case; a first substrate to which the power circuit chip is attached, the first substrate attached to the case for encapsulating the bottom of the package; a second substrate to which the control circuit chip is attached, the second substrate being spaced from the first substrate at a predetermined interval in a perpendicular direction in the case; and a cover for covering the top of the case, and for encapsulating the top of the package.
    Type: Application
    Filed: October 4, 2002
    Publication date: May 8, 2003
    Applicant: Fairchild Semiconductor Corporation
    Inventors: Keun hyuk Lee, Ji-hwan Kim, Dae-woong Chung, O-seob Jeon
  • Publication number: 20030067065
    Abstract: A power semiconductor module in which a main circuit terminal lead frame part and a control circuit lead frame part are bent toward a main circuit lead frame part, is provided. The power semiconductor module includes a main circuit part; a control circuit part and a control circuit terminal which are placed along a plane perpendicular to the main circuit part; a main circuit terminal placed along another plane perpendicular to the main circuit part, facing the control circuit part the control circuit terminal; a bonding wire; and a mold compound. Accordingly, it is possible to realize a light and compact intelligent power module that is simple to manufactured at a low cost.
    Type: Application
    Filed: September 12, 2002
    Publication date: April 10, 2003
    Applicant: Fairchild Korea Semiconductor Ltd.
    Inventors: Keun-hyuk Lee, Gi-Young Jeun, O-seob Jeon