Abstract: Provided are an interconnect structure and an electronic device including the interconnect structure. The interconnect structure includes a dielectric layer including at least one trench, a conductive wiring filling an inside of the at least one trench, and a cap layer on at least one surface of the conductive wiring. The cap layer includes nanocrystalline graphene. The nanocrystalline includes nano-sized crystals.

Abstract: Provided is a semiconductor device including graphene. The semiconductor device includes: a substrate including an insulator and a semiconductor; and a graphene layer configured to directly grow only on a surface of the semiconductor, wherein the semiconductor includes at least one of a group IV material and a group III-V compound.

Abstract: Provided are electronic devices and methods of manufacturing the same. An electronic device may include a substrate, a gate electrode on the substrate, a ferroelectric layer between the substrate and the gate electrode, and a carbon layer between the substrate and the ferroelectric layer. The carbon layer may have an sp2 bonding structure.

Abstract: A pellicle for a photomask, a reticle including the same, and an exposure apparatus for lithography are provided. The pellicle may include a pellicle membrane, and the pellicle membrane may include nanocrystalline graphene. The nanocrystalline graphene may have defects. The nanocrystalline graphene may include a plurality of nanoscale crystal grains, and the nanoscale crystal grains may include a two-dimensional (2D) carbon structure having an aromatic ring structure. The defects of the nanocrystalline graphene may include at least one of an sp3 carbon atom, an oxygen atom, a nitrogen atom, or a carbon vacancy.

Abstract: A method of forming nanocrystalline graphene by a plasma-enhanced chemical vapor deposition process is provided. The method of forming nanocrystalline graphene includes arranging a protective layer on a substrate and growing nanocrystalline graphene directly on the protective layer by using a plasma of a reaction gas. The reaction gas may include a mixed gas of a carbon source gas, an inert gas, and hydrogen gas.

Abstract: A semiconductor device includes a substrate and a graphene layer. The substrate includes an insulator and a semiconductor. The graphene layer is grown on a surface of the semiconductor. The semiconductor includes at least one of a group IV material and a group III-V compound. A method of manufacturing the semiconductor device is disclosed.

Abstract: A method of forming graphene includes providing, in a reaction chamber, a non-catalyst substrate at least partially including a material that does not catalyze growth of graphene, and directly growing graphene on a surface of the non-catalyst substrate based on injecting a reaction gas into the reaction chamber. The reaction gas includes a carbon source having an ionization energy equal to or less than about 10.6 eV in a plasma-enhanced chemical vapor deposition (PECVD) process.

Abstract: Example embodiments relate to a wiring structure, a method of forming the same, and an electronic device employing the same. The wiring structure includes a first conductive material layer and a nanocrystalline graphene layer on the first conductive material layer in direct contact with the metal layer.

Abstract: An interconnect structure may include a graphene-metal barrier on a substrate and a conductive layer on the graphene-metal barrier. The graphene-metal barrier may include a plurality of graphene layers and metal particles on grain boundaries of each graphene layer between the plurality of graphene layers. The metal particles may be formed at a ratio of 1 atom % to 10 atom % with respect to carbon of the plurality of graphene layers.

Abstract: Provided are a graphene structure and a method of forming the graphene structure. The graphene structure includes a substrate and graphene on a surface of the substrate. Here, a bonding region in which a material of the substrate and carbon of the graphene are covalently bonded is formed between the surface of the substrate and the graphene.

Abstract: Provided are an interconnect structure and an electronic device including the interconnect structure. The interconnect structure includes a dielectric layer including at least one trench, a conductive wiring filling an inside of the at least one trench, and a cap layer on at least one surface of the conductive wiring. The cap layer includes nanocrystalline graphene. The nanocrystalline includes nano-sized crystals.

Abstract: Provided are a method of pre-treating a substrate and a method of directly forming graphene by using the method of pre-treating the substrate. In the method of pre-treating the substrate in the method of directly forming graphene, according to an embodiment, the substrate is pre-treated by using a pre-treatment gas including at least a carbon source and hydrogen. The method of directly forming graphene includes a process of pre-treating a substrate and a process of directly growing graphene on the substrate that is pre-treated. The process of pre-treating the substrate is performed according to the method of pre-treating the substrate.

Abstract: A method of growing graphene includes forming a carbon monolayer on a substrate by injecting a first reaction gas into a reaction chamber, wherein the first reaction gas includes a first source including a component that is a carbon source and belongs to an electron withdrawing group, and injecting a second reaction gas including a second source into the reaction chamber, wherein the second source includes a functional group that forms a volatile structure by reacting with a component that belongs to an electron withdrawing group. Graphene may be directly grown on a surface of the substrate by repeatedly injecting the first reaction gas and the second reaction gas.

Abstract: A pellicle for a photomask, a reticle including the same, and an exposure apparatus for lithography are provided. The pellicle may include a pellicle membrane, and the pellicle membrane may include nanocrystalline graphene. The nanocrystalline graphene may have defects. The nanocrystalline graphene may include a plurality of nanoscale crystal grains, and the nanoscale crystal grains may include a two-dimensional (2D) carbon structure having an aromatic ring structure. The defects of the nanocrystalline graphene may include at least one of an sp3 carbon atom, an oxygen atom, a nitrogen atom, or a carbon vacancy.

Abstract: Provided is a method of forming graphene. The method of forming graphene includes treating a surface of a substrate placed in a reaction chamber with plasma while applying a bias to the substrate, and growing graphene on the surface of the substrate by plasma enhanced chemical vapor deposition (PECVD).

Abstract: Provided are electronic devices and methods of manufacturing the same. An electronic device may include a substrate, a gate electrode on the substrate, a ferroelectric layer between the substrate and the gate electrode, and a carbon layer between the substrate and the ferroelectric layer. The carbon layer may have an sp2 bonding structure.

Abstract: A method of forming nanocrystalline graphene by a plasma-enhanced chemical vapor deposition process is provided. The method of forming nanocrystalline graphene includes arranging a protective layer on a substrate and growing nanocrystalline graphene directly on the protective layer by using a plasma of a reaction gas. The reaction gas may include a mixed gas of a carbon source gas, an inert gas, and hydrogen gas.

Abstract: An interconnect structure and an electronic device including the interconnect structure are disclosed. The interconnect structure may include a metal interconnect having a bottom surface and two opposite side surfaces surrounded by a dielectric layer, a graphene layer on the metal interconnect, and a metal bonding layer providing interface adhesion between the metal interconnect and the graphene layer. The metal bonding layer includes a metal material.

Abstract: Provided are methods of directly growing a carbon material. The method may include a first operation and a second operation. The first operation may include adsorbing carbons onto a substrate by supplying the carbons to the substrate. The second operation may include removing unreacted carbon residues from the substrate after suspending the supplying the carbons of the first operation. The two operations may be repeated until a desired graphene is formed on the substrate. The substrate may be maintained at a temperature less than 700° C. In another embodiment, the method may include forming a carbon layer on a substrate, removing carbons that are not directly adsorbed to the substrate on the carbon layer, and repeating the two operations until desired graphene is formed on the substrate. The forming of the carbon layer includes supplying individual carbons onto the substrate by preparing the individual carbons.

Abstract: Provided are an interconnect structure and an electronic device including the interconnect structure. The interconnect structure includes a dielectric layer including at least one trench, a conductive wiring filling an inside of the at least one trench, and a cap layer on at least one surface of the conductive wiring. The cap layer includes nanocrystalline graphene. The nanocrystalline includes nano-sized crystals.