Patents by Inventor Keunwook SHIN

Keunwook SHIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10539868
    Abstract: A pellicle for a photomask, a reticle including the same, and an exposure apparatus for lithography are provided. The pellicle may include a pellicle membrane, and the pellicle membrane may include nanocrystalline graphene. The nanocrystalline graphene may have defects. The nanocrystalline graphene may include a plurality of nanoscale crystal grains, and the nanoscale crystal grains may include a two-dimensional (2D) carbon structure having an aromatic ring structure. The defects of the nanocrystalline graphene may include at least one of an sp3 carbon atom, an oxygen atom, a nitrogen atom, or a carbon vacancy.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: January 21, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyeonjin Shin, Hyunjae Song, Seongjun Park, Keunwook Shin, Changseok Lee
  • Publication number: 20190161351
    Abstract: Provided are nanocrystalline graphene and a method of forming the nanocrystalline graphene through a plasma enhanced chemical vapor deposition process. The nanocrystalline graphene may have a ratio of carbon having an sp2 bonding structure to total carbon within the range of about 50% to 99%. In addition, the nanocrystalline graphene may include crystals having a size of about 0.5 nm to about 100 nm.
    Type: Application
    Filed: November 7, 2018
    Publication date: May 30, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyunjae SONG, Keunwook SHIN, Hyeonjin SHIN, Changseok LEE, Changhyun KIM, Kyungeun BYUN, Seungwon LEE, Eunkyu LEE
  • Publication number: 20180350915
    Abstract: A semiconductor device includes a substrate and a graphene layer. The substrate includes an insulator and a semiconductor. The graphene layer is grown on a surface of the semiconductor. The semiconductor includes at least one of a group IV material and a group III-V compound. A method of manufacturing the semiconductor device is disclosed.
    Type: Application
    Filed: November 8, 2017
    Publication date: December 6, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Keunwook SHIN, Hyeonjin Shin, Yeonchoo Cho, Seunggeol Nam, Seongjun Park, Yunseong Lee
  • Patent number: 10134628
    Abstract: A multilayer structure includes a first material layer, a second material layer, and a diffusion barrier layer. The second material layer is connected to the first material layer. The second material layer is spaced apart from the first material layer. The diffusion barrier layer is between the first material layer and the second material layer. The diffusion barrier layer may include a two-dimensional (2D) material. The 2D material may be a non-graphene-based material, such as a metal chalcogenide-based material having a 2D crystal structure. The first material layer may be a semiconductor or an insulator, and the second material layer may be a conductor. At least a part of the multilayer structure may constitute an interconnection for an electronic device.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: November 20, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyunjae Song, Seunggeol Nam, Seongjun Park, Keunwook Shin, Hyeonjin Shin, Jaeho Lee, Changseok Lee, Yeonchoo Cho
  • Publication number: 20180149966
    Abstract: A pellicle for a photomask, a reticle including the same, and an exposure apparatus for lithography are provided. The pellicle may include a pellicle membrane, and the pellicle membrane may include nanocrystalline graphene. The nanocrystalline graphene may have defects. The nanocrystalline graphene may include a plurality of nanoscale crystal grains, and the nanoscale crystal grains may include a two-dimensional (2D) carbon structure having an aromatic ring structure. The defects of the nanocrystalline graphene may include at least one of an sp3 carbon atom, an oxygen atom, a nitrogen atom, or a carbon vacancy.
    Type: Application
    Filed: November 8, 2017
    Publication date: May 31, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyeonjin SHIN, Hyunjae SONG, Seongjun PARK, Keunwook SHIN, Changseok LEE
  • Patent number: 9905422
    Abstract: A 2D material hard mask includes hydrogen, oxygen, and a 2D material layer having a layered crystalline structure. The 2D material layer may be a material layer including one of a carbon structure (for example, a graphene sheet) and a non-carbon structure.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: February 27, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keunwook Shin, Minsu Seol, Hyeonjin Shin, Sangwon Kim, Seongjun Park
  • Patent number: 9761532
    Abstract: A hybrid interconnect structure includes a graphene layer between a non-metallic material layer and a metal layer, and a first interfacial bonding layer between the non-metallic material layer and the graphene layer, or the metal layer and the graphene layer. The graphene layer connects the non-metallic material layer and the metal layer, and the first bonding layer includes a metallic material.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: September 12, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keunwook Shin, Hyeonjin Shin, Changhyun Kim, Changseok Lee, Seongjun Park, Hyunjae Song
  • Patent number: 9721943
    Abstract: A wiring structure may include at least two conductive material layers and a two-dimensional layered material layer in an interface between the at least two conductive material layers. The two-dimensional layered material layer may include a grain expander layer which causes grain size of a conductive material layer which is on the two-dimensional layered material layer to be increased. Increased grain size may result in resistance of the second conductive material layer to be reduced. As a result, the total resistance of the wiring structure may be reduced. The two-dimensional layered material layer may contribute to reducing a total thickness of the wiring structure. Thus, a low-resistance and high-performance wiring structure without an increase in a thickness thereof may be implemented.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: August 1, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Changseok Lee, Keunwook Shin, Hyeonjin Shin, Seongjun Park, Hyunjae Song, Hyangsook Lee, Yeonchoo Cho
  • Publication number: 20170092592
    Abstract: A hybrid interconnect structure includes a graphene layer between a non-metallic material layer and a metal layer, and a first interfacial bonding layer between the non-metallic material layer and the graphene layer, or the metal layer and the graphene layer. The graphene layer connects the non-metallic material layer and the metal layer, and the first bonding layer includes a metallic material.
    Type: Application
    Filed: March 29, 2016
    Publication date: March 30, 2017
    Inventors: Keunwook SHIN, Hyeonjin SHIN, Changhyun KIM, Changseok LEE, Seongjun PARK, Hyunjae SONG
  • Publication number: 20170033003
    Abstract: A multilayer structure includes a first material layer, a second material layer, and a diffusion barrier layer. The second material layer is connected to the first material layer. The second material layer is spaced apart from the first material layer. The diffusion barrier layer is between the first material layer and the second material layer. The diffusion barrier layer may include a two-dimensional (2D) material. The 2D material may be a non-graphene-based material, such as a metal chalcogenide-based material having a 2D crystal structure. The first material layer may be a semiconductor or an insulator, and the second material layer may be a conductor. At least a part of the multilayer structure may constitute an interconnection for an electronic device.
    Type: Application
    Filed: June 3, 2016
    Publication date: February 2, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyunjae SONG, Seunggeol NAM, Seongjun PARK, Keunwook SHIN, Hyeonjin SHIN, Jaeho LEE, Changseok LEE, Yeonchoo CHO
  • Publication number: 20170025273
    Abstract: A 2D material hard mask includes hydrogen, oxygen, and a 2D material layer having a layered crystalline structure. The 2D material layer may be a material layer including one of a carbon structure (for example, a graphene sheet) and a non-carbon structure.
    Type: Application
    Filed: December 30, 2015
    Publication date: January 26, 2017
    Inventors: Keunwook SHIN, Minsu SEOL, Hyeonjin SHIN, Sangwon KIM, Seongjun PARK
  • Publication number: 20160351491
    Abstract: A wiring structure may include at least two conductive material layers and a two-dimensional layered material layer in an interface between the at least two conductive material layers. The two-dimensional layered material layer may include a grain expander layer which causes grain size of a conductive material layer which is on the two-dimensional layered material layer to be increased. Increased grain size may result in resistance of the second conductive material layer to be reduced. As a result, the total resistance of the wiring structure may be reduced. The two-dimensional layered material layer may contribute to reducing a total thickness of the wiring structure. Thus, a low-resistance and high-performance wiring structure without an increase in a thickness thereof may be implemented.
    Type: Application
    Filed: February 24, 2016
    Publication date: December 1, 2016
    Inventors: Changseok LEE, Keunwook SHIN, Hyeonjin SHIN, Seongjun PARK, Hyunjae SONG, Hyangsook LEE, Yeonchoo CHO
  • Publication number: 20150235959
    Abstract: Example embodiments relate to a wiring structure, a method of forming the same, and an electronic device employing the same. The wiring structure includes a first conductive material layer and a nanocrystalline graphene layer on the first conductive material layer in direct contact with the metal layer.
    Type: Application
    Filed: February 18, 2015
    Publication date: August 20, 2015
    Inventors: Changseok LEE, Hyeonjin SHIN, Seongjun PARK, Donghyun IM, Hyun PARK, Keunwook SHIN, Jongmyeong LEE, Hanjin LIM