Patents by Inventor Kevin C. Olson

Kevin C. Olson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7666945
    Abstract: The present invention is directed to a non-gelled, curable composition including at least one compound having a plurality of imide functional groups. The compound in particular contains a reaction product of at least one secondary monoamine and at least one maleimide, and is suitable for use in coatings and castings.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: February 23, 2010
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Kevin C. Olson, Gregory J. McCollum, Linda K. Anderson
  • Publication number: 20100012357
    Abstract: A circuit board includes an electrically conductive sheet having an insulative coating surrounding the conductive sheet, with a surface of the insulative coating around an edge of the conductive sheet having an arcuate or rounded shape. At least one electrical conductor is conformally deposited on at least the rounded insulative coating around the edge of the conductive sheet and defined via photolithographic and metallization techniques. Each electrical conductor on the insulative coating thereon around the edge of the conductive sheet conforms to the arcuate or rounded shape of the insulative coating and, therefore, has an arcuate or rounded shape.
    Type: Application
    Filed: August 27, 2009
    Publication date: January 21, 2010
    Inventors: Alan E. Wang, Kevin C. Olson
  • Publication number: 20090178838
    Abstract: A process for fabricating a circuit board includes: providing a substrate including a first electrically conductive core having a first insulating coating on a first side and a second insulating coating on a second side, forming an opening in the first and second insulating coatings and the first electrically conductive core, exposing an edge of the conductive core within the opening, and electrodepositing a third insulating material on the exposed edge of the first electrically conductive core. A circuit board fabricated using the process is also provided.
    Type: Application
    Filed: January 11, 2008
    Publication date: July 16, 2009
    Applicant: PPG Industries Ohio, Inc.
    Inventors: Alan E. Wang, Kevin C. Olson, Michael L. Pawlik
  • Publication number: 20090101274
    Abstract: A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.
    Type: Application
    Filed: December 29, 2008
    Publication date: April 23, 2009
    Inventors: Kevin C. Olson, Alan E. Wang, Peter Elenius, Thomas W. Goodman
  • Patent number: 7485812
    Abstract: A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.
    Type: Grant
    Filed: November 11, 2004
    Date of Patent: February 3, 2009
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Kevin C. Olson, Alan E. Wang, Peter Elenius, Thomas W. Goodman
  • Publication number: 20080305626
    Abstract: A method is provided comprising: coating an electrically conductive core with a first removable material, creating openings in the first removable material to expose portions of the electrically conductive core, plating a conductive material onto the exposed portions of the electrically conductive core, coating the conductive material with a second removable material, removing the first removable material, electrophoretically coating the electrically conductive core with a dielectric coating, and removing the second removable material.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 11, 2008
    Applicant: PPG INDUSTRIES OHIO, INC.
    Inventors: Kevin C. Olson, Alan E. Wang
  • Publication number: 20080302564
    Abstract: A substrate for an electronic device package includes an electrically conductive core shaped to define a cavity for receiving an electronic device, a first insulating layer positioned on a first side of the core, and a first contact positioned adjacent to a surface within the cavity. Method of fabricating the substrates is also provided.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 11, 2008
    Applicant: PPG INDUSTRIES OHIO, INC.
    Inventors: Kevin C. Olson, Thomas W. Goodman, Peter Elenius
  • Patent number: 7294683
    Abstract: The present invention is directed to a non-gelled, curable composition including at least one compound having a plurality of imide functional groups. The compound in particular contains a reaction product of at least one secondary monoamine and at least one maleimide, and is suitable for use in coatings and castings.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: November 13, 2007
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Kevin C. Olson, Gregory J. McCollum, Linda K. Anderson
  • Patent number: 7228623
    Abstract: Processes for fabricating a multi-layer circuit assembly and a multi-layer circuit assembly fabricated by such processes are provided. The process includes (a) providing a substrate at least one area of which comprises a plurality of vias, these area(s) having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the substrate to form a conformal coating thereon; and (c) applying a layer of metal to all surfaces of the substrate. Additional processing steps such as circuitization may be included.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: June 12, 2007
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Kevin C. Olson, Alan E. Wang
  • Patent number: 7159308
    Abstract: Provided is a method of forming a circuit board including (a) providing a first conductive sheet; (b) selectively removing one or more portions of the first conductive sheet to form a first panel having a first circuit board that is coupled to a disposable part of the first panel by at least one tab that extends from an edge of the first circuit board to an edge of the disposable part of the first panel; (c) applying an insulating coating to the first circuit board so that at least each edge of the first circuit board is covered thereby; and (d) separating the first circuit board from the disposable part in a manner whereupon at least part of the tab remains attached to the first circuit board and includes an exposed edge of the conductive sheet of the first circuit board. Circuit boards formed by the method are also provided.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: January 9, 2007
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Alan E. Wang, Kevin C. Olson, Thomas H. Di Stefano
  • Publication number: 20060141143
    Abstract: Provided is a method for preparing a circuit assembly. The method includes (a) applying a curable coating composition to a substrate, the curable coating composition formed from (i) one or more active hydrogen-containing resins, (ii) one or more polyester curing agents, and (iii) optionally, one or more transesterification catalysts; (b) curing the curable coating composition to form a coating on the substrate; and (c) applying a conductive layer to the surface of at least part of said cured composition. A circuit assembly prepared by the method also is provided.
    Type: Application
    Filed: November 16, 2005
    Publication date: June 29, 2006
    Inventors: Gregory J. McCollum, Thomas C. Moriarity, Kevin C. Olson, Michael G. Sandala
  • Patent number: 7002081
    Abstract: A circuit board layer 2 in accordance with the present invention includes a conductive sheet 4 sandwiched between an insulating top layer 10 and an insulating bottom layer 14. The top and bottom layers 10 and 14 and the conductive sheet 4 define the circuit board layer 2 having an edge that includes an edge 20 of the conductive sheet 4. An insulating edge layer 18 covers substantially all of the edge 20 of the conductive sheet 4.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: February 21, 2006
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Alan E. Wang, Kevin C. Olson, Thomas H. Di Stefano
  • Patent number: 7000313
    Abstract: Provided is a process for forming metallized vias in a substrate including the steps of (I) applying to an electroconductive substrate an electrodepositable coating composition onto all exposed surfaces of the substrate to form a conformal dielectric coating; (II) ablating a surface of the dielectric coating to expose a section of the substrate; (III) applying a layer of metal to all surfaces to form metallized vias in the substrate. Also disclosed are processes for fabricating a circuit assembly which include the application of an electrodoepositable coating composition onto exposed surfaces of the substrate/core to form a conformal dielectric coating thereon. The electrodepositable coating composition includes a resinous phase dispersed in an aqueous phase, where the resinous phase has a covalently bonded halogen content of at least 1 percent by weight. The dielectric coating derived therefrom has a low dielectric constant and low dielectric loss factor.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: February 21, 2006
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Gregory J. McCollum, Thomas C. Moriarity, Kevin C. Olson, Michael G. Sandala, Alan E. Wang, Steven R. Zawacky
  • Patent number: 6951707
    Abstract: Provided is a process for creating vias for a circuit assembly including the steps of (a) applying a curable coating composition to a substrate, some or all of which is electrically conductive, to form an uncured coating thereon; (b) applying a resist over the uncured coating; (c) imaging the resist in predetermined locations; (d) developing the resist to expose predetermined areas of the uncured coating; (e) removing the exposed areas of the uncured coating; and (f heating the coated substrate of step (e) to a temperature and for a time sufficient to cure the coating. Also disclosed is a process of fabricating a circuit assembly.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: October 4, 2005
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Alan E. Wang, Kevin C. Olson
  • Patent number: 6844504
    Abstract: A circuit board layer 2 in accordance with the present invention includes a conductive sheet 4 sandwiched between an insulating top layer 10 and an insulating bottom layer 14. The top and bottom layers 10 and 14 and the conductive sheet 4 define the circuit board layer 2 having an edge that includes an edge 20 of the conductive sheet 4. An insulating edge layer 18 covers substantially all of the edge 20 of the conductive sheet 4.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: January 18, 2005
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Alan E. Wang, Kevin C. Olson, Thomas H. Di Stefano
  • Patent number: 6824959
    Abstract: Provided is a process for creating a via through a substrate including the steps of (a) providing a substantially void-free film of a curable composition; (b) applying a resist onto the curable film; (c) imaging the resist in predetermined locations; (d) developing the resist to expose predetermined areas of the curable film; (e) removing the exposed areas of the curable film to form holes through the curable film; and (f) heating the curable film of step (e) to a temperature and for a time sufficient to cure the curable composition. Also disclosed is a process of fabricating a circuit assembly which includes building patterned circuit layers upon a substrate that has vias provided by the aformentioned process.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: November 30, 2004
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Kevin C. Olson, Alan E. Wang
  • Patent number: 6713587
    Abstract: The present invention relates to an electrodepositable coating composition having a resinous phase dispersed in an aqueous medium. The resinous phase includes (a) an ungelled, active hydrogen-containing, ionic salt group-containing resin; and (b) a curing agent reactive with the active hydrogens of the resin (a). The resinous phase has a covalently bonded halogen content based on total weight of resin solids present in the resinous phase such that when the composition is electrodeposited and cured, the cured film passes flame resistance testing in accordance with IPC-TM-650, and has a dielectric constant of less than or equal to 3.50. The invention also is directed to a method for forming a dielectric coating on an electroconductive substrate using the electrodepositable coating composition, as well as to a substrate coated with the electrodepositable composition.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: March 30, 2004
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Gregory J. McCollum, Thomas C. Moriarity, Kevin C. Olson, Michael G. Sandala, Alan E. Wang, Craig A. Wilson, Steven R. Zawacky
  • Publication number: 20040044117
    Abstract: A composition for coating food cans is disclosed. The composition comprises a polyester, an acrylic copolymer and a crosslinker; the polyester and acrylic copolymer have been compatibilized in some way, such as through graft copolymerization. Methods for compatibilizing acrylics and polyesters are also disclosed as are methods for coating cans using compositions comprising acrylic and polyesters.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 4, 2004
    Inventors: Laura Kiefer-Liptak, John M. Dudik, Ronald R. Ambrose, Kevin C. Olson, Padmanabhan Sundararaman
  • Publication number: 20040003999
    Abstract: The present invention relates to an electrodepositable coating composition having a resinous phase dispersed in an aqueous medium. The resinous phase includes (a) an ungelled, active hydrogen-containing, ionic salt group-containing resin; and (b) a curing agent reactive with the active hydrogens of the resin (a). The resinous phase has a covalently bonded halogen content based on total weight of resin solids present in the resinous phase such that when the composition is electrodeposited and cured, the cured film passes flame resistance testing in accordance with IPC-TM-650, and has a dielectric constant of less than or equal to 3.50. The invention also is directed to a method for forming a dielectric coating on an electroconductive substrate using the electrodepositable coating composition, as well as to a substrate coated with the electrodepositable composition.
    Type: Application
    Filed: June 27, 2002
    Publication date: January 8, 2004
    Inventors: Gregory J. McCollum, Thomas C. Moriarity, Kevin C. Olson, Michael G. Sandala, Alan E. Wang, Craig A. Wilson, Steven R. Zawacky
  • Patent number: 6671950
    Abstract: A process for fabricating a multi-layer circuit assembly is provided comprising the following steps: (a) providing a perforate electrically conductive core having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the electrically conductive core to form a conformal coating on all exposed surfaces of the electrically conductive core; (c) ablating the surface of the dielectric coating in a predetermined pattern to expose sections of the electrically conductive core; (d) applying a layer of metal to all surfaces to form metallized vias through the electrically conductive core; and (e) applying a resinous photosensitive layer to the metal layer. Additional processing steps such as circuitization may be included.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: January 6, 2004
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Lance C. Sturni, Kevin C. Olson