Abstract: A circuit board layer 2 in accordance with the present invention includes a conductive sheet 4 sandwiched between an insulating top layer 10 and an insulating bottom layer 14. The top and bottom layers 10 and 14 and the conductive sheet 4 define the circuit board layer 2 having an edge that includes an edge 20 of the conductive sheet 4. An insulating edge layer 18 covers substantially all of the edge 20 of the conductive sheet 4.

Abstract: Provided is a process for forming metallized vias in a substrate including the steps of (I) applying to an electroconductive substrate an electrodepositable coating composition onto all exposed surfaces of the substrate to form a conformal dielectric coating; (II) ablating a surface of the dielectric coating to expose a section of the substrate; (III) applying a layer of metal to all surfaces to form metallized vias in the substrate. Also disclosed are processes for fabricating a circuit assembly which include the application of an electrodoepositable coating composition onto exposed surfaces of the substrate/core to form a conformal dielectric coating thereon. The electrodepositable coating composition includes a resinous phase dispersed in an aqueous phase, where the resinous phase has a covalently bonded halogen content of at least 1 percent by weight. The dielectric coating derived therefrom has a low dielectric constant and low dielectric loss factor.

Abstract: Provided is a process for creating a via through a substrate including the steps of (a) providing a substantially void-free film of a curable composition; (b) applying a resist onto the curable film; (c) imaging the resist in predetermined locations; (d) developing the resist to expose predetermined areas of the curable film; (e) removing the exposed areas of the curable film to form holes through the curable film; and (f) heating the curable film of step (e) to a temperature and for a time sufficient to cure the curable composition. Also disclosed is a process of fabricating a circuit assembly which includes building patterned circuit layers upon a substrate that has vias provided by the aformentioned process.

Abstract: Provided is a process for creating vias for a circuit assembly including the steps of (a) applying a curable coating composition to a substrate, some or all of which is electrically conductive, to form an uncured coating thereon; (b) applying a resist over the uncured coating; (c) imaging the resist in predetermined locations; (d) developing the resist to expose predetermined areas of the uncured coating; (e) removing the exposed areas of the uncured coating; and (f heating the coated substrate of step (e) to a temperature and for a time sufficient to cure the coating. Also disclosed is a process of fabricating a circuit assembly.

Abstract: Processes for fabricating a multi-layer circuit assembly and a multi-layer circuit assembly fabricated by such processes are provided. The process includes (a) providing a substrate at least one area of which comprises a plurality of vias, these area(s) having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the substrate to form a conformal coating thereon; and (c) applying a layer of metal to all surfaces of the substrate. Additional processing steps such as circuitization may be included.

Abstract: The present invention is directed to novel compounds that can serve as highly efficient initiators for controlled radical (co)polymerization processes including atom transfer radical (co)polymerization processes. These compounds include di-(trimethylolpropane)-tetra-(2-haloisobutyrate) compounds. The present invention also is directed to controlled radical (co)polymerization processes in which novel (co)polymers are prepared using the novel compounds, as well as to the novel (co)polymer products of the process.

Abstract: A process for fabricating a multi-layer circuit assembly is provided comprising the following steps:

Abstract: A process for fabricating a multi-layer circuit assembly is provided comprising the following steps:

Abstract: A process for fabricating a multi-layer circuit assembly is provided comprising the following steps:

Abstract: A pigment dispersion which includes a pigment, an aqueous carrier and a pigment dispersant. The pigment dispersant is prepared by controlled radical polymerization initiated in the presence of a monomeric initiator having at least two radically transferable groups. The pigment dispersant has at least one of the following polymer chain structures: &phgr;-[(G)p—(E)s—T]z and &phgr;-[(E)3—(G)p—T]z where G is a hydrophobic residue of at least one radically polymerizable ethylenically unsaturated monomer; E is a hydrophilic residue of at least one radically polymerizable ethylenically unsaturated monomer; &phgr; is a residue of or derived from the initiator, and is free of the radically transferable group; T is or is derived from the radically transferable group of the initiator; z is 2 to 10; p and s are at least one and are selected such that the pigment dispersant has a number average molecular weight of at least 500.