Abstract: Methods, systems, and computer readable media are disclosed for monitoring photovoltaic solar systems. In some examples, the system includes a solar power measurement input for coupling to a solar panel system, a measurement circuit configured to measure power produced by the solar panel system using the solar power measurement input, and a data transmission system. The measurement circuit is configured, by virtue of the measurement circuit including electrical components rated to at least a certain tolerance level, to take revenue-grade power measurements from the solar power measurement input with a level of accuracy that meets a national or international metering standard. The data transmission system is configured to transmit the revenue-grade power measurements from the measurement circuit to a remote system.

Abstract: Devices for reducing the open circuit voltages of solar systems are described. In one embodiment, a solar system includes a string of a plurality of solar modules having an open circuit voltage. The solar system also includes a device for reducing the open circuit voltage of the string of the plurality of solar modules during an open circuit configuration.

Abstract: A wire management device is disclosed. The device comprises a clip comprising an upper planar member and a lower planar member, each planar member having an inner and outer surface, wherein the inner surface of the upper planar member includes a post extending toward the inner surface of the lower planar member, a stem extending from the outer surface of the lower planar member, the stem including two outwardly-extending flanges, each of the first and second outwardly-extending flanges including an edge portion extending toward the outer surface of the lower planar member, and a transverse passage extending along the outer surface of the lower planar member, the transverse passage extending across the stem, wherein the stem has a recessed portion along the transverse passage.

Abstract: Devices for reducing the open circuit voltages of solar systems are described. In one embodiment, a solar system includes a string of a plurality of solar modules having an open circuit voltage. The solar system also includes a device for reducing the open circuit voltage of the string of the plurality of solar modules during an open circuit configuration.

Abstract: A wire management device is disclosed. The device comprises a clip comprising an upper planar member and a lower planar member, each planar member having an inner and outer surface, wherein the inner surface of the upper planar member includes a post extending toward the inner surface of the lower planar member, a stem extending from the outer surface of the lower planar member, the stem including two outwardly-extending flanges, each of the first and second outwardly-extending flanges including an edge portion extending toward the outer surface of the lower planar member, and a transverse passage extending along the outer surface of the lower planar member, the transverse passage extending across the stem, wherein the stem has a recessed portion along the transverse passage.

Abstract: An airgap interconnect structure with hood layer and methods for forming such an airgap interconnect structure are disclosed. A substrate having a dielectric layer with a plurality of interconnects formed therein is provided. Each interconnect is encapsulated by a barrier layer. A hardmask is formed on the dielectric layer and patterned to expose the dielectric layer between adjacent interconnects where an airgap is desired. The dielectric layer is etched to form a trench, wherein the etching process additionally etches at least a portion of the barrier layer to expose a portion of the side surface of each adjacent copper interconnect. A hood layer is electrolessly plated onto an exposed portion of the top surface and the exposed portion of the side surface to reseal the interconnect. A gap-sealing dielectric layer is formed over the device, sealing the trench to form an airgap.

Abstract: An airgap interconnect structure with hood layer and methods for forming such an airgap interconnect structure are disclosed. A substrate having a dielectric layer with a plurality of interconnects formed therein is provided. Each interconnect is encapsulated by a barrier layer. A hardmask is formed on the dielectric layer and patterned to expose the dielectric layer between adjacent interconnects where an airgap is desired. The dielectric layer is etched to form a trench, wherein the etching process additionally etches at least a portion of the barrier layer to expose a portion of the side surface of each adjacent copper interconnect. A hood layer is electrolessly plated onto an exposed portion of the top surface and the exposed portion of the side surface to reseal the interconnect. A gap-sealing dielectric layer is formed over the device, sealing the trench to form an airgap.

Abstract: Devices for reducing the open circuit voltages of solar systems are described. In one embodiment, a solar system includes a string of a plurality of solar modules having an open circuit voltage. The solar system also includes a device for reducing the open circuit voltage of the string of the plurality of solar modules during an open circuit configuration.

Abstract: A wire management device is disclosed. The device comprises a clip comprising an upper planar member and a lower planar member, each planar member having an inner and outer surface, wherein the inner surface of the upper planar member includes a post extending toward the inner surface of the lower planar member, a stem extending from the outer surface of the lower planar member, the stem including two outwardly-extending flanges, each of the first and second outwardly-extending flanges including an edge portion extending toward the outer surface of the lower planar member, and a transverse passage extending along the outer surface of the lower planar member, the transverse passage extending across the stem, wherein the stem has a recessed portion along the transverse passage.

Abstract: Embodiments of barriers to use in semiconductor devices are presented herein.

Abstract: Method and system for verifying and storing documents during a failure in a program module. Once a failure is detected in the program module, control passes to an exception handler that determines whether the open files have been modified. If so, a crash handler is executed, which verifies and stores the documents by detecting and repairing any discovered corruption. The program module is then terminated and restarted. Upon restarting the program module, the repaired document is opened and displayed to the user with a list of repairs.

Abstract: A barrier architecture is provided that includes different materials that are selected to be employed in connection with copper contact applications. Some of the barrier material is formed over trench contact sidewalls, and other different barrier material is formed over trench contact bottoms. By selecting the appropriate barrier materials, electromigration can be improved while, at the same time, interconnect and contact resistances can be kept low and array leakage can be mitigated.

Abstract: A barrier architecture is provided that includes different materials that are selected to be employed in connection with copper contact applications. Some of the barrier material is formed over trench contact sidewalls, and other different barrier material is formed over trench contact bottoms. By selecting the appropriate barrier materials, electromigration can be improved while, at the same time, interconnect and contact resistances can be kept low and array leakage can be mitigated.

Abstract: Embodiments of barriers to use in semiconductor devices are presented herein.

Abstract: A barrier architecture is provided that includes different materials that are selected to be employed in connection with copper contact applications. Some of the barrier material is formed over trench contact sidewalls, and other different barrier material is formed over trench contact bottoms. By selecting the appropriate barrier materials, electromigration can be improved while, at the same time, interconnect and contact resistances can be kept low and array leakage can be mitigated.

Abstract: A method is described of reducing the line to line capacitance within semiconductor devices and a device demonstrating the same. The device includes a spacer layer disposed between an etch stop material and a conductive layer. Separating the etch stop layer from the conductive layers by the spacer layer may decrease the line to line capacitance significantly in a semiconductor device.

Abstract: A method and apparatus are provided for displaying help content corresponding to the occurrence of an event occurring within a computer. An alert help data file is periodically downloaded at a client computer. When a program alert occurs within a client computer, the alert help data file is searched to identify help content corresponding to the particular occurrence of the alert. An alert identifier may be uniquely assigned to each alert to assist in locating the corresponding help content. Moreover, an assert tag and a function result value may also be utilized to define and locate particular help content. Once located, the help content may be displayed to a user.

Abstract: A method and system are provided for remotely controlling the reporting of events occurring within a computer. A remote control file identifying the events and conditions under which the events should be reported is periodically retrieved at a client computer. When an event occurs within a client computer, the remote control file is searched for data indicating that the event should be recorded. If data is located within the remote control file indicating that the event should be reported, data describing the event is collected. The collected data then may be subsequently reported. The remote control file may also include data identifying the type of data to be collected and a date and time after which data for a particular event should not be collected or reported.

Abstract: Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom. The sealing features improve encapsulation of the interconnect, which substantially reduces or prevents electromigration and/or diffusion of conductive material from the capped interconnect.

Abstract: A die is provided with an interconnect, and the grain structure of the interconnect is adapted to reduce electron scattering.