Patents by Inventor Kevin P. Fairbairn

Kevin P. Fairbairn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7479686
    Abstract: Backthinning in an area selective manner is applied to CMOS imaging sensors 12 for use in electron bombarded active pixel array devices. A further arrangement results in an array of collimators 51 aligned with pixels 42 or groups of pixels of an active pixel array providing improved image contrast of such image sensor. Provision of a thin P-doped layer 52 on the illuminated rear surface provides both a diffusion barrier resulting in improved resolution and a functional shield for reference pixels. A gradient in concentration of P-doped layer 52 optimizes electron collection at the pixel array.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: January 20, 2009
    Assignee: Intevac, Inc.
    Inventors: Kenneth A Costello, Kevin P. Fairbairn, David W. Brown, Yun Chung, Patricia Gober, Edward Yin
  • Publication number: 20080066678
    Abstract: There is described apparatus and methods for transporting and processing substrates including wafers as to efficiently produce at reasonable costs improved throughput as compared to systems in use today. A key element is the use of a transport chamber along the sides of processing chambers for feeding substrates into a controlled atmosphere through a load lock and then along a transport chamber as a way of reaching processing chambers and then out of the controlled atmosphere following processing in the processing chambers.
    Type: Application
    Filed: September 19, 2006
    Publication date: March 20, 2008
    Inventors: Terry Bluck, Kevin P. Fairbairn, Michael S. Barnes, Christopher T. Lane
  • Patent number: 7042060
    Abstract: Backthinning in an area selective manner is applied to imaging sensors 12 for use in electron bombarded devices. A further arrangement results in an array of collimators 51 aligned with pixels 42 or groups of pixels providing improved image contrast of such image sensor. Provision of a thin P-doped layer 52 on the illuminated rear surface provides both a diffusion barrier resulting in improved resolution and a functional shield for reference pixels. A gradient in concentration of P-doped layer 52 optimizes electron collection at the pixel array.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: May 9, 2006
    Assignee: Intevac, Inc.
    Inventors: Kenneth A Costello, Kevin P. Fairbairn, David W. Brown, Yun Chung, Patricia Gober, Edward Yin
  • Patent number: 7005637
    Abstract: Backthinning in an area selective manner is applied to imaging sensors 12 for use in electron bombarded devices. A further arrangement results in an array of collimators 51 aligned with pixels 42 or groups of pixels providing improved image contrast of such image sensor. Provision of a thin P-doped layer 52 on the illuminated rear surface provides both a diffusion barrier resulting in improved resolution and a functional shield for reference pixels. A gradient in concentration of P-doped layer 52 optimizes electron collection at the pixel array.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: February 28, 2006
    Assignee: Intevac, Inc.
    Inventors: Kenneth A Costello, Kevin P. Fairbairn, David W. Brown, Yun Chung, Patricia Gober, Edward Yin
  • Patent number: 6919001
    Abstract: There is described a disk processing and manufacturing equipment in which the processing chambers are stacked on top of each other and in which the disks move through the system on disk carriers which are adjustable to take disks of varying sizes. The disks enter the system through a load zone and are then installed into disk carriers. They move in the carriers sequentially through processing chambers at one level and then move to the other level in a lift or elevator. At this other level, the disks again move sequentially through the system on that level and then exit at an unload zone.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: July 19, 2005
    Assignee: Intevac, Inc.
    Inventors: Kevin P. Fairbairn, Terry Bluck, Craig Marion, Robert E. Weiss
  • Publication number: 20040245593
    Abstract: Backthinning in an area selective manner is applied to imaging sensors 12 for use in electron bombarded devices. A further arrangement results in an array of collimators 51 aligned with pixels 42 or groups of pixels providing improved image contrast of such image sensor. Provision of a thin P-doped layer 52 on the illuminated rear surface provides both a diffusion barrier resulting in improved resolution and a functional shield for reference pixels. A gradient in concentration of P-doped layer 52 optimizes electron collection at the pixel array.
    Type: Application
    Filed: July 15, 2004
    Publication date: December 9, 2004
    Inventors: Kenneth A. Costello, Kevin P. Fairbairn, David W. Brown, Yun Chung, Patricia Gober, Edward Yin
  • Publication number: 20040180462
    Abstract: Backthinning in an area selective manner is applied to imaging sensors 12 for use in electron bombarded devices. A further arrangement results in an array of collimators 51 aligned with pixels 42 or groups of pixels providing improved image contrast of such image sensor. Provision of a thin P-doped layer 52 on the illuminated rear surface provides both a diffusion barrier resulting in improved resolution and a functional shield for reference pixels. A gradient in concentration of P-doped layer 52 optimizes electron collection at the pixel array.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 16, 2004
    Applicant: INTEVAC, INC.
    Inventors: Kenneth A. Costello, Kevin P. Fairbairn, David W. Brown, Yun Chung, Patricia Gober, Edward Yin
  • Publication number: 20040169248
    Abstract: Backthinning in an area selective manner is applied to imaging sensors 12 for use in electron bombarded devices. A further arrangement results in an array of collimators 51 aligned with pixels 42 or groups of pixels providing improved image contrast of such image sensor. Provision of a thin P-doped layer 52 on the illuminated rear surface provides both a diffusion barrier resulting in improved resolution and a functional shield for reference pixels. A gradient in concentration of P-doped layer 52 optimizes electron collection at the pixel array.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 2, 2004
    Applicant: INTEVAC, INC.
    Inventors: Kenneth A. Costello, Kevin P. Fairbairn, David W. Brown, Yun Chung, Patricia Gober, Edward Yin
  • Publication number: 20030194877
    Abstract: A method is provided processing workpieces including etching metal from a workpiece to define metal structures on the workpiece and transporting the workpiece through a controlled environment passage between an etch chamber and a wet clean module after the etching. A wet cleaning and drying of the workpiece is performed in the wet clean module to remove metal etch residues from the workpiece. The workpiece is transported through the controlled environment passage to an annealing chamber after wet cleaning. An annealing is performed and the metal structures are capped before exposing the workpiece to ambient atmosphere after etching, wet cleaning, and annealing. The capping may be performed in situ with the annealing in a CVD chamber. The metal etch process may include performing a timed etch for etching back a portion of a metal layer followed by a slow to endpoint etch with an endpoint signal, followed by a timed over etch.
    Type: Application
    Filed: April 16, 2002
    Publication date: October 16, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Wai-Fan Yau, Kevin P. Fairbairn, Michael Barnes
  • Patent number: 6625497
    Abstract: A method and apparatus for processing a semiconductor wafer to reduce CD variation feeds back information gathered during inspection of the wafer to a previously visited processing tool and feeds forward information to adjust the next process the wafer will undergo. The inspection and processing are performed at a single processing module without exposing the wafer to ambient atmospheric conditions. Embodiments include removing a wafer from a wafer cassette, and measuring a dimension of a feature on the surface of the wafer, such as the feature's CD using an optical measuring tool. A process, such as an etch process, is then performed on the wafer using a set of process parameter values, such as an etch recipe, selected based on the CD measurement, and the wafer is returned to a cassette. The CD measurements are also linked to photolithography adjustable parameters such as stepper focus and exposure settings.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: September 23, 2003
    Assignee: Applied Materials Inc.
    Inventors: Kevin P. Fairbairn, Bo Su
  • Publication number: 20030159919
    Abstract: There is described a disk processing and manufacturing equipment in which the processing chambers are stacked on top of each other and in which the disks move through the system on disk carriers which are adjustable to take disks of varying sizes. The disks enter the system through a load zone and are then installed into disk carriers. They move in the carriers sequentially through processing chambers at one level and then move to the other level in a lift or elevator. At this other level, the disks again move sequentially through the system on that level and then exit at an unload zone.
    Type: Application
    Filed: February 10, 2003
    Publication date: August 28, 2003
    Inventors: Kevin P. Fairbairn, Terry Bluck, Craig Marion
  • Publication number: 20030106642
    Abstract: A method and apparatus for processing a semiconductor wafer to reduce CD variation feeds back information gathered during inspection of the wafer to a previously visited processing tool and feeds forward information to adjust the next process the wafer will undergo. The inspection and processing are performed at a single processing module without exposing the wafer to ambient atmospheric conditions. Embodiments include removing a wafer from a wafer cassette, and measuring a dimension of a feature on the surface of the wafer, such as the feature's CD using an optical measuring tool. A process, such as an etch process, is then performed on the wafer using a set of process parameter values, such as an etch recipe, selected based on the CD measurement, and the wafer is returned to a cassette. The CD measurements are also linked to photolithography adjustable parameters such as stepper focus and exposure settings.
    Type: Application
    Filed: November 25, 2002
    Publication date: June 12, 2003
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Kevin P. Fairbairn, Bo Su
  • Publication number: 20020155629
    Abstract: A method and apparatus for processing a semiconductor wafer to reduce CD variation feeds back information gathered during inspection of the wafer to a previously visited processing tool and feeds forward information to adjust the next process the wafer will undergo. The inspection and processing are performed at a single processing module without exposing the wafer to ambient atmospheric conditions. Embodiments include removing a wafer from a wafer cassette, and measuring a dimension of a feature on the surface of the wafer, such as the feature's CD using an optical measuring tool. A process, such as an etch process, is then performed on the wafer using a set of process parameter values, such as an etch recipe, selected based on the CD measurement, and the wafer is returned to a cassette. The CD measurements are also linked to photolithography adjustable parameters such as stepper focus and exposure settings.
    Type: Application
    Filed: July 10, 2001
    Publication date: October 24, 2002
    Inventors: Kevin P. Fairbairn, Bo Su