Patents by Inventor Kevin P. Martin

Kevin P. Martin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030206680
    Abstract: Devices having one or more of the following: an input/output (I/O) interconnect system, an optical I/O interconnect, an electrical I/O interconnect, a radio frequency I/O interconnect, are disclosed. A representative I/O interconnect system includes a first substrate and a second substrate. The first substrate includes a compliant pillar vertically extending from the first substrate. The compliant pillar is constructed a first material. The second substrate includes a compliant socket adapted to receive the compliant pillar. The compliant socket is constructed of a second material.
    Type: Application
    Filed: May 5, 2003
    Publication date: November 6, 2003
    Applicant: Georgia Tech Research Corporation
    Inventors: Muhannad S. Bakir, Kevin P. Martin, James D. Meindl
  • Publication number: 20030122229
    Abstract: Devices and methods of fabrication thereof are disclosed. A representative device includes a complaint wafer-level package having one or more lead packages. A representative lead package includes a substrate having a plurality of die pads disposed thereon and a plurality of leads attached to the plurality of die pads. In addition, the lead package includes a plurality of pillars made of a low modulus material. Each pillar is disposed between the substrate and at least one lead, and each lead is disposed upon one of the pillars that compliantly support the lead.
    Type: Application
    Filed: October 31, 2002
    Publication date: July 3, 2003
    Inventors: Muhannad S. Bakir, Kevin P. Martin, James D. Meindl, Chirag S. Patel
  • Publication number: 20020136481
    Abstract: Wafer-level electronic packages having waveguides and methods of fabricating chip-level electronic packages having waveguides are disclosed. A representative chip-level electronic package includes at least one waveguide having a waveguide core. In addition, another representative chip-level electronic package includes a waveguide having an air-gap cladding layer around a portion of the waveguide core. A representative method for fabricating a chip-level electronic package includes: providing a substrate having a passivation layer disposed on the substrate; disposing a waveguide core on a portion of the passivation layer; disposing a first sacrificial layer onto at least one portion of the passivation layer and the waveguide core; disposing an overcoat layer onto the passivation layer and the first sacrificial layer; and removing the first sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and around a portion of the waveguide core.
    Type: Application
    Filed: February 11, 2002
    Publication date: September 26, 2002
    Inventors: Tony Mule', Chirag Patel, James D. Meindl, Thomas K. Gaylord, Elias N. Glytsis, Kevin P. Martin, Stephen M. Schultz, Muhannad Bakir, Hollie Reed, Paul Kohl
  • Publication number: 20020127768
    Abstract: Devices and method of fabrication thereof are disclosed. A representative device includes one or more lead packages. The lead packages include a substrate including a plurality of die pads, an overcoat polymer layer, a plurality of sacrificial polymer layers disposed between the substrate and the overcoat polymer layer, and a plurality of leads. Each lead is disposed upon the overcoat polymer layer having a first portion disposed upon a die pad. The sacrificial polymer layer can be removed to form one or more air-gaps.
    Type: Application
    Filed: November 19, 2001
    Publication date: September 12, 2002
    Inventors: Muhannad S. Badir, Hollie Reed, Paul Kohl, Chirag S. Patel, Kevin P. Martin, James Meindl
  • Publication number: 20010030026
    Abstract: A method of low-damage, anisotropic etching of substrates including mounting the substrate upon a mechanical support located within an ac or dc plasma reactor. The mechanical support is independent of the plasma reactor generating apparatus and capable of being electrically biased. The substrate is subjected to a plasma of low-energy electrons and a species reactive with the substrate. An additional structure capable of being electrically biased can be placed within the plasma to control further the extraction or retardation of particles from the plasma.
    Type: Application
    Filed: May 15, 2001
    Publication date: October 18, 2001
    Inventors: Kevin P. Martin, Harry P. Gillis, Dmitri A. Choutov
  • Patent number: 6258287
    Abstract: A method of low-damage, anisotropic etching of substrates including mounting the substrate upon a mechanical support located within an ac or dc plasma reactor. The mechanical support is independent of the plasma reactor generating apparatus and capable of being electrically biased. The substrate is subjected to a plasma of low-energy electrons and a species reactive with the substrate. An additional structure capable of being electrically biased can be placed within the plasma to control further the extraction or retardation of particles from the plasma.
    Type: Grant
    Filed: September 17, 1997
    Date of Patent: July 10, 2001
    Assignee: Georgia Tech Research Corporation
    Inventors: Kevin P. Martin, Harry P. Gillis, Dmitri A. Choutov
  • Patent number: 6041952
    Abstract: Container apparatus for a liquid, such as a beverage, includes a generally cylindrical container element with a circumferentially extending and axially elongated recess with an insulative sleeve disposed in the recess. The insulative sleeve helps to maintain the desired temperature of the liquid within the container. The insulative jacket is preferably made of closed cell foam and it fits into the recess and is held in place therein by shoulders which extend outwardly from the recessed wall.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: March 28, 2000
    Assignee: Polar Peaks, LLC
    Inventor: Kevin P. Martin
  • Patent number: 6033587
    Abstract: A method of low-damage, anisotropic etching and cleaning of substrates including mounting the substrate upon a mechanical support located within the positive column of a plasma discharge generated by either an ac or dc plasma reactor. The mechanical support is independent of the plasma reactor generating apparatus and capable of being electrically biased. The substrate is subjected to the positive column, or electrically neutral portion, of a plasma of low-energy electrons and a species reactive with the substrate. An additional structure capable of being electrically biased can be placed within the plasma to control further the extraction or retardation of particles from the plasma.
    Type: Grant
    Filed: December 3, 1997
    Date of Patent: March 7, 2000
    Assignee: Georgia Tech Research Corporation
    Inventors: Kevin P. Martin, Harry P. Gillis, Dmitri A. Choutov
  • Patent number: 6027663
    Abstract: A method-of low-damage, anisotropic etching of substrates including mounting the substrate upon the anode in a DC plasma reactor and subjecting the substrate to a plasma of low-energy electrons and a species reactive with the substrate. An apparatus for conducting low-damage, anisotropic etching including a DC plasma reactor, a permeable wall hollow cold cathode, an anode, and means for mounting the substrate upon the anode.
    Type: Grant
    Filed: November 24, 1998
    Date of Patent: February 22, 2000
    Assignee: Georgia Tech Research Corporation
    Inventors: Kevin P. Martin, Harry P. Gillis, Dmitri A. Choutov
  • Patent number: 5917285
    Abstract: The present invention is a system and method for reducing the voltage necessary to produce a glow discharge in a gas. This is done by fabricating the cathode in a gas discharge device out of a conductive material that is permeable to the subject gas rather than out of a solid material, as in the prior art. Fabricating the cathode with a permeable material rather than a solid material increases the surface area of the cathode and provides the gas with greater access to the cathode's surface. Increasing the surface area of the cathode increases the total discharge current which can be extracted from the cathode without increasing the extraction voltage. This allows the gas discharge device to be operated at a lower voltage than is possible using a cathode fabricated of a solid material.
    Type: Grant
    Filed: July 23, 1997
    Date of Patent: June 29, 1999
    Assignee: Georgia Tech Research Corporation
    Inventors: Harry P. Gillis, Dmitri A. Choutov, Kevin P. Martin
  • Patent number: 5882538
    Abstract: A method of low-damage, anisotropic etching of substrates including mounting the substrate upon the anode in a DC plasma reactor and subjecting the substrate to a plasma of low-energy electrons and a species reactive with the substrate. An apparatus for conducting low-damage, anisotropic etching including a DC plasma reactor, a permeable wall hollow cold cathode, an anode, and means for mounting the substrate upon the anode.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: March 16, 1999
    Assignee: Georgia Tech Research Corporation
    Inventors: Kevin P. Martin, Harry P. Gillis, Dmitri A. Choutov
  • Patent number: 5465009
    Abstract: Novel processes and apparatus permit lift-off, alignment, and bonding of materials and devices. The processes involve first depositing a device layer on a sacrifical layer situated on a growth substrate. A device may be defined in the device layer. The device layer or the device is coated with a carrier layer. The sacrificial layer and/or the growth substrate are then etched away to release the combination of the device layer and the carrier layer from the growth substrate. The device layer or device can then be aligned and selectively bonded to a host substrate. Other processes and apparatus are set forth for facilitating lift-off, bonding, handling, and patterning of he device layer or device.
    Type: Grant
    Filed: February 15, 1994
    Date of Patent: November 7, 1995
    Assignee: Georgia Tech Research Corporation
    Inventors: Timothy J. Drabik, Kevin P. Martin, John Callahan
  • Patent number: D482621
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: November 25, 2003
    Inventor: Kevin P. Martin
  • Patent number: D403245
    Type: Grant
    Filed: March 12, 1998
    Date of Patent: December 29, 1998
    Inventor: Kevin P. Martin