Patents by Inventor Kheng-Chong Tan

Kheng-Chong Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130097362
    Abstract: A data writing method, a memory controller using the method, and a memory storage apparatus using the method are provided. The method includes selecting a physical block as a reserved physical block for a plurality of updated physical blocks. The method also includes, when a host system is about to write updated data into a logical page belonging to a logical block and a physical page, which corresponds to the logical page, of a substitute physical block, which corresponds to an updated physical block mapped to the logical block, has stored data, independently assigning the reserved physical block to the updated physical block mapped to the logical block and writing the updated data into the reserved physical block. Accordingly, the method can complete data writing without performing a data merge operation, thereby shortening the time for performing a write command.
    Type: Application
    Filed: December 14, 2011
    Publication date: April 18, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Kheng-Chong Tan, Lai-Hock Chua
  • Patent number: 8291155
    Abstract: A data access method for accessing a non-volatile memory module is provided. The data access method includes configuring a plurality of logical addresses and grouping the logical addresses into logical blocks to map to the physical blocks of the non-volatile memory module, and a host system formats the logical addresses into one partition by using a file system and the partition stores at least one file and a file description block corresponding to the file. The data access method further includes searching an end mark corresponding to entry values of the file description block, setting logical addresses storing the end mark as default pattern addresses, and setting values stored in the logical addresses as default values corresponding to the default pattern addresses. Accordingly, the data access method can divide one partition into a write protect area and a writable area by updating data stored in the default pattern addresses.
    Type: Grant
    Filed: May 4, 2010
    Date of Patent: October 16, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Ming-Fu Lai, Ying-Fu Chao, Kheng-Chong Tan
  • Publication number: 20120198131
    Abstract: A data writing method for writing data into physical blocks of a memory storage apparatus, and a memory controller and a memory storage apparatus using the same are provided, the physical blocks are grouped into a plurality of physical units. The method includes switching the speed mode of the memory storage apparatus into a first speed mode or a second speed mode according to a command and a work frequency received from a host system. The method also includes selecting a first writing mode to write the data into the physical units when the speed mode is the first speed mode. The method further includes selecting a second writing mode to write the data into the physical units when the speed mode is the second speed mode. Accordingly, the method can effectively shorten the time of executing a write command from the host system.
    Type: Application
    Filed: April 27, 2011
    Publication date: August 2, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Kheng-Chong Tan, Lai-Hock Chua
  • Publication number: 20120166740
    Abstract: A data writing method for a rewritable non-volatile memory module is provided. The method includes receiving at least one update data, wherein the update data belongs to at least one logical page of a first logical block, and the first logical block is mapped to a first physical block. The method also includes when a physical page of a second physical block that is corresponding to the logical page already stores data, selecting a third physical block from a free area, writing the update data into the third physical block, serving the third physical block as the child physical block of the first physical block, and executing an erasing operation on the second physical block, wherein the second physical block is currently a child physical block of the first physical block. Thereby, the method can effectively reduce the number of operations for merging data and increase the data writing speed.
    Type: Application
    Filed: April 1, 2011
    Publication date: June 28, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Kheng-Chong Tan, Lai-Hock Chua
  • Publication number: 20110231597
    Abstract: A data access method for accessing a non-volatile memory module is provided. The data access method includes configuring a plurality of logical addresses and grouping the logical addresses into logical blocks to map to the physical blocks of the non-volatile memory module, and a host system formats the logical addresses into one partition by using a file system and the partition stores at least one file and a file description block corresponding to the file. The data access method further includes searching an end mark corresponding to entry values of the file description block, setting logical addresses storing the end mark as default pattern addresses, and setting values stored in the logical addresses as default values corresponding to the default pattern addresses. Accordingly, the data access method can divide one partition into a write protect area and a writable area by updating data stored in the default pattern addresses.
    Type: Application
    Filed: May 4, 2010
    Publication date: September 22, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Ming-Fu Lai, Ying-Fu Chao, Kheng-Chong Tan
  • Publication number: 20110161565
    Abstract: A flash memory storage system having a flash memory controller and a flash memory chip is provided. The flash memory controller configures a second physical unit of the flash memory chip as a midway cache physical unit corresponding to a first physical unit and temporarily stores first data corresponding to a first host write command and second data corresponding to a second host write command in the midway cache physical unit, wherein the first and second data corresponding to slow physical addresses of the first physical unit. Then, the flash memory controller synchronously copies the first and second data from the midway cache physical unit into the first physical unit, thereby shortening time for writing data into the flash memory chip.
    Type: Application
    Filed: February 22, 2010
    Publication date: June 30, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Lai-Hock Chua, Kheng-Chong Tan
  • Publication number: 20100325344
    Abstract: A data writing method for writing data into a flash memory chip is provided, wherein the flash memory chip includes a plurality of physical units. The data writing method includes providing a flash memory control circuit and configuring a plurality of logical units, wherein each logical unit is mapped to at least one physical unit. The data writing method also includes configuring a plurality of logical addresses and mapping the logical addresses to the logical units, wherein at least one logical unit is mapped to at least two non-continuous logical addresses. The data writing method further includes writing the data from a host system into the corresponding physical units according to the logical units mapped to the logical addresses through the flash memory control circuit. Thereby, the data to be moved while writing data into the physical units is reduced, and accordingly the data writing speed is effectively increased.
    Type: Application
    Filed: August 17, 2009
    Publication date: December 23, 2010
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Kheng-Chong Tan