Abstract: A plurality of three-dimensional structure configuring devices, each including an elastic body in which micro three-dimensional structure elements fixed to a substrate member are placed so as to be covered therewith and which is fixed to the substrate member, are placed within a film-like elastic body with the substrate members thereof spaced apart from one another so as to configure a three-dimensional structure. Thereby, the plurality of three-dimensional structure configuring devices can be placed with desired intervals of arrangement and in desired positions within the film-like elastic body and so that various specifications can be addressed.

Abstract: An alignment system for aligning a wafer when lithographically fabricating LEDs having an LED wavelength ?LED is disclosed. The system includes the wafer. The wafer has a roughened alignment mark with a root-mean-square (RMS) surface roughness ?S. The system has a lens configured to superimpose an image of the reticle alignment mark with an image of the roughened alignment mark. The roughened alignment marked image is formed with alignment light having a wavelength ?A that is in the range from about 2?S to about 8?S. An image sensor detects the superimposed image. An image processing unit processes the detected superimposed image to measure an alignment offset between the wafer and the reticle.

Abstract: A method of aligning a wafer when lithographically fabricating a light-emitting diode (LED). The method includes forming on the wafer at least one roughened alignment mark having a root-mean-square (RMS) surface roughness ?S. The roughened alignment mark is formed as a consequence of forming a plasma etch to roughen a LED surface on which the wafer alignment mark resides. The method also includes imaging the at least one roughened wafer alignment mark with alignment light having a wavelength ?A that is in the range from about 2?S to about 8?S. The method also includes comparing the detected image to an alignment reference to establish wafer alignment. Once wafer alignment is established, p-contacts and n-contacts can be formed on the LED upper surface in their proper locations.

Abstract: A method of aligning a wafer when lithographically fabricating a light-emitting diode (LED). The method includes forming on the wafer at least one roughened alignment mark having a root-mean-square (RMS) surface roughness ?S. The roughened alignment mark is formed as a consequence of forming a plasma etch to roughen a LED surface on which the wafer alignment mark resides. The method also includes imaging the at least one roughened wafer alignment mark with alignment light having a wavelength ?A that is in the range from about 2 ?S to about 8 ?S. The method also includes comparing the detected image to an alignment reference to establish wafer alignment. Once wafer alignment is established, p-contacts and n-contacts can be formed on the LED upper surface in their proper locations.

Abstract: Method and apparatus for supporting and transferring a substrate in a semiconductor wafer processing system are provided. In one aspect, an apparatus is provided for supporting a substrate comprising a cover ring comprising a base having a bore disposed therethough, the base having an upper surface and one or more raised surfaces disposed adjacent the bore, wherein the raised surface comprise one or more first substrate support members disposed adjacent an edge of the bore and a capture ring disposed on the cover ring, the capture ring comprising a semi-circular annular ring having an inner perimeter corresponding to the bore of the cover ring and one or more second substrate support members disposed on the inner perimeter and adapted to receive a substrate, wherein the capture ring is adapted to mate with the cover ring and form one contiguous raised surface on the cover ring.

Abstract: A plurality of three-dimensional structure configuring devices, each including an elastic body in which micro three-dimensional structure elements fixed to a substrate member are placed so as to be covered therewith and which is fixed to the substrate member, are placed within a film-like elastic body with the substrate members thereof spaced apart from one another so as to configure a three-dimensional structure. Thereby, the plurality of three-dimensional structure configuring devices can be placed with desired intervals of arrangement and in desired positions within the film-like elastic body and so that various specifications can be addressed.

Abstract: The embodiments of the invention relate to a method and apparatus for measuring the etch depth in a semiconductor photomask processing system. In one embodiment, a method for etching a substrate includes etching a transparent substrate in an etch chamber coupled to a vacuum transfer chamber of a processing system, transferring the transparent substrate to a measurement cell coupled to the processing system, and measuring at least one of etch depth or critical dimension using a measurement tool in the measurement cell.

Abstract: A low-power, low-voltage feedback class AB operational amplifier is disclosed. The minimum supply voltage is one gate-source voltage and two saturation voltages. Currents on the output p-type and n-type transistors are monitored as part of the feedback loop control. Accurate monitoring is achieved by connecting current monitors directly to the corresponding voltage rail. Additional output stages may be selectively connected to the primary output stage to dynamically adjust to changes source conditions. Thus by connecting the appropriate number and type of additional output stages, continuous time adaptive power supply compensation is achieved. Both single ended and differential topologies are described.

Abstract: The present invention includes a xyloside for use in inducing synthesis of a glycosaminoglycan in a cell, the xyloside having a chemical structure of one of Formula (1), Formula (2), Formula (3), Formula (4), Formula (5), Formula (6), Formula (7), Formula (8), Formula (9), or Formula (10) as shown herein. Also, the present invention includes a method of making a xyloside for use in inducing synthesis of a glycosaminoglycan in a cell, wherein the method is performed with “Click” chemistry. Additionally, the present invention includes a method of administering a xyloside so as to induce synthesis of a glycosaminoglycan in a cell.

Abstract: A cross-coupled switched capacitor circuit that has two branches. During a first phase for the first branch, an input voltage is provided that causes charge to move through a resistor and to be placed onto a plate of the capacitor within the branch. An equivalent amount of charge is transferred to an output node. The output node may be a summing node of a sigma-delta modulator. The summing node is one of the inputs to an operational amplifier that is part of the integrator of the sigma-delta modulator. The resistor and the capacitor in the first branch define an RC circuit and corresponding RC time constant. During the first phase, the capacitor does not reach a fully settled voltage for a desired resolution. During the second phase, the capacitor in the first branch of the circuit is set to a defined voltage. The defined voltage may be the settling voltage had the capacitor been allowed to settle during the first phase.

Abstract: A low-power, low-voltage feedback class AB operational amplifier is disclosed. The minimum supply voltage is one gate-source voltage and two saturation voltages. Currents on the output p-type and n-type transistors are monitored as part of the feedback loop control. Accurate monitoring is achieved by connecting current monitors directly to the corresponding voltage rail. Additional output stages may be selectively connected to the primary output stage to dynamically adjust to changes source conditions. Thus by connecting the appropriate number and type of additional output stages, continuous time adaptive power supply compensation is achieved. Both single ended and differential topologies are described.

Abstract: A cross-coupled switched capacitor circuit that has two branches. During a first phase for the first branch, an input voltage is provided that causes charge to move through a resistor and to be placed onto a plate of the capacitor within the branch. An equivalent amount of charge is transferred to an output node. The output node may be a summing node of a sigma-delta modulator. The summing node is one of the inputs to an operational amplifier that is part of the integrator of the sigma-delta modulator. The resistor and the capacitor in the first branch define an RC circuit and corresponding RC time constant. During the first phase, the capacitor does not reach a fully settled voltage for a desired resolution. During the second phase, the capacitor in the first branch of the circuit is set to a defined voltage. The defined voltage may be the settling voltage had the capacitor been allowed to settle during the first phase.

Abstract: A digital to analog converter (DAC) includes a first continuous-time stage that receives an input signal associated with a digital signal and performs continuous-time digital-to-analog conversion operations on the input signal. The first continuous-time stage outputs a first output signal. A second switched-capacitor stage receives the first output signal and performs switched-capacitor filtering of the first output signal. The second switched-capacitor stage outputs a second output signal that is sent to a low pass filter to form a continuous analog signal associated with the digital signal.

Abstract: A digital to analog converter (DAC) includes a first continuous-time stage that receives an input signal associated with a digital signal and performs continuous-time digital-to-analog conversion operations on the input signal. The first continuous-time stage outputs a first output signal. A second switched-capacitor stage receives the first output signal and performs switched-capacitor filtering of the first output signal. The second switched-capacitor stage outputs a second output signal that is sent to a low pass filter to form a continuous analog signal associated with the digital signal.

Abstract: Systems and methods provide quantity availability information for inventory items via a user interface. The user customizes a quantity available definition, from which the system calculates quantity available for various inventory items and dynamically updates the calculation as a result of changes to inventory classes making up the definition. Using access points within inventory tracking software, the system displays quantity available information to the user via various display formats.

Abstract: An apparatus for integrating metrology and etch processing is disclosed. The apparatus comprises a multi-chamber system having a transfer chamber, an etch chamber and a metrology chamber, and a robot configured to transfer a substrate between the etch chamber and the metrology chamber. A method of processing a substrate and performing metrology measurement using this apparatus is also disclosed.

Abstract: A photomask etch chamber, which includes a substrate support member disposed inside the chamber. The substrate support member is configured to support a photomask substrate. The chamber further includes a ceiling disposed on the chamber and an endpoint detection system configured to detect a peripheral region of the photomask substrate.

Abstract: The embodiments of the invention relate to a method and apparatus for measuring the etch depth in a semiconductor photomask processing system. In one embodiment, a method for etching a substrate includes etching a transparent substrate in an etch chamber coupled to a vacuum transfer chamber of a processing system, transferring the transparent substrate to a measurement cell coupled to the processing system, and measuring at least one of etch depth or critical dimension using a measurement tool in the measurement cell.

Abstract: Method and apparatus for supporting and transferring a substrate in a semiconductor wafer processing system are provided. In one aspect, an apparatus is provided for supporting a substrate comprising a cover ring comprising a base having a bore disposed therethough, the base having an upper surface and one or more raised surfaces disposed adjacent the bore, wherein the raised surface comprise one or more first substrate support members disposed adjacent an edge of the bore and a capture ring disposed on the cover ring, the capture ring comprising a semi-circular annular ring having an inner perimeter corresponding to the bore of the cover ring and one or more second substrate support members disposed on the inner perimeter and adapted to receive a substrate, wherein the capture ring is adapted to mate with the cover ring and form one contiguous raised surface on the cover ring.

Abstract: Method and apparatus for supporting and transferring a substrate in a semiconductor wafer processing system are provided. In one aspect, an apparatus is provided for supporting a substrate comprising-a cover ring comprising a base having a bore disposed therethough, the base having an upper surface and one or more raised surfaces disposed adjacent the bore, wherein the raised surface comprise one or more first substrate support members disposed adjacent an edge of the bore and a capture ring disposed on the cover ring, the capture ring comprising a semi-circular annular ring having an inner perimeter corresponding to the bore of the cover ring and one or more second substrate support members disposed on the inner perimeter and adapted to receive a substrate, wherein the capture ring is adapted to mate with the cover ring and form one contiguous raised surface on the cover ring.