Patents by Inventor Khushali Shah

Khushali Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136984
    Abstract: Compact low noise amplifiers that have wide-band coverage while meeting necessary input matching and output matching characteristics. Embodiments include a wide-band, two-stage LNA with minimum degradation in performance compared to multiple narrow-band, single-stage LNAs. A generalized embodiment includes a first amplifier stage having a terminal coupled to a mutually coupled inductor circuit and to a second amplifier stage. The second amplifier stage includes a terminal coupled to the mutually coupled inductor circuit. The mutually coupled inductor circuit comprises electromagnetically coupled inductors L1, L2. Second terminals of the first and second amplifier stages are coupled to respective degeneration inductors. The electromagnetically coupled inductors L1, L2 of the inductor circuit substantially increase the output bandwidth of the LNA with minimum degradation in performance.
    Type: Application
    Filed: November 6, 2023
    Publication date: April 25, 2024
    Inventors: Rong Jiang, Khushali Shah
  • Patent number: 11923883
    Abstract: A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
    Type: Grant
    Filed: January 25, 2023
    Date of Patent: March 5, 2024
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah, Peter Bacon
  • Patent number: 11855640
    Abstract: Programmable clamping methods and devices providing adjustable clamping powers to accommodate different applications and requirements are disclosed. The described devices can use switchable clamping circuits having different structures, body-controlled clamping circuits, or clamping circuits adjusting their input power levels using programmable resistive ladders. Examples of how the disclosed devices can be combined to improve design flexibility are also provided.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: December 26, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Parvez Daruwalla, Khushali Shah
  • Publication number: 20230387863
    Abstract: Feedback methods and devices to reduce gain in RF amplifiers, more in particular LNAs, are disclosed. The described methods are based on providing feedback paths from the drain terminal of one of the LNA cascode transistors to the source terminal of the LNA input transistor, or from the gate terminal of the input transistor to the source terminal of the LNA input transistor. The disclosed methods can be combined with one another or with existing feedback methods to provide further flexibility and improved tradeoffs when designing LNAs for applications having different requirements.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Inventors: Parvez DARUWALLA, Rong JIANG, Khushali SHAH
  • Publication number: 20230387869
    Abstract: Circuits and methods for generating a bypass pulse to an RF circuit that increases the response time of the circuit to mode changes. Embodiments include a pulse generation circuit that it is self-initiated and self-terminated, generating a bypass pulse as a function of voltages V1 and V2 along a signal path. Voltage V3, a scaled version of V1, is compared to a voltage V4 derived from V2 and a pulse is output while V3>V4. The pulse temporarily lowers the signal path impedance, reducing the RC time constant of the signal path and allowing fast charging of components coupled to the signal path. The pulse may be used with any other circuit that needs a faster settling time after a mode change but is slowed down by an RC time constant. Usage also extends to providing for rapid discharge of the signal path by adding additional logic components.
    Type: Application
    Filed: April 26, 2023
    Publication date: November 30, 2023
    Inventors: Yucheng Tong, Ping Wing Lai, Khushali Shah
  • Patent number: 11817830
    Abstract: Compact low noise amplifiers that have wide-band coverage while meeting necessary input matching and output matching characteristics. Embodiments include a wide-band, two-stage LNA with minimum degradation in performance compared to multiple narrow-band, single-stage LNAs. A generalized embodiment includes a first amplifier stage having a terminal coupled to a mutually coupled inductor circuit and to a second amplifier stage. The second amplifier stage includes a terminal coupled to the mutually coupled inductor circuit. The mutually coupled inductor circuit comprises electromagnetically coupled inductors L1, L2. Second terminals of the first and second amplifier stages are coupled to respective degeneration inductors. The electromagnetically coupled inductors L1, L2 of the inductor circuit substantially increase the output bandwidth of the LNA with minimum degradation in performance.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: November 14, 2023
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah
  • Publication number: 20230291368
    Abstract: Methods and devices to implement efficiently an AUX terminal in RF front end receivers using LNAs are described. The described methods implement a smaller number of switches resulting in an overall performance improvement by reducing the noise figure at the input of the LNA. The presented devices can be used in low/high gain and bypass modes and can accommodate an arbitrary number of bands over a wide frequency range.
    Type: Application
    Filed: March 28, 2023
    Publication date: September 14, 2023
    Inventors: Rong JIANG, Khushali SHAH
  • Publication number: 20230291360
    Abstract: Circuits and methods for improving the noise figure (NF) of an amplifier, particularly an LNA, in high-gain modes while improving the IIP3 of the amplifier in low-gain modes. The source of an amplifier common-source FET is coupled to circuit ground thorough a degeneration circuit comprising a two-port inductor and a bypass switch coupled in parallel with the inductor. A switched feedback circuit is coupled between the gate of the common-source FET and a feedback node in the amplifier output signal path. During a low gain mode, the inductor is entirely bypassed and the enabled feedback circuit lowers the input impedance of the common-source FET and reduces the gain of the amplifier circuit, essentially eliminating the need for a degeneration inductor. During a high gain mode, the source of the common-source FET is coupled to circuit ground through the inductor and the feedback circuit is disabled. Other gain modes are supported.
    Type: Application
    Filed: March 16, 2023
    Publication date: September 14, 2023
    Inventors: Rong Jiang, Khushali Shah, Ravindranath D. Shrivastava, Parvez H. Daruwalla
  • Publication number: 20230283245
    Abstract: Circuit and methods using a single low-noise amplifier (LNA) to provide amplification for a wide band of RF frequencies while maintaining high gain and a low noise factor. Embodiments include an amplifier circuit including an input signal path for receiving a wideband RF signal; a switched inductor tuning block coupled to the input signal path and configured to selectively couple one of a plurality of inductances to the input signal path; and an amplifier coupled to the switched inductor tuning block and configured to receive the RF signal after passage through the selected coupled inductance. The switched inductor tuning block includes a plurality of selectable branches, each including an RF input switch; an RF output switch; an inductor coupled between the RF input switch and the RF output switch; and first and second shunt switches coupled between a respective terminal of the inductor and circuit ground.
    Type: Application
    Filed: March 7, 2023
    Publication date: September 7, 2023
    Inventors: Rong Jiang, Khushali Shah
  • Publication number: 20230238995
    Abstract: A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
    Type: Application
    Filed: January 25, 2023
    Publication date: July 27, 2023
    Inventors: Rong Jiang, Khushali Shah, Peter Bacon
  • Patent number: 11652450
    Abstract: Circuits and methods for generating a bypass pulse to an RF circuit that increases the response time of the circuit to mode changes. Embodiments include a pulse generation circuit that it is self-initiated and self-terminated, generating a bypass pulse as a function of voltages V1 and V2 along a signal path. Voltage V3, a scaled version of V1, is compared to a voltage V4 derived from V2 and a pulse is output while V3>V4. The pulse temporarily lowers the signal path impedance, reducing the RC time constant of the signal path and allowing fast charging of components coupled to the signal path. The pulse may be used with any other circuit that needs a faster settling time after a mode change but is slowed down by an RC time constant. Usage also extends to providing for rapid discharge of the signal path by adding additional logic components.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: May 16, 2023
    Assignee: pSemi Corporation
    Inventors: Yucheng Tong, Ping Wing Lai, Khushali Shah
  • Patent number: 11646703
    Abstract: Methods and devices to implement efficiently an AUX terminal in RF front end receivers using LNAs are described. The described methods implement a smaller number of switches resulting in an overall performance improvement by reducing the noise figure at the input of the LNA. The presented devices can be used in low/high gain and bypass modes and can accommodate an arbitrary number of bands over a wide frequency range.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: May 9, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Rong Jiang, Khushali Shah
  • Patent number: 11616475
    Abstract: Circuits and methods for improving the noise figure (NF) of an amplifier, particularly an LNA, in high-gain modes while improving the IIP3 of the amplifier in low-gain modes. The source of an amplifier common-source FET is coupled to circuit ground thorough a degeneration circuit comprising a two-port inductor and a bypass switch coupled in parallel with the inductor. A switched feedback circuit is coupled between the gate of the common-source FET and a feedback node in the amplifier output signal path. During a low gain mode, the inductor is entirely bypassed and the enabled feedback circuit lowers the input impedance of the common-source FET and reduces the gain of the amplifier circuit, essentially eliminating the need for a degeneration inductor. During a high gain mode, the source of the common-source FET is coupled to circuit ground through the inductor and the feedback circuit is disabled. Other gain modes are supported.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: March 28, 2023
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah, Ravindranath D. Shrivastava, Parvez Daruwalla
  • Publication number: 20230090460
    Abstract: Methods and devices to support multiple gain states in amplifiers are described. The methods and devices are based on implementing a feedback element in the amplifier and adjusting the impedance of the feedback element to provide a desired gain while maintaining the overall performance of the amplifier and reducing degradation of the S12 parameter. The feedback element includes an adjustable attenuator and a tunable resistive element. The adjustable attenuator is provided in a path that is common to the feedback path and the bypass path of the amplifier. Exemplary implementations of adjustable attenuators are also presented.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 23, 2023
    Inventors: Rong JIANG, Parvez DARUWALLA, Khushali SHAH
  • Patent number: 11569857
    Abstract: A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: January 31, 2023
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah, Peter Bacon
  • Publication number: 20230015675
    Abstract: Programmable clamping methods and devices providing adjustable clamping powers to accommodate different applications and requirements are disclosed. The described devices can use switchable clamping circuits having different structures, body-controlled clamping circuits, or clamping circuits adjusting their input power levels using programmable resistive ladders. Examples of how the disclosed devices can be combined to improve design flexibility are also provided.
    Type: Application
    Filed: July 19, 2021
    Publication date: January 19, 2023
    Inventors: Parvez DARUWALLA, Khushali SHAH
  • Patent number: 11539382
    Abstract: Methods and devices to support multiple frequency bands in radio frequency (RF) circuits are shown. The described methods and devices are based on adjusting the effective width of a transistor in such circuits by selectively disposing matching transistors in parallel with the transistor. The presented devices and methods can be used in RF circuits including low noise amplifiers (LNAs), RF receiver front-ends or any other RF circuits where input matching to wideband inputs is required.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: December 27, 2022
    Assignee: PSEMI CORPORATION
    Inventors: Parvez Daruwalla, Rong Jiang, Sung Kyu Han, Khushali Shah
  • Publication number: 20220360235
    Abstract: Compact low noise amplifiers that have wide-band coverage while meeting necessary input matching and output matching characteristics. Embodiments include a wide-band, two-stage LNA with minimum degradation in performance compared to multiple narrow-band, single-stage LNAs. A generalized embodiment includes a first amplifier stage having a terminal coupled to a mutually coupled inductor circuit and to a second amplifier stage. The second amplifier stage includes a terminal coupled to the mutually coupled inductor circuit. The mutually coupled inductor circuit comprises electromagnetically coupled inductors L1, L2. Second terminals of the first and second amplifier stages are coupled to respective degeneration inductors. The electromagnetically coupled inductors L1, L2 of the inductor circuit substantially increase the output bandwidth of the LNA with minimum degradation in performance.
    Type: Application
    Filed: May 24, 2022
    Publication date: November 10, 2022
    Inventors: Rong Jiang, Khushali Shah
  • Publication number: 20220278656
    Abstract: Methods and devices to implement efficiently an AUX terminal in RF front end receivers using LNAs are described. The described methods implement a smaller number of switches resulting in an overall performance improvement by reducing the noise figure at the input of the LNA. The presented devices can be used in low/high gain and bypass modes and can accommodate an arbitrary number of bands over a wide frequency range.
    Type: Application
    Filed: March 1, 2021
    Publication date: September 1, 2022
    Inventors: Rong JIANG, Khushali SHAH
  • Patent number: 11431301
    Abstract: Circuit and methods using a single low-noise amplifier (LNA) to provide amplification for a wide band of RF frequencies while maintaining high gain and a low noise factor. Embodiments include an amplifier circuit including an input signal path for receiving a wideband RF signal; a switched inductor tuning block coupled to the input signal path and configured to selectively couple one of a plurality of inductances to the input signal path; and an amplifier coupled to the switched inductor tuning block and configured to receive the RF signal after passage through the selected coupled inductance. The switched inductor tuning block includes a plurality of selectable branches, each including an RF input switch; an RF output switch; an inductor coupled between the RF input switch and the RF output switch; and first and second shunt switches coupled between a respective terminal of the inductor and circuit ground.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: August 30, 2022
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah