Patents by Inventor Ki-Chul Park

Ki-Chul Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050277407
    Abstract: A method and device for providing a mobile subscriber with access to non-subscriber mobile services via the use of a virtual mobile phone number is disclosed. In one embodiment, the method comprises i) receiving a mobile service request from a user terminal, ii) determining whether or not the user is a home subscriber, iii) requesting that a virtual mobile phone number be provided if the user is a non-subscriber, iv) receiving the virtual mobile phone number from the user terminal, v) providing a corresponding mobile service if the received virtual phone number is verified, and vi) charging for use of the mobile service based on the virtual mobile phone number.
    Type: Application
    Filed: August 17, 2005
    Publication date: December 15, 2005
    Applicant: KTFREETEL CO., LTD.
    Inventors: Tae-Hyo Ahn, Hoon-Bae Kim, Ki-Chul Park
  • Publication number: 20050153544
    Abstract: In a method of fabricating a semiconductor device by selectively forming a diffusion barrier layer, and a semiconductor device fabricated thereby, a conductive pattern and an insulating layer, which covers the conductive pattern, are formed on a semiconductor substrate. The insulating layer is patterned, thereby forming an opening for exposing at least a portion of the conductive pattern. Then, a diffusion barrier layer is formed on the semiconductor substrate having the opening, using a selective deposition technique. The diffusion barrier layer is formed to a thickness that is less on the exposed conductive pattern than the thickness of the diffusion barrier layer on the insulating layer exposed inside the opening. Then, the diffusion barrier layer is etched, thereby forming a recessed diffusion barrier layer. In this manner, metal atoms are prevented from being diffused from a metal plug filling the opening or a metal interconnect to the insulating layer.
    Type: Application
    Filed: January 11, 2005
    Publication date: July 14, 2005
    Inventors: Bong-Seok Suh, Ki-Chul Park, Seung-Man Choi, Il-Ryong Kim
  • Publication number: 20050087784
    Abstract: An image sensor device and method for forming the same include a photodiode formed in a substrate, at least one electrical interconnection line electrically associated with the photodiode, a light passageway having a light inlet, the light passageway being positioned in alignment with the photodiode, a color filter positioned over the light inlet of the light passageway and a lens positioned over the color filter in alignment with the light passageway wherein the at least one electrical interconnection line includes a copper interconnection formation having a plurality of interlayer dielectric layers in a stacked configuration with a diffusion barrier layer between adjacent interlayer dielectric layers, and a barrier metal layer between the copper interconnection formation and the plurality of interlayer dielectric layers and intervening diffusion barrier layers. An image sensor device may employ copper interconnections if a barrier metal layer is removed from above a photodiode.
    Type: Application
    Filed: November 30, 2004
    Publication date: April 28, 2005
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Soo-Genn Lee, Ki-Chul Park, Kyoung-Woo Lee
  • Publication number: 20050088551
    Abstract: An image sensor device and method for forming the same include a photodiode formed in a substrate, at least one electrical interconnection line electrically associated with the photodiode, a light passageway having a light inlet, the light passageway being positioned in alignment with the photodiode, a color filter positioned over the light inlet of the light passageway and a lens positioned over the color filter in alignment with the light passageway wherein the at least one electrical interconnection line includes a copper interconnection formation having a plurality of interlayer dielectric layers in a stacked configuration with a diffusion barrier layer between adjacent interlayer dielectric layers, and a barrier metal layer between the copper interconnection formation and the plurality of interlayer dielectric layers and intervening diffusion barrier layers. An image sensor device may employ copper interconnections if a barrier metal layer is removed from above a photodiode.
    Type: Application
    Filed: October 27, 2004
    Publication date: April 28, 2005
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Soo-Geun Lee, Ki-Chul Park, Kyoung-Woo Lee
  • Patent number: 6884710
    Abstract: A semiconductor device includes a lower copper line formed on a substrate, an interlayer insulating layer formed on the lower copper line, and an upper copper line formed on the interlayer insulating layer. A copper via contact extends through the interlayer insulating layer for electrically connecting the lower copper line and the upper copper line. A concave recess is formed within the lower copper line and is vertically aligned and arranged below the copper via contact. A patterned barrier layer is formed at a bottom portion of the concave recess, such that the lower copper line and the copper via contact are directly electrically connected at an interface along sides of the concave recess, without an intervening barrier layer.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: April 26, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Chul Park, Seung-Man Choi
  • Patent number: 6861686
    Abstract: An image sensor device and method for forming the same include a photodiode formed in a substrate, at least one electrical interconnection line electrically associated with the photodiode, a light passageway having a light inlet, the light passageway being positioned in alignment with the photodiode, a color filter positioned over the light inlet of the light passageway and a lens positioned over the color filter in alignment with the light passageway wherein the at least one electrical interconnection line includes a copper interconnection formation having a plurality of interlayer dielectric layers in a stacked configuration with a diffusion barrier layer between adjacent interlayer dielectric layers, and a barrier metal layer between the copper interconnection formation and the plurality of interlayer dielectric layers and intervening diffusion barrier layers. An image sensor device may employ copper interconnections if a barrier metal layer is removed from above a photodiode.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: March 1, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-Geun Lee, Ki-Chul Park, Kyoung-Woo Lee
  • Patent number: 6842028
    Abstract: In the present invention, an apparatus of testing a leakage protection reliability of an integrated circuit interconnection. The apparatus has at least one comb-like pattern, a serpentine-like pattern and means of applying a bias to the patterns and forms a maximum field region at an interconnection formed around a via, i.e., at the end of a tooth portion composing the comb-like pattern. In one structure of the present invention, the comb-like pattern is formed at one level, and the serpentine-like pattern has a plurality of unit parts corresponding to the tooth portions, respectively, and connection parts connecting the neighboring two unit parts. Each of the unit parts is formed at the same level with the comb-like pattern and spaced apart from the tooth portion by a minimum design length according to a design rule.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: January 11, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Sang Song, Jung-Woo Kim, Chang-Sub Lee, Sam-Young Kim, Young-Jin Wee, Ki-Chul Park
  • Publication number: 20040217013
    Abstract: The present invention relates to an apparatus and method for electropolishing a metal wire layer on a semiconductor device. To electropolish the metal wiring layer, a wafer is dipped into an electrolyte solution, and positive and negative voltages are applied to the wafer and electrodes, respectively. The electrodes include a main electrode and a plurality of auxiliary electrodes disposed above the main electrode. In a preferred embodiment, the plurality of auxiliary electrodes are mesh-type electrodes and are annular in shape and concentrically disposed, and thus the electrolyte solution can readily flow between them. Further, the metal wiring layer is preferably sequentially electropolished outwardly from the center of the wafer by sequentially applying negative voltages to the plurality of annular auxiliary electrodes. In this manner, a uniform electropolishing process is performed.
    Type: Application
    Filed: March 31, 2004
    Publication date: November 4, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sun-jung Lee, Ki-chul Park
  • Publication number: 20040189338
    Abstract: In the present invention, an apparatus of testing a leakage protection reliability of an integrated circuit interconnection. The apparatus has at least one comb-like pattern, a serpentine-like pattern and means of applying a bias to the patterns and forms a maximum field region at an interconnection formed around a via, i.e., at the end of a tooth portion composing the comb-like pattern. In one structure of the present invention, the comb-like pattern is formed at one level, and the serpentine-like pattern has a plurality of unit parts corresponding to the tooth portions, respectively, and connection parts connecting the neighboring two unit parts. Each of the unit parts is formed at the same level with the comb-like pattern and spaced apart from the tooth portion by a minimum design length according to a design rule.
    Type: Application
    Filed: January 27, 2004
    Publication date: September 30, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Won-Sang Song, Jung-Woo Kim, Chang-Sub Lee, Sam-Young Kim, Young-Jin Wee, Ki-Chul Park
  • Publication number: 20040140564
    Abstract: An image sensor device and method for forming the same include a photodiode formed in a substrate, at least one electrical interconnection line electrically associated with the photodiode, a light passageway having a light inlet, the light passageway being positioned in alignment with the photodiode, a color filter positioned over the light inlet of the light passageway and a lens positioned over the color filter in alignment with the light passageway wherein the at least one electrical interconnection line includes a copper interconnection formation having a plurality of interlayer dielectric layers in a stacked configuration with a diffusion barrier layer between adjacent interlayer dielectric layers, and a barrier metal layer between the copper interconnection formation and the plurality of interlayer dielectric layers and intervening diffusion barrier layers. An image sensor device may employ copper interconnections if a barrier metal layer is removed from above a photodiode.
    Type: Application
    Filed: August 5, 2003
    Publication date: July 22, 2004
    Inventors: Soo-Geun Lee, Ki-Chul Park, Kyoung-Woo Lee
  • Publication number: 20040135261
    Abstract: Provided are an interconnection of a semiconductor device which includes a capping layer and a method for forming the interconnection. The interconnection of the semiconductor device is a copper damascene interconnection where the capping layer is formed as a dual layer of a silicon nitride layer and silicon carbide layer on a copper layer processed by chemical mechanical polishing (CMP). Therefore, it is possible to maintain a high etching selectivity and a low dielectric constant of the silicon carbide layer while providing superior leakage suppression.
    Type: Application
    Filed: December 23, 2003
    Publication date: July 15, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-woo Lee, Soo-geun Lee, Ki-chul Park, Won-sang Song
  • Patent number: 6693446
    Abstract: In the present invention, an apparatus of testing leakage current protection reliability of an integrated circuit interconnection. The apparatus has at least one comb-like pattern composed of a length portion, multiple tooth portions which are connected orthogonally to the length portion, and vias which are formed vertically from the ends of the tooth portions, respectively, through an interlayer dielectric layer. Additionally the apparatus has a serpentine-like pattern including a length parallel part or a connection part which is running parallel to the length portion, a tooth parallel part which is parallel to the tooth portion and formed at a level different from the level of the connection part or the length parallel part, and vias connecting them. The via of the comb-like pattern is located at the central position between the neighboring two vias of the serpentine-like pattern.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: February 17, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Sang Song, Jung-Woo Kim, Chang-Sub Lee, Sam-Young Kim, Young-Jin Wee, Ki-Chul Park
  • Patent number: 6690187
    Abstract: In the present invention, an apparatus of testing a leakage protection reliability of an integrated circuit interconnection. The apparatus has at least one comb-like pattern, a serpentine-like pattern and means of applying a bias to the patterns and forms a maximum field region at an interconnection formed around a via, i.e., at the end of a tooth portion composing the comb-like pattern. In one structure of the present invention, the comb-like pattern is formed at one level, and the serpentine-like pattern has a plurality of unit parts corresponding to the tooth portions, respectively, and connection parts connecting the neighboring two unit parts. Each of the unit parts is formed at the same level with the comb-like pattern and spaced apart from the tooth portion by a minimum design length according to a design rule.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: February 10, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Sang Song, Jung-Woo Kim, Chang-Sub Lee, Sam-Young Kim, Young-Jin Wee, Ki-Chul Park
  • Publication number: 20030100181
    Abstract: A semiconductor device includes a lower copper line formed on a substrate, an interlayer insulating layer formed on the lower copper line, and an upper copper line formed on the interlayer insulating layer. A copper via contact extends through the interlayer insulating layer for electrically connecting the lower copper line and the upper copper line. A concave recess is formed within the lower copper line and is vertically aligned and arranged below the copper via contact. A patterned barrier layer is formed at a bottom portion of the concave recess, such that the lower copper line and the copper via contact are directly electrically connected at an interface along sides of the concave recess, without an intervening barrier layer.
    Type: Application
    Filed: January 9, 2003
    Publication date: May 29, 2003
    Inventors: Ki-Chul Park, Seung-Man Choi
  • Patent number: 6548905
    Abstract: A semiconductor device includes a lower copper line formed on a substrate, an interlayer insulating layer formed on the lower copper line, and an upper copper line formed on the interlayer insulating layer. A copper via contact extends through the interlayer insulating layer for electrically connecting the lower copper line and the upper copper line. A concave recess is formed within the lower copper line and is vertically aligned and arranged below the copper via contact. A patterned barrier layer is formed at a bottom portion of the concave recess, such that the lower copper line and the copper via contact are directly electrically connected at an interface along sides of the concave recess, without an intervening barrier layer.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: April 15, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Chul Park, Seung-Man Choi
  • Publication number: 20030020507
    Abstract: In the present invention, an apparatus of testing a leakage protection reliability of an integrated circuit interconnection. The apparatus has at least one comb-like pattern, a serpentine-like pattern and means of applying a bias to the patterns and forms a maximum field region at an interconnection formed around a via, i.e., at the end of a tooth portion composing the comb-like pattern. In one structure of the present invention, the comb-like pattern is formed at one level, and the serpentine-like pattern has a plurality of unit parts corresponding to the tooth portions, respectively, and connection parts connecting the neighboring two unit parts. Each of the unit parts is formed at the same level with the comb-like pattern and spaced apart from the tooth portion by a minimum design length according to a design rule.
    Type: Application
    Filed: April 1, 2002
    Publication date: January 30, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Won-Sang Song, Jung-Woo Kim, Chang-Sub Lee, Sam-Young Kim, Young-Jin Wee, Ki-Chul Park
  • Publication number: 20030020497
    Abstract: In the present invention, an apparatus of testing leakage current protection reliability of an integrated circuit interconnection. The apparatus has at least one comb-like pattern composed of a length portion, multiple tooth portions which are connected orthogonally to the length portion, and vias which are formed vertically from the ends of the tooth portions, respectively, through an interlayer dielectric layer. Additionally the apparatus has a serpentine-like pattern including a length parallel part or a connection part which is running parallel to the length portion, a tooth parallel part which is parallel to the tooth portion and formed at a level different from the level of the connection part or the length parallel part, and vias connecting them. The via of the comb-like pattern is located at the central position between the neighboring two vias of the serpentine-like pattern.
    Type: Application
    Filed: April 1, 2002
    Publication date: January 30, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Won-Sang Song, Jung-Woo Kim, Chang-Sub Lee, Sam-Young Kim, Young-Jin Wee, Ki-Chul Park
  • Publication number: 20020109234
    Abstract: A semiconductor device includes a lower copper line formed on a substrate, an interlayer insulating layer formed on the lower copper line, and an upper copper line formed on the interlayer insulating layer. A copper via contact extends through the interlayer insulating layer for electrically connecting the lower copper line and the upper copper line. A concave recess is formed within the lower copper line and is vertically aligned and arranged below the copper via contact. A patterned barrier layer is formed at a bottom portion of the concave recess, such that the lower copper line and the copper via contact are directly electrically connected at an interface along sides of the concave recess, without an intervening barrier layer.
    Type: Application
    Filed: February 7, 2002
    Publication date: August 15, 2002
    Inventors: Ki-Chul Park, Seung-Man Choi
  • Publication number: 20020041028
    Abstract: A method for forming a damascene interconnection. After forming an insulating layer on a semiconductor substrate, the insulating layer is patterned and etched to form an opening. A barrier layer is formed on an entire surface of a resulting structure where the opening is formed. A seed layer is formed on at least on a sidewall of the opening on which the barrier layer is formed, and on a top surface of the insulating layer, using an ionized physical vapor deposition (PVD) apparatus having a target to which a power for making plasma is applied, and a chuck to which a radio frequency (RF) bias for accelerating ions is applied. When the seed layer is formed using an ionized PVD process, the power and bias are controlled to resputter an initial seed layer formed on a bottom of the opening. The resputtered seed layer is redeposited on the sidewall of the opening, forming a seed layer with a good step coverage characteristic on the sidewall.
    Type: Application
    Filed: February 15, 2001
    Publication date: April 11, 2002
    Inventors: Seung-Man Choi, Ki-Chul Park, Hyeon-Deok Lee