Abstract: The number of mask steps used to fabricate a TFT in an AMLCD is reduced. In particular, source and drain metallizations, as well as doped and undoped semiconductor layers are patterned at the same time, and the source and drain metallizations and the doped semiconductor layer are etched in a single etching step using an insulating passivation layer as a mask to form source and drain electrodes. Manufacturing costs can be reduced and the manufacturing yield can be improved.

Abstract: A method of manufacturing an LCD on a substrate, the method comprising the steps of forming a thin film transistor on the substrate; forming an organic passivation layer over the thin film transistor; forming a patterned photoresist over the organic passivation layer; etching the organic passivation layer to form a contact hole over one of source and drain of the transistor; removing the photoresist; forming an SiO.sub.2 layer at a surface of the organic passivation layer by O.sub.2 ashing; and forming a pixel electrode contacting one of the source and drain of the transistor through the contact hole.

Abstract: A method of manufacturing an active matrix LCD is disclosed whereby gate bus lines, gate electrodes and source bus line segments are patterned from the same vacuum deposited first metal layer. An insulating layer, semiconductor layer, extrinsic semiconductor layer and second metal layer are then successively deposited on the substrate. A TFT channel region is formed by etching each of these layers in a second patterning process. During this step, storage capacitors may be formed by patterning the second metal layer so that it overlaps part of the gate bus lines. A transparent conductive layer is next deposited on the substrate. Pixel electrodes are then formed by patterning the transparent conductive layer in a third patterning process. Further, using a portion of the transparent conductive layer as a mask, the second metal layer and part of the extrinsic semiconductor layer are etched to form source and drain electrodes.

Abstract: An active matrix liquid crystal display (AMLCD) and method of manufacture includes gate bus lines and gate electrodes formed on a substrate; a gate insulating layer formed on the substrate, the gate bus lines and the gate electrodes; a semiconductor layer formed on the gate insulating layer; and an ohmic contact layer formed on the semiconductor layer. Also source bus lines, source electrodes, drain electrodes and storage electrodes of storage capacitors are formed on the ohmic contact layer. A first passivation layer covers the storage capacitors, the drain electrodes, the semiconductor layer, the source bus lines and source electrodes; and a second passivation layer covers the first passivation layer and the substrate. Contact holes formed in the first and second passivation layers expose the drain electrodes and the storage capacitors. Pixel electrodes are formed on the storage electrodes, the drain electrodes, the passivation layer, and the substrate.

Abstract: The thin film transistor is fabricated by etching a semiconductor layer, n.sup.+ semiconductor layer, etch stopper layer, and metal layer with single etching process to decrease the number of masks. By controlling the thickness of the semiconductor layer or the etching selection ratio of the etch stopper layer, an etch stopper thin film transistor or back channel etched thin film transistor can be fabricated.

Abstract: The present invention relates to a liquid crystal display device, in which a TFT array, color filters and a black matrix are provided on a single glass substrate. As a result, the second substrate of the LCD can be made thinner, thereby reducing the overall weight of the device. In addition, the LCD in accordance with the claimed invention has an improved aperture ratio. Further, less stress can be placed on the glass substrate, thereby improving yield.

Abstract: A liquid crystal display unit includes a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the exposed surface of the substrate including the gate electrode; an intrinsic semiconductor layer and an impurity layer formed on the gate insulating layer; source and drain electrodes separately formed on the impurity semiconductor layer; an insulating layer formed on the source and drain electrodes, the insulating layer having a contact hole for exposing a channel region; and a pixel electrode formed on the insulating layer and connected to the drain electrode.