Abstract: Provided is a semiconductor architecture including a carrier substrate, a landing pad included in the carrier substrate, a first semiconductor device provided on a first surface of the carrier substrate, the first semiconductor device including a first component provided on the landing pad, and a second semiconductor device provided on a second surface of the carrier substrate, a second component protruding from the second semiconductor device being provided on the landing pad.

Abstract: Provided is an apparatus and method for encoding/decoding a moving picture based on adaptive scanning. The moving picture apparatus and method can increase a compression rate based on adaptive scanning by performing intra prediction onto blocks of a predetermined size, and scanning coefficients acquired from Discrete Cosine Transform (DCT) of a residue signal and quantization differently according to the intra prediction mode. The moving picture encoding apparatus includes: a mode selector for selecting and outputting a prediction mode; a predictor for predicting pixel values of pixels to be encoded of an input video based on the prediction mode to thereby output a residue signal block; a transform/quantization unit for performing DCT onto the residue signal block and quantizing the transformed residue signal block; and an encoder for adaptively scanning and encoding the quantized residue signal block based on the prediction mode.

Abstract: There is provided a semiconductor device capable of improving electrical characteristics and integration density. The semiconductor device includes an active pattern protruding from a substrate, the active pattern including long sidewalls extending in a first direction and opposite to each other in a second direction, a lower epitaxial pattern on the substrate and covering a part of the active pattern, a gate electrode on the lower epitaxial pattern and extending along the long sidewalls of the active pattern, and an upper epitaxial pattern on the active pattern and connected to an upper surface of the active pattern. The active pattern includes short sidewalls connecting with the long sidewalls of the active pattern, and at least one of the short sidewalls of the active pattern has a curved surface.

Abstract: A secondary battery comprises an electrode assembly including a first electrode, a separator, and a second electrode alternately stacked and wound about a central axis. A first non-coating portion that is not coated with an electrode active material protrudes farther than the separator in a first direction along the central axis and a second non-coating portion that is not coated with the electrode active material protrudes farther than the separator in a second, opposite direction along the central axis. The first non-coating portion contacts a first connection part disposed on an end of a first can of the battery, and the second non-coating portion contacts a second connection part disposed on an end of a second can. At least one of the first connection part or the second connection part comprises a protrusion having a shape protruding towards the electrode assembly.

Abstract: An electrode manufacturing device includes a first coating portion, a second coating portion, and a drying portion. The first coating portion applies a first electrode slurry to a first side of the electrode sheet in the horizontal direction and a second coating portion applies a second electrode slurry to a second side of the electrode sheet in the vertical direction. The second coating portion is disposed after the first coating portion. A method including the same is also provided.

Abstract: An autonomous vehicle and a drone-based emergency response method thereof are provided. The autonomous vehicle includes a communication device that supports communication with a drone and a detection device that detects vehicle status information and driving environment information. A processing device detects an emergency situation occurring on a road based on the vehicle status information and the driving environment information while autonomous driving and performs a response logic matching the recognized emergency situation using the drone.

Abstract: A semiconductor device may be provided. The semiconductor device may include a power-down signal generation circuit and a refresh signal generation circuit. The power-down signal generation circuit may be configured to generate a power-down signal which is enabled during a power-down operation period based on a multi-operation signal that is generated by decoding commands. The refresh signal generation circuit may be configured to generate a refresh signal which is enabled during a refresh operation period based on the multi-operation signal and an operation selection signal.

Abstract: An etchant composition for preparing graphene having low sheet resistance includes sulfuric acid, hydrogen peroxide, an N-heterocyclic aromatic compound, aromatic boric acid, and purified water. The etchant composition exhibits an effect of remarkably reducing the sheet resistance of graphene produced through chemical vapor deposition (CVD).

Abstract: A secondary battery comprises an electrode assembly including a first electrode, a separator, and a second electrode alternately stacked and wound about a central axis. A first non-coating portion that is not coated with an electrode active material protrudes farther than the separator in a first direction along the central axis, and a second non-coating portion that is not coated with the electrode active material protrudes farther than the separator in a second, opposite direction along the central axis. The first non-coating portion contacts a first connection part disposed on an end of a first can of the battery, and the second non-coating portion contacts a second connection part disposed on an end of a second can. At least one of the first connection part or the second connection part comprises a protrusion having a shape protruding towards the electrode assembly.

Abstract: Disclosed herein are an apparatus and method for performing a fault-tolerant logical Hadamard gate operation. The apparatus is configured to perform a transversal logical Hadamard (H) operation of defining a logical quantum state and logical operators of a Hadamard-transformed logical qubit on a logical qubit of a prepared encoding flavor having an arbitrary quantum state, deform a boundary of the logical qubit while maintaining the logical quantum state using a boundary deformation technology, and perform an automatic flip of transforming a flavor of the logical qubit by flipping a rotated surface code while maintaining the logical quantum state and the definition of logical operators.

Abstract: Provided is a semiconductor architecture including a carrier substrate, alignment marks provided in the carrier substrate, the alignment marks being provided from a first surface of the carrier substrate to a second surface of the carrier substrate, a first semiconductor device provided on the first surface of the carrier substrate based on the alignment marks, a second semiconductor device provided on the second surface of the carrier substrate based on the alignment marks and aligned with the first semiconductor device.

Abstract: A light emitting display device includes color conversion units on a first substrate, each of the color conversion units having an overlapping area and a non-overlapping area, a black matrix on the overlapping area of each of the color conversion units, and an auxiliary electrode pattern between the black matrix and each of the color conversion units, the auxiliary electrode pattern farther inwards than the black matrix.

Abstract: A semiconductor device can include a field insulating film on a substrate and a fin-type pattern of a particular material, on the substrate, having a first sidewall and an opposing second sidewall. The fin-type pattern can include a first portion of the fin-type pattern that protrudes from an upper surface of the field insulating film and a second portion of the fin-type pattern disposed on the first portion. A third portion of the fin-type pattern can be disposed on the second portion where the third portion can be capped by a top rounded surface of the fin-type pattern and the first sidewall can have an undulated profile that spans the first, second and third portions.

Abstract: Integrated circuit devices may include two transistor stacks including lower transistors having different threshold voltages and upper transistors having different threshold voltages. Gate insulators of the lower transistors may have different dipole elements or different areal densities of dipole elements, and the upper transistors may have different gate electrode structures.

Abstract: A semiconductor device can include a field insulating film on a substrate and a fin-type pattern of a particular material, on the substrate, having a first sidewall and an opposing second sidewall. The fin-type pattern can include a first portion of the fin-type pattern that protrudes from an upper surface of the field insulating film and a second portion of the fin-type pattern disposed on the first portion. A third portion of the fin-type pattern can be disposed on the second portion where the third portion can be capped by a top rounded surface of the fin-type pattern and the first sidewall can have an undulated profile that spans the first, second and third portions.

Abstract: Provided is a portable power generating system including a base, an electric motor fixed on the base, a circular rotating table located at a center of the base and rotated by the electric motor, and two or more power generators fixed on the base and driven by the circular rotating table. Further, the system includes an extended generator shaft where magnet rollers are attached for increasing centripetal force and rotating on the rotating table in one direction. Also, a battery is provided for starting the system.

Abstract: Integrated circuit devices may include two transistor stacks including lower transistors having different threshold voltages and upper transistors having different threshold voltages. Gate insulators of the lower transistors may have different dipole elements or different areal densities of dipole elements, and the upper transistors may have different gate electrode structures.

Abstract: Nanosheet transistor devices are provided. A nanosheet transistor device includes a transistor stack that includes a lower nanosheet transistor having a first nanosheet width and a lower gate width. The transistor stack also includes an upper nanosheet transistor that is on the lower nanosheet transistor and that has a second nanosheet width and an upper gate width that are different from the first nanosheet width and the lower gate width, respectively. Related methods of forming a nanosheet transistor device are also provided.

Abstract: Provided is a semiconductor architecture including a carrier substrate, a landing pad included in the carrier substrate, a first semiconductor device provided on a first surface of the carrier substrate, the first semiconductor device including a first component provided on the landing pad, and a second semiconductor device provided on a second surface of the carrier substrate, a second component protruding from the second semiconductor device being provided on the landing pad.

Abstract: Nanosheet transistor devices are provided. A nanosheet transistor device includes a transistor stack that includes a lower nanosheet transistor having a first nanosheet width and a lower gate width. The transistor stack also includes an upper nanosheet transistor that is on the lower nanosheet transistor and that has a second nanosheet width and an upper gate width that are different from the first nanosheet width and the lower gate width, respectively. Related methods of forming a nanosheet transistor device are also provided.