Abstract: An electronic component includes a body, a pair of external electrodes, disposed on both ends of the body in a first direction, respectively, containing at least one of copper and nickel, while not containing a noble metal, a pair of metal frames connected to the pair of external electrodes, respectively, and a pair of conductive bonding layers, disposed between the external electrode and the metal frame, respectively, containing the same metal component as the external electrode.

Abstract: A color conversion panel includes a first color filter and a second color filter that are disposed on a substrate, a low refractive index layer disposed on the substrate, the first color filter, and the second color filter, the low refractive index layer including at least one of a first blue pigment and a first blue dye, a first color conversion layer overlapping the first color filter and including a semiconductor nanocrystal, a second color conversion layer overlapping the second color filter and including a semiconductor nanocrystal, and a transmissive layer that overlaps the low refractive index layer.

Abstract: The present invention relates to electrode slurry coating apparatus and method, the present invention ultimately allowing the process efficiency to be increased and rate of errors to be reduced when double-layer structured active material layers are formed by temporally adjusting the height of first and second discharge outlets through which active material is discharged.

Abstract: Disclosed herein is a floating recovery device for underwater equipment. The device includes a recovery body partitioned into a first compartment, a second compartment, and a third compartment by a partition wall, first and second pressure tanks installed in the first and second compartments, respectively, first and second striking parts fastened to the first and second pressure tanks, respectively, to strike the first and second pressure tanks, first and second actuators wirelessly actuating the first and second striking parts, respectively, and a buoyancy generator installed in the third compartment, and inflated by high-pressure gas introduced from the first and second pressure tanks, thus generating buoyancy. Such a configuration allows the pressure tank to be wirelessly struck for the purpose of supplying high-pressure gas to the buoyancy generator and floating the underwater equipment in the event of the loss of the underwater equipment.

Abstract: Disclosed herein is a floating recovery device for underwater equipment. The device includes a recovery body partitioned into a first compartment, a second compartment, and a third compartment by a partition wall, first and second pressure tanks installed in the first and second compartments, respectively, first and second striking parts fastened to the first and second pressure tanks, respectively, to strike the first and second pressure tanks, first and second actuators wirelessly actuating the first and second striking parts, respectively, and a buoyancy generator installed in the third compartment, and inflated by high-pressure gas introduced from the first and second pressure tanks, thus generating buoyancy. Such a configuration allows the pressure tank to be wirelessly struck for the purpose of supplying high-pressure gas to the buoyancy generator and floating the underwater equipment in the event of the loss of the underwater equipment.

Abstract: A semiconductor device and methods of forming a semiconductor device are disclosed. In the methods, a layer, such as an insulating interlayer, is formed on a substrate. A first trench is formed in the layer, and a mask layer is formed in the first trench. The mask layer has a first thickness from a bottom surface of the first trench to the top of the mask layer. The mask layer is patterned to form a mask that at least partially exposes a sidewall of the first trench. A portion of the mask adjacent to the exposed sidewall of the first trench has a second thickness smaller than the first thickness. The layer is etched to form a second trench using the mask as an etching mask. The second trench is in fluid communication with the first trench. A conductive pattern is formed in the first trench and the second trench.

Abstract: A semiconductor device and methods of forming a semiconductor device are disclosed. In the methods, a layer, such as an insulating interlayer, is formed on a substrate. A first trench is formed in the layer, and a mask layer is formed in the first trench. The mask layer has a first thickness from a bottom surface of the first trench to the top of the mask layer. The mask layer is patterned to form a mask that at least partially exposes a sidewall of the first trench. A portion of the mask adjacent to the exposed sidewall of the first trench has a second thickness smaller than the first thickness. The layer is etched to form a second trench using the mask as an etching mask. The second trench is in fluid communication with the first trench. A conductive pattern is formed in the first trench and the second trench.

Abstract: A semiconductor device and methods of forming a semiconductor device are disclosed. In the methods, a layer, such as an insulating interlayer, is formed on a substrate. A first trench is formed in the layer, and a mask layer is formed in the first trench. The mask layer has a first thickness from a bottom surface of the first trench to the top of the mask layer. The mask layer is patterned to form a mask that at least partially exposes a sidewall of the first trench. A portion of the mask adjacent to the exposed sidewall of the first trench has a second thickness smaller than the first thickness. The layer is etched to form a second trench using the mask as an etching mask. The second trench is in fluid communication with the first trench. A conductive pattern is formed in the first trench and the second trench.

Abstract: An insulation layer is formed on a substrate. A first mask is formed on the insulation layer. The first mask includes a plurality of line patterns arranged in a second direction. The plurality of line patterns extend in a first direction substantially perpendicular to the second direction. A second mask is formed on the insulation layer and the first mask. The second mask includes an opening partially exposing the plurality of line patterns. The opening has an uneven boundary at one of a first end portion in the first direction and a second end portion in a third direction substantially opposite to the first direction. The insulation layer is partially removed using the first mask and the second mask as an etching mask, thereby forming a plurality of first trenches and second trenches. The plurality of first trenches and the second trenches are arranged in a staggered pattern.

Abstract: Memory devices and methods of fabricating the same include a substrate including a cell region and a peripheral circuit region, data storages on the cell region, first bit lines on and coupled to the data storages, first contacts coupled to peripheral transistors on the peripheral circuit region, and second bit lines on and coupled to the first contacts. The second bit lines may each have a lowermost surface lower than a lowermost surface of the data storages.

Abstract: An insulation layer is formed on a substrate. A first mask is formed on the insulation layer. The first mask includes a plurality of line patterns arranged in a second direction. The plurality of line patterns extend in a first direction substantially perpendicular to the second direction. A second mask is formed on the insulation layer and the first mask. The second mask includes an opening partially exposing the plurality of line patterns. The opening has an uneven boundary at one of a first end portion in the first direction and a second end portion in a third direction substantially opposite to the first direction. The insulation layer is partially removed using the first mask and the second mask as an etching mask, thereby forming a plurality of first trenches and second trenches. The plurality of first trenches and the second trenches are arranged in a staggered pattern.

Abstract: An insulation layer is formed on a substrate. A first mask is formed on the insulation layer. The first mask includes a plurality of line patterns arranged in a second direction. The plurality of line patterns extend in a first direction substantially perpendicular to the second direction. A second mask is formed on the insulation layer and the first mask. The second mask includes an opening partially exposing the plurality of line patterns. The opening has an uneven boundary at one of a first end portion in the first direction and a second end portion in a third direction substantially opposite to the first direction. The insulation layer is partially removed using the first mask and the second mask as an etching mask, thereby forming a plurality of first trenches and second trenches. The plurality of first trenches and the second trenches are arranged in a staggered pattern.

Abstract: Nonvolatile memory devices and methods of fabricating the same, include, forming a transistor in a first region of a substrate, forming a contact which is connected to the transistor, forming an information storage portion, which is disposed two-dimensionally, in a second region of the substrate, sequentially forming a stop film and an interlayer insulating film which cover the contact and the information storage portion, forming a first trench, which exposes the stop film, on the contact, and forming a second trench which extends through the stop film to expose the contact, wherein a bottom surface of the first trench is lower than a bottom surface of the information storage portion.

Abstract: The present invention relates to oriental medicine compositions marked as SEC 22 and SEC 33 for improving digestive functions and respiratory functions for improving children's underweight, low growth and depressed respiratory organ, an oriental medicine derived therefrom, and methods of preparing them. According to an example of the present invention, the oriental medicine composition containing broiled fruit of Crataegus pinnatifida, broiled root of Atractylodes japonica, dried peel of Citrus unshiu, broiled sprout of Hordeum vulgare, broiled fruit of Amomum xanthioides, root of Zingiber officinale, dried fruit of Zizyphi, and horn of Cervus elaphus.

Abstract: A method of manufacturing a semiconductor device, including forming a molding layer; forming a damascene mask layer and mask layer on the molding layer; forming a mask layer pattern by etching the mask layer; forming a damascene pattern by partially etching the damascene mask layer; forming a damascene mask layer on the mask layer pattern to bury the damascene pattern; forming a damascene pattern partially overlapping the damascene pattern by etching the damascene mask layer and the mask layer pattern; connecting the damascene pattern and the damascene pattern by removing a portion of the mask layer pattern exposed by the damascene pattern; forming a damascene mask layer on the damascene mask layer to bury the damascene pattern; and forming a trench under the damascene patterns by etching the damascene mask layers and the molding layer using remaining portions of the mask layer pattern.

Abstract: Memory devices and methods of fabricating the same include a substrate including a cell region and a peripheral circuit region, data storages on the cell region, first bit lines on and coupled to the data storages, first contacts coupled to peripheral transistors on the peripheral circuit region, and second bit lines on and coupled to the first contacts. The second bit lines may each have a lowermost surface lower than a lowermost surface of the data storages.

Abstract: A method of manufacturing a semiconductor device, including forming a molding layer; forming a damascene mask layer and mask layer on the molding layer; forming a mask layer pattern by etching the mask layer; forming a damascene pattern by partially etching the damascene mask layer; forming a damascene mask layer on the mask layer pattern to bury the damascene pattern; forming a damascene pattern partially overlapping the damascene pattern by etching the damascene mask layer and the mask layer pattern; connecting the damascene pattern and the damascene pattern by removing a portion of the mask layer pattern exposed by the damascene pattern; forming a damascene mask layer on the damascene mask layer to bury the damascene pattern; and forming a trench under the damascene patterns by etching the damascene mask layers and the molding layer using remaining portions of the mask layer pattern.

Abstract: A timing controller that includes a noise detection circuit and a setting control unit. The noise detection circuit includes a detection unit and a reset signal generating unit. The detection unit outputs a detection signal having a first logic level based on at least one of a plurality of reference data toggling asynchronous with a clock signal. The reset signal generating unit outputs a reset signal having a second logic level based on the detection signal. The setting control unit stores setting data and initializes the setting data in response to the reset signal having the first logic level, and the setting data are used to process red, green and blue (RGB) image data.

Abstract: Memory devices and methods of fabricating the same include a substrate including a cell region and a peripheral circuit region, data storages on the cell region, first bit lines on and coupled to the data storages, first contacts coupled to peripheral transistors on the peripheral circuit region, and second bit lines on and coupled to the first contacts. The second bit lines may each have a lowermost surface lower than a lowermost surface of the data storages.