Patents by Inventor Ki-seok KWON

Ki-seok KWON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11907826
    Abstract: An electronic apparatus for performing machine learning a method of machine learning, and a non-transitory computer-readable recording medium are provided. The electronic apparatus includes an operation module configured to include a plurality of processing elements arranged in a predetermined pattern and share data between the plurality of processing elements which are adjacent to each other to perform an operation; and a processor configured to control the operation module to perform a convolution operation by applying a filter to input data, wherein the processor controls the operation module to perform the convolution operation by inputting each of a plurality of elements configuring a two-dimensional filter to the plurality of processing elements in a predetermined order and sequentially applying the plurality of elements to the input data.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: February 20, 2024
    Inventors: Kyoung-Hoon Kim, Young-hwan Park, Ki-seok Kwon, Suk-jin Kim, Chae-seok Im, Han-su Cho, Sang-bok Han, Seung-won Lee, Kang-jin Yoon
  • Patent number: 11767195
    Abstract: A safety inspection system of an occupant evacuation elevator capable of having a laser range finder installed on each of an elevator rope and an elevator guide rail of the occupant evacuation elevator of a skyscraper and checking a length and verticality of each of the elevator rope and the elevator guide rail measured from the laser range finder to monitor slight distortion or location variation in real time, and accordingly, capable of easily performing a safety inspection of the occupant evacuation elevator, capable of performing the safety inspection of the occupant evacuation elevator in real time to operate the occupant evacuation elevator again in an operation mode of the occupant evacuation elevator according to an occurrence of a disaster situation in the skyscraper, and accordingly, capable of safely and quickly evacuating occupants and a method thereof are provided.
    Type: Grant
    Filed: November 22, 2018
    Date of Patent: September 26, 2023
    Assignee: KOREA INSTITUTE OF CIVIL ENGINEERING AND BUILDING TECHNOLOGY
    Inventors: Seung Un Chae, Bum Yeon Cho, Heung Youl Kim, Ki Seok Kwon
  • Patent number: 11577933
    Abstract: An evacuation strategy support system using an occupant evacuation elevator (OEE) capable of supporting an evacuation strategy so that information on a number of occupants is recognized by real-time occupant monitoring and thus occupants on each floor may use stairs and the occupant evacuation elevator to safely and quickly evacuate when a disaster situation occurs in a skyscraper and thus the occupants use the occupant evacuation elevator to evacuate, capable of monitoring occupant information on each floor in real time and supporting calculation of an evacuation capacity of the occupant evacuation elevator to establish an evacuation strategy to allow safe evacuation and early reaction in an overall skyscraper to be performed, and capable of optimizing the calculation of the evacuation capacity of the occupant evacuation elevator applicable to an initial stage of a design of the skyscraper, and a method thereof are provided.
    Type: Grant
    Filed: November 22, 2018
    Date of Patent: February 14, 2023
    Assignee: KOREA INSTITUTE OF CIVIL ENGINEERING AND BUILDING TECHNOLOGY
    Inventors: Seung Un Chae, Bum Yeon Cho, Heung Youl Kim, Ki Seok Kwon
  • Patent number: 11263018
    Abstract: A vector processor is disclosed. The vector processor includes a plurality of register files provided to each of a plurality of single instruction multiple data (SIMD) lanes, storing each of a plurality of pieces of data, and respectively outputting input data to be used in a current cycle among the plurality of pieces of data, a shuffle unit for receiving a plurality of pieces of input data outputted from the plurality of register files, and performing shuffling such that the received plurality of pieces of input data respectively correspond to the plurality of SIMD lanes and outputting the same; and a command execution unit for performing a parallel operation by receiving input data outputted from the shuffle unit.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: March 1, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-seok Kwon, Jae-un Park, Dong-kwan Suh, Kang-jin Yoon
  • Patent number: 10915323
    Abstract: Provided is a data processing method including the operations of storing, in a register, a first immediate portion included in a first instruction, from among the first immediate portion and a second immediate portion that constitute an immediate value, which is an operand; determining the immediate value by catenating the second immediate portion included in a second instruction with the stored first immediate portion; and performing an operation by using a value indicated by the second instruction and the determined immediate value.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: February 9, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-seok Kwon, Min-wook Ahn, Suk-jin Kim, Young-hwan Park
  • Publication number: 20200272478
    Abstract: A vector processor is disclosed. The vector processor includes a plurality of register files provided to each of a plurality of single instruction multiple data (SIMD) lanes, storing each of a plurality of pieces of data, and respectively outputting input data to be used in a current cycle among the plurality of pieces of data, a shuffle unit for receiving a plurality of pieces of input data outputted from the plurality of register files, and performing shuffling such that the received plurality of pieces of input data respectively correspond to the plurality of SIMD lanes and outputting the same; and a command execution unit for performing a parallel operation by receiving input data outputted from the shuffle unit.
    Type: Application
    Filed: October 23, 2017
    Publication date: August 27, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-seok KWON, Jae-un PARK, Dong-kwan SUH, Kang-jin YOON
  • Patent number: 10481867
    Abstract: A data input/output unit is provided. The data input/output unit which is connected to a processor, and receives and outputs data in sequence based on a first schedule includes a first input first output (FIFO) memory connected to an external unit and the processor; and a reordering buffer connected to one side of the FIFO memory, and store data outputted from, or inputted to, the FIFO memory in a plurality of buffer regions in sequence, and output data stored in one of the plurality of buffer regions based on a control signal provided from the processor.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: November 19, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-un Park, Jong-hun Lee, Ki-seok Kwon, Dong-kwan Suh, Kang-jin Yoon, Jung-uk Cho
  • Patent number: 10430339
    Abstract: A memory management method includes determining a stride value for stride access by referring to a size of two-dimensional (2D) data, and allocating neighboring data in a vertical direction of the 2D data to a plurality of banks that are different from one another according to the determined stride value. Thus, the data in the vertical direction may be efficiently accessed by using a memory having a large data width.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: October 1, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-seok Kwon, Chul-soo Park, Suk-jin Kim
  • Patent number: 10396797
    Abstract: Provided are a reconfigurable processor and a method of operating the same, the reconfigurable processor including: a configurable memory configured to receive a task execution instruction from a control processor; and a plurality of reconfigurable arrays, each configured to receive configuration information from the configurable memory, wherein each of the plurality of reconfigurable arrays simultaneously executes a task based on the configuration information.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: August 27, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-kwan Suh, Ki-seok Kwon, Young-hwan Park, Seung-won Lee, Suk-jin Kim
  • Patent number: 10366049
    Abstract: A method of controlling a processor includes receiving from a command buffer a first command corresponding to a first instruction that is processed by a second processing core and starting processing of the first command by the first processing core, storing in the command buffer a second command corresponding to a second instruction that is processed by the second processing core before the processing of the first command is completed, and starting processing of a third instruction by the second processing core before the processing of the first command is completed.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: July 30, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-seok Kwon, Suk-jin Kim, Do-hyung Kim
  • Publication number: 20190152746
    Abstract: An evacuation strategy support system using an occupant evacuation elevator (OEE) capable of supporting an evacuation strategy so that information on a number of occupants is recognized by real-time occupant monitoring and thus occupants on each floor may use stairs and the occupant evacuation elevator to safely and quickly evacuate when a disaster situation occurs in a skyscraper and thus the occupants use the occupant evacuation elevator to evacuate, capable of monitoring occupant information on each floor in real time and supporting calculation of an evacuation capacity of the occupant evacuation elevator to establish an evacuation strategy to allow safe evacuation and early reaction in an overall skyscraper to be performed, and capable of optimizing the calculation of the evacuation capacity of the occupant evacuation elevator applicable to an initial stage of a design of the skyscraper, and a method thereof are provided.
    Type: Application
    Filed: November 22, 2018
    Publication date: May 23, 2019
    Applicant: KOREA INSTITUTE OF CIVIL ENGINEERING AND BUILDING TECHNOLOGY
    Inventors: Seung Un CHAE, Bum Yeon CHO, Heung Youl KIM, Ki Seok KWON
  • Publication number: 20190152745
    Abstract: A safety inspection system of an occupant evacuation elevator capable of having a laser range finder installed on each of an elevator rope and an elevator guide rail of the occupant evacuation elevator of a skyscraper and checking a length and verticality of each of the elevator rope and the elevator guide rail measured from the laser range finder to monitor slight distortion or location variation in real time, and accordingly, capable of easily performing a safety inspection of the occupant evacuation elevator, capable of performing the safety inspection of the occupant evacuation elevator in real time to operate the occupant evacuation elevator again in an operation mode of the occupant evacuation elevator according to an occurrence of a disaster situation in the skyscraper, and accordingly, capable of safely and quickly evacuating occupants and a method thereof are provided.
    Type: Application
    Filed: November 22, 2018
    Publication date: May 23, 2019
    Applicant: KOREA INSTITUTE OF CIVIL ENGINEERING AND BUILDING TECHNOLOGY
    Inventors: Seung Un CHAE, Bum Yeon CHO, Heung Youl KIM, Ki Seok KWON
  • Publication number: 20190032237
    Abstract: An anodizable aluminum plate and a method of manufacturing the anodizable aluminum plate are provided. An aluminum alloy material is provided, and the aluminum alloy material is anodized at a temperature at a voltage in a range of 4 volts (V) to 14 V.
    Type: Application
    Filed: July 25, 2018
    Publication date: January 31, 2019
    Inventors: Go-Eun KIM, Ki-Seok KWON, Kyung-Tae KIM, Min-Hyouk KIM, Yu-Geun KIM, Joon-Ki YUN
  • Patent number: 10185676
    Abstract: A direct memory access (DMA) controller is provided. The DMA controller includes a processor interface configured to directly receive information representing a first operation sent by a processor to a buffer, and transmit data corresponding to the first operation stored in the buffer to the processor core or record data corresponding to the first operation in the buffer, and a buffer group connected to the processor interface, and including a plurality of buffers.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: January 22, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-seok Kwon, Suk-jin Kim, Do-hyung Kim
  • Publication number: 20180276532
    Abstract: An electronic apparatus for performing machine learning a method of machine learning, and a non-transitory computer-readable recording medium are provided. The electronic apparatus includes an operation module configured to include a plurality of processing elements arranged in a predetermined pattern and share data between the plurality of processing elements which are adjacent to each other to perform an operation; and a processor configured to control the operation module to perform a convolution operation by applying a filter to input data, wherein the processor controls the operation module to perform the convolution operation by inputting each of a plurality of elements configuring a two-dimensional filter to the plurality of processing elements in a predetermined order and sequentially applying the plurality of elements to the input data.
    Type: Application
    Filed: March 23, 2018
    Publication date: September 27, 2018
    Inventors: Kyoung-hoon KIM, Young-hwan PARK, Ki-seok KWON, Suk-jin KIM, Chae-seok IM, Han-su CHO, Sang-bok HAN, Seung-won LEE, Kang-jin YOON
  • Publication number: 20180101357
    Abstract: A data input/output unit is provided. The data input/output unit which is connected to a processor, and receives and outputs data in sequence based on a first schedule includes a first input first output (FIFO) memory connected to an external unit and the processor; and a reordering buffer connected to one side of the FIFO memory, and store data outputted from, or inputted to, the FIFO memory in a plurality of buffer regions in sequence, and output data stored in one of the plurality of buffer regions based on a control signal provided from the processor.
    Type: Application
    Filed: October 6, 2017
    Publication date: April 12, 2018
    Inventors: Jae-un PARK, Jong-hun LEE, Ki-seok KWON, Dong-kwan SUH, Kang-jin YOON, Jung-uk CHO
  • Publication number: 20170315811
    Abstract: Provided is a data processing method including the operations of storing, in a register, a first immediate portion included in a first instruction, from among the first immediate portion and a second immediate portion that constitute an immediate value, which is an operand; determining the immediate value by catenating the second immediate portion included in a second instruction with the stored first immediate portion; and performing an operation by using a value indicated by the second instruction and the determined immediate value.
    Type: Application
    Filed: October 14, 2015
    Publication date: November 2, 2017
    Inventors: Ki-seok KWON, Min-wook AHN, Suk-jin KIM, Young-hwan PARK
  • Publication number: 20170317679
    Abstract: Provided are a reconfigurable processor and a method of operating the same, the reconfigurable processor including: a configurable memory configured to receive a task execution instruction from a control processor; and a plurality of reconfigurable arrays, each configured to receive configuration information from the configurable memory, wherein each of the plurality of reconfigurable arrays simultaneously executes a task based on the configuration information.
    Type: Application
    Filed: October 19, 2015
    Publication date: November 2, 2017
    Applicant: Samsung Electronics Co., Ltd,
    Inventors: Dong-kwan SUH, Ki-seok KWON, Young-hwan PARK, Seung-won LEE, Suk-jin KIM
  • Patent number: 9639357
    Abstract: A processor, apparatus and method to use a multiple store instruction based on physical addresses of registers are provided. The processor is configured to execute an instruction to store data of a plurality of registers in a memory, the instruction including a first area in which a physical address of each of the registers is written. An instruction generating apparatus is configured to generate an instruction to store data of a plurality of registers in a memory, the instruction including a first area in which a physical address of each of the registers is written. An instruction generating method includes detecting a code area that instructs to store data of a plurality of registers in a memory, from a program code. The instruction generating method further includes generating an instruction corresponding to the code area by mapping physical addresses of the registers to a first area of the instruction.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: May 2, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Seok Kwon, Jae-Un Park, Suk-Jin Kim
  • Publication number: 20160335185
    Abstract: A memory management method includes determining a stride value for stride access by referring to a size of two-dimensional (2D) data, and allocating neighboring data in a vertical direction of the 2D data to a plurality of banks that are different from one another according to the determined stride value. Thus, the data in the vertical direction may be efficiently accessed by using a memory having a large data width.
    Type: Application
    Filed: December 30, 2014
    Publication date: November 17, 2016
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-seok KWON, Chul-soo PARK, Suk-jin KIM