Patents by Inventor Ki Soo Choi

Ki Soo Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110068432
    Abstract: A semiconductor device comprises a fuse having a blowing region at a center part for selectively connecting different two terminals; and a dummy contact positioned under the blowing region for forming empty space by being removed together with the blowing region in a blowing process.
    Type: Application
    Filed: December 28, 2009
    Publication date: March 24, 2011
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kyu Tae Kim, Ki Soo Choi
  • Publication number: 20100327400
    Abstract: A semiconductor device includes a fuse box including a plurality of fuses and a plurality of common nodes, wherein paired fuses among the plurality of fuses are aligned in a first direction and the plurality of common nodes between fuses of each of the pairs at a different height is aligned in a second direction perpendicular to the first direction.
    Type: Application
    Filed: December 28, 2009
    Publication date: December 30, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventors: Ki Soo Choi, Keon Yoo, Mi Hyeon Jo
  • Patent number: 7829392
    Abstract: A method for manufacturing a fuse box of a semiconductor device includes forming an interlayer dielectric film over a semiconductor substrate including a given lower structure; forming a metal line and a fuse over the interlayer dielectric film; forming a first protective film over the resulting structure; etching the first protective film and the fuse at a given depth by a photo-etching process with a repair mask to form an open region; and forming a second protective film vertical to the fuse.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: November 9, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Ki Soo Choi
  • Publication number: 20080020560
    Abstract: A method for manufacturing a fuse box of a semiconductor device includes forming an interlayer dielectric film over a semiconductor substrate including a given lower structure; forming a metal line and a fuse over the interlayer dielectric film; forming a first protective film over the resulting structure; etching the first protective film and the fuse at a given depth by a photo-etching process with a repair mask to form an open region; and forming a second protective film vertical to the fuse.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 24, 2008
    Inventor: Ki Soo Choi
  • Patent number: 6057582
    Abstract: Semiconductor device and method for fabricating the same, is disclosed, in which a gate insulating film is formed thicker at portions opposite to edge portions of a gate electrode for preventing the hot carrier possible to occur due to a strong electric field of the gate electrode, that can improve a device reliability, the device including a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, the gate insulating film having both end portions formed thicker than a center portion, a gate electrode formed on the gate insulating film, the gate electrode having a center portion formed thicker than portions thereof on both sides of the gate insulating film, and impurity regions formed in surfaces of the semiconductor substrate on both sides of the gate electrode, and the method including the steps of (1) forming a gate insulating film on a semiconductor substrate, and forming a gate electrode having a thicker center portion on the gate insulating film, (2) expanding thicknesses o
    Type: Grant
    Filed: October 1, 1998
    Date of Patent: May 2, 2000
    Assignee: LG Semicon Co., Ltd.
    Inventor: Ki Soo Choi