Patents by Inventor Ki-Soo Kim

Ki-Soo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240239745
    Abstract: In a method of synthesizing bilirubin according to an embodiment, a compound represented by Formula 3 is prepared by coupling a compound represented by Formula 1 with a compound represented by Formula 2, thereby firstly chemically synthesizing bilirubin and PEGylated bilirubin, which are usefully used in a medical product or the like.
    Type: Application
    Filed: August 10, 2022
    Publication date: July 18, 2024
    Inventors: MYUNG LIP KIM, SANG HO MA, KI SOO PARK, HEE GOO JUN, DA EUN KIM
  • Publication number: 20240219061
    Abstract: An air purifier includes: a body having an inlet introducing air; a blower accommodated in the body and providing blowing force for flow of air; a filter filtering the air introduced into the body; a wind direction control unit adjusting a filtered air discharging direction; a manipulation module for outputting a signal manipulated by user; and a control device controlling the wind direction control unit based on the signal. The wind direction control unit includes: a wind direction control member rotating about the body about an axis extending horizontally; a motor providing driving force for rotating the wind direction control member; a driving gear rotated by the driving force of the motor; and a driven gear rotated by the driving gear. The control device controls the motor so that when the driving gear is rotated and then stopped, the driving gear is stopped after reversely rotated by a predetermined angle.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 4, 2024
    Applicant: COWAY CO., LTD.
    Inventors: Ki Soo KIM, Myoung Jun LEE, Yu Young NAM, Jae Hong KIM
  • Patent number: 12025580
    Abstract: An ion detection sensor fabrication method includes: preparing an ion-sensitive film preparation solution; preparing an ion-sensitive mixed layer preparation solution by mixing the ion-sensitive film preparation solution with graphene powder; and forming an ion-sensitive mixed layer sensitive to a target ion by applying the ion-sensitive mixed layer preparation solution to fill a gap between a source and a drain spaced apart from each other and to cover at least a portion of an upper surface of each of the source and the drain.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: July 2, 2024
    Assignee: MCK TECH CO., LTD.
    Inventors: Seung Min Cho, Min Gu Cho, Ki Soo Kim, Hong Gi Oh
  • Publication number: 20240189751
    Abstract: The present disclosure relates to an air purifier and, more particularly, to an air purifier capable of introducing a filter support structure including a first body supporting a filter member and having a protruding part on a lower surface thereof, and a second body disposed at a lower portion of the first body and having a groove part having an inclined surface in contact with the protruding part formed at one side thereof, thereby allowing the filter member drawn out of the housing to be inserted into an inner space of the housing and simultaneously moving the filter member upward to form a sealing against a latching part, thereby enhancing convenience of filter management and improving air tightness of the filter member.
    Type: Application
    Filed: April 12, 2022
    Publication date: June 13, 2024
    Applicant: COWAY Co., Ltd.
    Inventors: Jun Hyoung BAE, Yu Young NAM, Ki Soo KIM, Jae Hong KIM
  • Patent number: 11917818
    Abstract: A memory may include a first wafer, and a second wafer stacked on and bonded to the first wafer. The first wafer may include a cell structure including a memory cell array; and a first logic structure disposed under the cell structure, and including a row control circuit. The second wafer may include a second logic structure including a column control circuit.
    Type: Grant
    Filed: November 25, 2022
    Date of Patent: February 27, 2024
    Assignee: SK HYNIX INC.
    Inventors: Sung Lae Oh, Sang Woo Park, Dong Hyuk Chae, Ki Soo Kim
  • Publication number: 20230271126
    Abstract: A filter frame includes a support supporting a filter member, and the support includes a first support and a second support which are rotatably connected. Each of the first and second support includes a body part including a first vertical member, a horizontal member having one end perpendicularly connected to the first vertical member, and a second vertical member connected to the other end of the horizontal member, a cylindrical shaft part connected to the first vertical member, a rotating part connected to the second vertical member to surround a portion of the shaft part, a locking part provided on one of the first vertical member and the shaft part, and an engaging part provided on one of the second vertical member and the rotating part and engaged and fixed to the locking part. The rotating part of the second support is coupled to the shaft part.
    Type: Application
    Filed: July 29, 2021
    Publication date: August 31, 2023
    Applicant: COWAY CO., LTD.
    Inventors: Jhe Hong KIM, Yu Young NAM, Jun Hyoung BAE, Ki Soo KIM
  • Publication number: 20230266025
    Abstract: A composite filter includes a filter unit including a filter member having filtering parts, at least one filter module arranged in parallel with at least one of the filtering parts, and a bracket supporting the filtering parts disposed adjacent to each other and the filter module so that the filtering parts disposed adjacent to each other are rotatable. The bracket includes a folded portion that is selectively folded according to the relative rotation of the filtering parts, and attachment portions connected to the folded portion with the folded portion interposed therebetween, and attached to the side surfaces of the filtering parts disposed adjacent to each other. The folded portion and the attachment portions are provided integrally and are formed of a flexible material, and the attachment portion extend to the side surface of the filter module adjacent thereto to seal a gap between the filtering part and the filter module.
    Type: Application
    Filed: June 29, 2021
    Publication date: August 24, 2023
    Applicant: COWAY CO., LTD.
    Inventors: Yu Young NAM, Yoon Hyuck CHOI, Ki Soo KIM KIM, Jun Hyoung BAE, Jhe Hong KIM, Ju Hyun BAEK, Chan Jung PARK
  • Patent number: 11726655
    Abstract: A method of displaying a function of a button of an ultrasound apparatus on the button includes displaying information about one or more functions provided by the ultrasound apparatus, selecting one from among the one or more functions which have been displayed, determining a button in which the selected function is to be set based on an external input signal for matching the selected function to the button in which the selected function is to be set; and displaying information about the selected function on the determined button.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chi-Young Ahn, Jong-Chan Kwon, Ki-Soo Kim, Jung-Hoon Kim, Sang-Min Hyun
  • Patent number: 11715726
    Abstract: A memory device includes: a first wafer including a first substrate, a plurality of first electrode layers and a plurality of first interlayer dielectric layers alternately stacked along first vertical channels projecting in a vertical direction on a top surface of the first substrate, and a dielectric stack comprising a plurality of dielectric layers and the plurality of first interlayer dielectric layers alternately stacked on the top surface of the first substrate; and a second wafer disposed on the first wafer, and including a second substrate, and a plurality of second electrode layers that are alternately stacked with a plurality of second interlayer dielectric layers along second vertical channels projecting in the vertical direction on a bottom surface of the second substrate and have pad parts overlapping with the dielectric stack in the vertical direction.
    Type: Grant
    Filed: December 18, 2021
    Date of Patent: August 1, 2023
    Assignee: SK hynix Inc.
    Inventors: Sung Lae Oh, Ki Soo Kim, Sang Woo Park, Dong Hyuk Chae
  • Publication number: 20230203373
    Abstract: An etchant composition for preparing graphene having low sheet resistance includes sulfuric acid, hydrogen peroxide, an N-heterocyclic aromatic compound, aromatic boric acid, and purified water. The etchant composition exhibits an effect of remarkably reducing the sheet resistance of graphene produced through chemical vapor deposition (CVD).
    Type: Application
    Filed: February 23, 2022
    Publication date: June 29, 2023
    Inventors: Jong Taik MOON, Young Duck KWON, Byong Wook YOO, Sang Min LEE, Seung Il MOON, Ki Soo KIM, Gyu Hyun LEE, Da Som HYUN, Su Jin SHIM
  • Publication number: 20230100075
    Abstract: A memory may include a first wafer, and a second wafer stacked on and bonded to the first wafer. The first wafer may include a cell structure including a memory cell array; and a first logic structure disposed under the cell structure, and including a row control circuit. The second wafer may include a second logic structure including a column control circuit.
    Type: Application
    Filed: November 25, 2022
    Publication date: March 30, 2023
    Inventors: Sung Lae OH, Sang Woo PARK, Dong Hyuk CHAE, Ki Soo KIM
  • Patent number: 11538820
    Abstract: A memory device is disclosed. The disclosed memory device may include a first wafer, and a second wafer stacked on and bonded to the first wafer. The first wafer may include a cell structure including a memory cell array; and a first logic structure disposed under the cell structure, and including a column control circuit. The second wafer may include a second logic structure including a row control circuit.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: December 27, 2022
    Assignee: SK hynix Inc.
    Inventors: Sung Lae Oh, Sang Woo Park, Dong Hyuk Chae, Ki Soo Kim
  • Publication number: 20220349853
    Abstract: An ion detection sensor fabrication method includes: preparing an ion-sensitive film preparation solution; preparing an ion-sensitive mixed layer preparation solution by mixing the ion-sensitive film preparation solution with graphene powder; and forming an ion-sensitive mixed layer sensitive to a target ion by applying the ion-sensitive mixed layer preparation solution to fill a gap between a source and a drain spaced apart from each other and to cover at least a portion of an upper surface of each of the source and the drain.
    Type: Application
    Filed: October 18, 2021
    Publication date: November 3, 2022
    Applicant: MCK TECH CO., LTD.
    Inventors: Seung Min CHO, Min Gu CHO, Ki Soo KIM, Hong Gi OH
  • Patent number: 11398443
    Abstract: A memory device having a vertical structure includes a memory cell array defined in a cell wafer, and having a plurality of word lines extending in a first direction and arranged in a second direction, and having a plurality of bit lines extending in the second direction and arranged in the first direction; and a logic circuit configured to control the memory cell array, and including a page buffer low-voltage circuit, a page buffer high-voltage circuit, a row decoder circuit and a peripheral circuit, wherein the page buffer low-voltage circuit is disposed in a first peripheral wafer and the page buffer high-voltage circuit, the row decoder circuit and the peripheral circuit are disposed in a second peripheral wafer, and wherein the cell wafer overlaps with the first peripheral wafer and the second peripheral wafer in a vertical direction that is perpendicular to a plane formed by the first direction and the second direction.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: July 26, 2022
    Assignee: SK hynix Inc.
    Inventors: Sung Lae Oh, Sang Woo Park, Dong Hyuk Chae, Ki Soo Kim
  • Patent number: 11315639
    Abstract: A memory device includes a cell wafer including a memory cell array; a first logic wafer bonded to one surface of the cell wafer, and including a first logic circuit which controls the memory cell array; and a second logic wafer bonded to the other surface of the cell wafer which faces away from the one surface, and including a second logic circuit which controls the memory cell array.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: April 26, 2022
    Assignee: SK hynix Inc.
    Inventors: Sung Lae Oh, Sang Woo Park, Dong Hyuk Chae, Ki Soo Kim
  • Publication number: 20220122932
    Abstract: A memory device having a vertical structure includes a memory cell array defined in a cell wafer, and having a plurality of word lines extending in a first direction and arranged in a second direction, and having a plurality of bit lines extending in the second direction and arranged in the first direction; and a logic circuit configured to control the memory cell array, and including a page buffer low-voltage circuit, a page buffer high-voltage circuit, a row decoder circuit and a peripheral circuit, wherein the page buffer low-voltage circuit is disposed in a first peripheral wafer and the page buffer high-voltage circuit, the row decoder circuit and the peripheral circuit are disposed in a second peripheral wafer, and wherein the cell wafer overlaps with the first peripheral wafer and the second peripheral wafer in a vertical direction that is perpendicular to a plane formed by the first direction and the second direction.
    Type: Application
    Filed: March 24, 2021
    Publication date: April 21, 2022
    Inventors: Sung Lae OH, Sang Woo PARK, Dong Hyuk CHAE, Ki Soo KIM
  • Publication number: 20220115357
    Abstract: A memory device includes: a first wafer including a first substrate, a plurality of first electrode layers and a plurality of first interlayer dielectric layers alternately stacked along first vertical channels projecting in a vertical direction on a top surface of the first substrate, and a dielectric stack comprising a plurality of dielectric layers and the plurality of first interlayer dielectric layers alternately stacked on the top surface of the first substrate; and a second wafer disposed on the first wafer, and including a second substrate, and a plurality of second electrode layers that are alternately stacked with a plurality of second interlayer dielectric layers along second vertical channels projecting in the vertical direction on a bottom surface of the second substrate and have pad parts overlapping with the dielectric stack in the vertical direction.
    Type: Application
    Filed: December 18, 2021
    Publication date: April 14, 2022
    Inventors: Sung Lae OH, Ki Soo KIM, Sang Woo PARK, Dong Hyuk CHAE
  • Patent number: 11239209
    Abstract: A memory device includes a first memory block defined in a first wafer; and a second memory block defined in a second wafer that is disposed in a vertical direction with respect to the first wafer. A size of the first memory block is smaller than a size of the second memory block.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: February 1, 2022
    Assignee: SK hynix Inc.
    Inventors: Sung Lae Oh, Ki Soo Kim, Sang Woo Park, Dong Hyuk Chae
  • Publication number: 20220016683
    Abstract: The present disclosure relates to a local heat treatment system and a cold forming method using the same. The local heat treatment system includes a heating device configured to locally heat only a plastic deformation occurrence portion of a blank material to a predetermined temperature, a moving device configured to move the heating device to a position of a local heating region of the blank material, and a controller configured to control the heating device and the moving device.
    Type: Application
    Filed: August 8, 2019
    Publication date: January 20, 2022
    Inventors: Youn-Hee Kang, Ki Soo Kim, Chang Ho Moon, Gil-Ho Song, Jong Youn Park, Eun-Ho Lee
  • Publication number: 20210383874
    Abstract: A memory device includes a cell wafer including a memory cell array; a first logic wafer bonded to one surface of the cell wafer, and including a first logic circuit which controls the memory cell array; and a second logic wafer bonded to the other surface of the cell wafer which faces away from the one surface, and including a second logic circuit which controls the memory cell array.
    Type: Application
    Filed: November 2, 2020
    Publication date: December 9, 2021
    Inventors: Sung Lae OH, Sang Woo PARK, Dong Hyuk CHAE, Ki Soo KIM