Abstract: Example implementations described herein are directed to an interface configured to redirect light between a connector connected to a printed optical board (POB) via an optical waveguide, and a photonic integrated circuit (PIC), the interface involving two-dimensionally distributed waveplates (TDWs) having multiple layers of p-doped and n-doped silicon, the TDWs configured to be driven to change a dielectric constant at a two dimensional location on the TDWs such that the received light is redirected at the two dimensional location.

Abstract: A pixel circuit is disclosed. The pixel circuit includes a photodiode (PD), a transmission circuit, a reset circuit, a signal storage circuit and a buffer circuit. The transmission circuit is coupled between the PD and an ordinary floating diffusion (FD) node. The reset circuit is coupled to the ordinary FD node. The signal storage circuit is coupled to the ordinary FD node. The buffer circuit is coupled to the ordinary FD node. The signal storage circuit may store a PD signal on a specific node having a reduced leakage path in comparison with the ordinary FD node during a holding phase of the pixel circuit, wherein the holding phase is a time interval starting from a first time point at which the PD signal is stored on the specific node and ending at a second time point at which the pixel circuit is selected for performing a read-out operation.

Abstract: Example implementations described herein are directed to a system involving one or more photonic integrated circuits having multi-mode waveguides and connected to a printed optical board through the use of multi-mode waveguide connectors described herein. The printed optical board can include an embedded multi-mode waveguide bus to facilitate optical signal to and from the photonic integrated circuits. The system can also include a chiplet such as a photonic integrated circuit with a single mode waveguide configured to connect to an optical fiber cable.

Abstract: A pixel circuit includes a front-end circuit, a signal storage circuit, and an output circuit. All of the front-end circuit, the signal storage circuit and the output circuit are coupled to a common floating diffusion (FD) node. The front-end circuit is arranged to generate pixel signals. The signal storage circuit is arranged to store the pixel signals generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the pixel signals stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage of the signal storage circuit. When the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to voltage levels of the common FD node, respectively.

Abstract: A display apparatus includes a display panel supported within a case having a rear surface including a circular recessed portion. An annular total reflection mirror and an annular half mirror are disposed in the circular recessed portion with an annular light source provided therebetween. A pattern forming member is disposed on an outer side of the annular half mirror and is configured to be reflected by the annular total reflection mirror. A pattern light source is configured to supply light to the pattern forming member so that the pattern is reflected on the annular total reflection mirror. When the annular light source and the pattern light source are turned on, the pattern of the pattern forming member is reflected between the annular total reflection mirror and the annular half mirror.

Abstract: A display apparatus includes a display panel supported within a case having a rear surface including a circular recessed portion. An annular total reflection mirror and an annular half mirror are disposed in the circular recessed portion with an annular light source provided therebetween. A pattern forming member is disposed on an outer side of the annular half mirror and is configured to be reflected by the annular total reflection mirror. A pattern light source is configured to supply light to the pattern forming member so that the pattern is reflected on the annular total reflection mirror. When the annular light source and the pattern light source are turned on, the pattern of the pattern forming member is reflected between the annular total reflection mirror and the annular half mirror.

Abstract: A method for modeling gas production in a coalbed methane gas (CBM) reservoir including (a) dividing a reservoir in a CBM development area into three-dimensional grids to form the three-dimensional grids having a plurality of cells; (b) forming at least one drilling hole in the development area and obtaining a sample for each depth in the reservoir; (c) modeling the amounts of ash, water, and gas for the plurality of cells in the three-dimensional grids; (d) modeling a pressure change over time in each of the cells in the grid under a premise in which a production well is formed in the grids; and (e) performing a Langmuir experiment for a core sample obtained from step (b).

Abstract: An integrated circuit chip includes a plurality of function blocks; a mode controller configured to convert an input signal, received from an external device through an input/output pin, into an input pattern and test mode setting data which include a plurality of bits, and to output the test mode setting data and a mode switching enable signal when a secure pattern generated therein is the same as the input pattern; and a mode setting module configured to control the plurality of function blocks to operate in a test mode according to the mode setting data, in response to the test mode switching enable signal.

Abstract: A pixel circuit is disclosed. The pixel circuit includes a photodiode (PD), a transmission circuit, a reset circuit, a signal storage circuit and a buffer circuit. The transmission circuit is coupled between the PD and an ordinary floating diffusion (FD) node. The reset circuit is coupled to the ordinary FD node. The signal storage circuit is coupled to the ordinary FD node. The buffer circuit is coupled to the signal storage circuit. The signal storage circuit may store a PD signal on a specific node having a reduced leakage path in comparison with the ordinary FD node during a holding phase of the pixel circuit, wherein the holding phase is a time interval starting from a first time point at which the PD signal is stored on the specific node and ending at a second time point at which the pixel circuit is selected for performing a read-out operation.

Abstract: A pixel circuit includes a front-end circuit, a signal storage circuit, and an output circuit. The signal storage circuit is coupled to the front-end circuit, and the output circuit is coupled to the signal storage circuit. The front-end circuit is arranged to generate pixel signals. The signal storage circuit is arranged to store the pixel signals generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the pixel signals stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage. When the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to the other voltage levels, respectively.

Abstract: A pixel circuit includes a front-end circuit, a signal storage circuit, and an output circuit. All of the front-end circuit, the signal storage circuit and the output circuit are coupled to a common floating diffusion (FD) node. The front-end circuit is arranged to generate pixel signals. The signal storage circuit is arranged to store the pixel signals generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the pixel signals stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage of the signal storage circuit. When the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to voltage levels of the common FD node, respectively.

Abstract: A pixel circuit is disclosed. The pixel circuit includes a photodiode (PD), a transmission circuit, a reset circuit, a signal storage circuit and a buffer circuit. The transmission circuit is coupled between the PD and an ordinary floating diffusion (FD) node. The reset circuit is coupled to the ordinary FD node. The signal storage circuit is coupled to the ordinary FD node. The buffer circuit is coupled to the ordinary FD node. The signal storage circuit may store a PD signal on a specific node having a reduced leakage path in comparison with the ordinary FD node during a holding phase of the pixel circuit, wherein the holding phase is a time interval starting from a first time point at which the PD signal is stored on the specific node and ending at a second time point at which the pixel circuit is selected for performing a read-out operation.

Abstract: A pixel circuit includes a front-end circuit, a signal storage circuit, and an output circuit. The signal storage circuit is coupled to the front-end circuit, and the output circuit is coupled to the signal storage circuit. The front-end circuit is arranged to generate pixel signals. The signal storage circuit is arranged to store the pixel signals generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the pixel signals stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage. When the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to the other voltage levels, respectively.

Abstract: A pixel circuit is disclosed. The pixel circuit includes a photodiode (PD), a transmission circuit, a reset circuit, a signal storage circuit and a buffer circuit. The transmission circuit is coupled between the PD and an ordinary floating diffusion (FD) node. The reset circuit is coupled to the ordinary FD node. The signal storage circuit is coupled to the ordinary FD node. The buffer circuit is coupled to the signal storage circuit. The signal storage circuit may store a PD signal on a specific node having a reduced leakage path in comparison with the ordinary FD node during a holding phase of the pixel circuit, wherein the holding phase is a time interval starting from a first time point at which the PD signal is stored on the specific node and ending at a second time point at which the pixel circuit is selected for performing a read-out operation.

Abstract: An in-situ X-ray analyzed coin cell battery includes a case, a cap combined with the case, and an energy storage member provided between the case and the cap. A hole through which an X-ray is irradiated is defined in at least one of the case and the cap.

Abstract: A lithium battery includes an anode, a cathode, and a protective film disposed on at least one of the anode and the cathode, in which the protective film includes a compound including: i) at least one element selected from a Group 13 element, a Group 14 element, a Group 15 element, and a first Group 16 element; and ii) a second Group 16 element, in which the first Group 16 element is different from the second Group 16 element.

Abstract: Methods, systems, and devices are provided for inquiring and storing Indicator of Compromise (IoC) information. In one example, a method of inquiring and storing IoC information can include determining a target IoC information to be identified when an event occurs, requesting an encryption socket communication module of a first user terminal to request the target IoC information from an IoC information providing server, requesting a P2P socket communication module of the first user terminal to request the target IoC information from a P2P socket communication module of at least one other user terminal, and storing the target IoC information that is received first from either the IoC information providing server or the P2P socket communication module of the at least one other user terminal.

Abstract: A query is parsed and positions of symbols of the query are determined. A parse tree including the positions of the symbols is generated based on the parsed query. The parse tree is sent to a DBMS optimizer. The parse tree is transformed into an optimizer tree. The optimizer tree includes the positions of the symbols of the query. Based on the optimizer tree, a query execution plan is generated for the execution of the query. The positions of the symbols of the query is copied from the optimizer tree into the query execution plan. The query execution plan is sent to a query execution engine. The query is executed in accordance with the query execution plan. When a runtime error is detected, an exception message associated with the runtime error is displayed. The error message includes an error code and the positions of the symbols of the query.

Abstract: The method of inquiring and storing IoC information of the present disclosure is performed by at least one user terminal in an environment including a plurality of user terminals and an IoC information providing server. The user terminals are respectively provided with an event processing module, an IoC inquiry agent module, an encryption socket communication module and a P2P socket communication module.