Patents by Inventor Kimihiro Matsuse
Kimihiro Matsuse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20210343560Abstract: An apparatus and method for real-time sensing of properties in industrial manufacturing equipment are described. The sensing system includes first plural sensors mounted within a processing environment of a semiconductor device manufacturing system, wherein each sensor is assigned to a different region to monitor a physical or chemical property of the assigned region of the manufacturing system, and a reader system having componentry configured to simultaneously and wirelessly interrogate the plural sensors. The reader system uses a single high frequency interrogation sequence that includes (1) transmitting a first request pulse signal to the first plural sensors, the first request pulse signal being associated with a first frequency band, and (2) receiving uniquely identifiable response signals from the first plural sensors that provide real-time monitoring of variations in the physical or chemical property at each assigned region of the system.Type: ApplicationFiled: July 16, 2021Publication date: November 4, 2021Applicant: Tokyo Electron LimitedInventors: Sylvain Ballandras, Thierry Laroche, Kimihiro Matsuse, Jacques Berg, Tomohide Minami
-
Patent number: 11114321Abstract: An apparatus and method for real-time sensing of properties in industrial manufacturing equipment are described. The sensing system includes first plural sensors mounted within a processing environment of a semiconductor device manufacturing system, wherein each sensor is assigned to a different region to monitor a physical or chemical property of the assigned region of the manufacturing system, and a reader system having componentry configured to simultaneously and wirelessly interrogate the plural sensors. The reader system uses a single high frequency interrogation sequence that includes (1) transmitting a first request pulse signal to the first plural sensors, the first request pulse signal being associated with a first frequency band, and (2) receiving uniquely identifiable response signals from the first plural sensors that provide real-time monitoring of variations in the physical or chemical property at each assigned region of the system.Type: GrantFiled: August 17, 2018Date of Patent: September 7, 2021Assignee: Tokyo Electron LimitedInventors: Sylvain Ballandras, Thierry Laroche, Kimihiro Matsuse, Jacques Berg, Tomohide Minami
-
Publication number: 20190057887Abstract: An apparatus and method for real-time sensing of properties in industrial manufacturing equipment are described. The sensing system includes first plural sensors mounted within a processing environment of a semiconductor device manufacturing system, wherein each sensor is assigned to a different region to monitor a physical or chemical property of the assigned region of the manufacturing system, and a reader system having componentry configured to simultaneously and wirelessly interrogate the plural sensors. The reader system uses a single high frequency interrogation sequence that includes (1) transmitting a first request pulse signal to the first plural sensors, the first request pulse signal being associated with a first frequency band, and (2) receiving uniquely identifiable response signals from the first plural sensors that provide real-time monitoring of variations in the physical or chemical property at each assigned region of the system.Type: ApplicationFiled: August 17, 2018Publication date: February 21, 2019Inventors: Sylvain Ballandras, Thierry Laroche, Kimihiro Matsuse, Jacques Berg, Tomohide Minami
-
Patent number: 7829144Abstract: A method of forming a refractory metal film doped with III or V group elements. The first process gas is supplied from a first gas source through a first gas introducing member to and through a gas supply mechanism toward a substrate within a processing vessel. The second process gas is supplied from a second gas source through a second gas introducing member to and through the gas supply mechanism toward the substrate within the processing vessel. The processing vessel is purged by evacuating the processing vessel by an evacuating mechanism, while supplying the inert gas from a third source through a third gas introducing member to and through the gas supply mechanism into the processing vessel.Type: GrantFiled: January 11, 2005Date of Patent: November 9, 2010Assignee: Tokyo Electron LimitedInventors: Kimihiro Matsuse, Hayashi Otsuki
-
Patent number: 7153773Abstract: A TiSiN film is used as a barrier metal layer for a semiconductor device to prevent the diffusion of Cu. The TiSiN film is formed by a plasma CVD process or a thermal CVD process. TiCl4 gas, a silicon hydride gas and NH3 gas are used as source gases for forming the TiSiN film by the thermal CVD process. TiCl4 gas, a silicon hydride gas, H2 gas and N2 gas are used as source gases for forming a TiSiN film by the plasma CVD process.Type: GrantFiled: June 17, 2004Date of Patent: December 26, 2006Assignee: Tokyo Electron LimitedInventors: Hayashi Otsuki, Kunihiro Tada, Kimihiro Matsuse
-
Publication number: 20050191803Abstract: A method of forming a refractory metal film doped with III or V group elements. The first process gas is supplied from a first gas source through a first gas introducing member to and through a gas supply mechanism toward a substrate within a processing vessel. The second process gas is supplied from a second gas source through a second gas introducing member to and through the gas supply mechanism toward the substrate within the processing vessel. The processing vessel is purged by evacuating the processing vessel by an evacuating mechanism, while supplying the inert gas from a third source through a third gas introducing member to and through the gas supply mechanism into the processing vessel.Type: ApplicationFiled: January 11, 2005Publication date: September 1, 2005Applicant: TOKYO ELECTRON LIMITEDInventors: Kimihiro Matsuse, Hayashi Otsuki
-
Patent number: 6919273Abstract: A TiSiN film is used as a barrier metal layer for a semiconductor device to prevent the diffusion of Cu. The TiSiN film is formed by a plasma CVD process or a thermal CVD process. TiCl4 gas, a silicon hydride gas and NH3 gas are used as source gases for forming the TiSiN film by the thermal CVD process. TiCl4 gas, a silicon hydride gas, H2 gas and N2 gas are used as source gases for forming a TiSiN film by the plasma CVD process.Type: GrantFiled: December 9, 1999Date of Patent: July 19, 2005Assignee: Tokyo Electron LimitedInventors: Hayashi Otsuki, Kunihiro Tada, Kimihiro Matsuse
-
Patent number: 6861356Abstract: There is provided a method of forming a barrier metal which is designed to be interposed between a metal layer and an insulating layer, both constituting a multi-layered structure of semiconductor device, the method comprising the steps of positioning a substrate having the insulating layer formed thereon at a predetermined position inside a processing vessel forming a processing space, and alternately introducing a gas containing a refractory metallic atom, a gas containing Si atom and a gas containing N atom into the processing vessel under a predetermined processing pressure, thereby allowing a refractory metal nitride or a refractory metal silicon nitride to be deposited on the insulating layer by way of atomic layer deposition.Type: GrantFiled: August 22, 2002Date of Patent: March 1, 2005Assignee: Tokyo Electron LimitedInventors: Kimihiro Matsuse, Hayashi Otsuki
-
Patent number: 6838376Abstract: A method of forming a barrier metal film formed of a nitride film including tungsten by thermal CVD. The method includes positioning a substrate in a processing vessel and forming a WSi film on one side of the substrate by supplying a process gas including WF6 gas and at least one of SiR4 gas, SiH2Cl2 gas and Si2H6 gas into the processing vessel while a processing pressure in the processing vessel is maintained. The method also includes shutting off the supplying of the process gas into the processing vessel and completely removing the process gas from the processing vessel by supplying a purging gas into the processing vessel after the shutting off the supplying. The WSi film is nitrided by supplying NH3 gas or MMH gas into the processing vessel from which the process gas has been removed, to form a WSixNy film.Type: GrantFiled: November 5, 1998Date of Patent: January 4, 2005Assignee: Tokyo Electron LimitedInventors: Kimihiro Matsuse, Hayashi Otsuki
-
Publication number: 20040232467Abstract: A TiSiN film is used as a barrier metal layer for a semiconductor device to prevent the diffusion of Cu. The TiSiN film is formed by a plasma CVD process or a thermal CVD process. TiCl4 gas, a silicon hydride gas and NH3 gas are used as source gases for forming the TiSiN film by the thermal CVD process. TiCl4 gas, a silicon hydride gas, H2 gas and N2 gas are used as source gases for forming a TiSiN film by the plasma CVD process.Type: ApplicationFiled: June 17, 2004Publication date: November 25, 2004Inventors: Hayashi Otsuki, Kunihiro Tada, Kimihiro Matsuse
-
Patent number: 6576062Abstract: A film forming apparatus and method of the present invention include a substrate holding section for holding a plurality of substrates in a plane within a chamber, first and second process gas discharge sections provided opposite to the substrate holding section to discharge first and second process gases, a rotation mechanism for rotating the substrate holder, and a heater for heating the substrates. While the substrates are rotating as the substrate holding section rotates, the substrate holding section, first and second mono atomic layers are alternately stacked on the corresponding substrates. A compound film is therefore formed through a reaction involved under heating.Type: GrantFiled: January 3, 2001Date of Patent: June 10, 2003Assignee: Tokyo Electron LimitedInventor: Kimihiro Matsuse
-
Publication number: 20030034560Abstract: A wiring structure of a semiconductor device according to the present invention comprises a first conducting layer for electrically connecting with a semiconductor element or a wiring element formed on a semiconductor substrate, a barrier metal formed on the first conducting layer, and a second conducting layer formed on the barrier metal, for electrically connecting with the first conducting layer via the barrier metal, in which the barrier metal is formed of WNx (tungsten nitride) or WSixNy (tungsten silicide nitride).Type: ApplicationFiled: May 5, 2000Publication date: February 20, 2003Inventors: KIMIHIRO MATSUSE, HAYASHI OTSUKI
-
Publication number: 20020197856Abstract: There is provided a method of forming a barrier metal which is designed to be interposed between a metal layer and an insulating layer, both constituting a multi-layered structure of semiconductor device, the method comprising the steps of positioning a substrate having the insulating layer formed thereon at a predetermined position inside a processing vessel forming a processing space, and alternately introducing a gas containing a refractory metallic atom, a gas containing Si atom and a gas containing N atom into the processing vessel under a predetermined processing pressure, thereby allowing a refractory metal nitride or a refractory metal silicon nitride to be deposited on the insulating layer by way of atomic layer deposition.Type: ApplicationFiled: August 22, 2002Publication date: December 26, 2002Inventors: Kimihiro Matsuse, Hayashi Otsuki
-
Patent number: 6489208Abstract: A method of forming a gate electrode of a multi-layer structure includes a step of supplying a processing gas for poly-crystal film formation and impurities of a P-type into a film formation device, to form a poly-crystal silicon layer doped with P-type impurities, on a surface of a gate film target, a step of maintaining the processing target in the film formation device to prevent formation of an oxide film on the poly-crystal silicon layer; and a step of supplying a processing gas for tungsten silicide film formation and impurities of a P-type into the film formation device, to form a tungsten silicide layer doped with impurities of P-type impurities, on the poly-crystal silicon layer on which no oxide film is formed.Type: GrantFiled: January 11, 2002Date of Patent: December 3, 2002Assignee: Tokyo Electron LimitedInventors: Masato Koizumi, Kazuya Okubo, Tsuyoshi Takahashi, Tsuyoshi Hashimoto, Kimihiro Matsuse
-
Patent number: 6454909Abstract: A processing apparatus includes a processing chamber, a support mechanism provided in the processing chamber to support a wafer having an underlying film formed on a major surface and adjacent side face, and a supply member provided at the processing chamber and spaced from the support mechanism, to supply an incoming gas into the processing chamber. A gas carrying mechanism is provided for selectively sending a film forming gas and etching gas to the gas supply member. A main film is formed on a portion of an underlying film formed on the wafer supported on the support mechanism, by using the film forming gas supplied from the gas supply member. A portion of the underlying film, which is exposed, not covered with the main film, is etched away by the etching gas supplied from the gas supplied member.Type: GrantFiled: July 6, 2000Date of Patent: September 24, 2002Assignee: Tokyo Electron LimitedInventors: Kimihiro Matsuse, Sakae Nakatsuka, Kentaro Oshimo
-
Patent number: 6404021Abstract: A method of forming a gate electrode of a multi-layer structure includes a step of supplying a processing gas for poly-crystal film formation and impurities of a P-type into a film formation device, to form a poly-crystal silicon layer doped with P-type impurities, on a surface of a gate film target, a step of maintaining the processing target in the film formation device to prevent formation of an oxide film might not be formed on the poly-crystal silicon layer, and a step of supplying a processing gas for tungsten silicide film formation and impurities of a P-type into the film formation device, to form a tungsten silicide layer doped with impurities of P-type impurities, on the poly-crystal silicon layer on which no oxide film is formed.Type: GrantFiled: February 13, 1998Date of Patent: June 11, 2002Assignee: Tokyo Electron LimitedInventors: Masato Koizumi, Kazuya Okubo, Tsuyoshi Takahashi, Tsuyoshi Hashimoto, Kimihiro Matsuse
-
Publication number: 20020058384Abstract: A method of forming a gate electrode of a multi-layer structure comprises a step of supplying a processing gas for poly-crystal film formation and impurities of a P-type into a film formation device, to form a poly-crystal silicon layer doped with P-type impurities, on a surface of a gate film target, a step of maintaining the processing target in the film formation device to prevent formation of no oxide film might not be formed on the poly-crystal silicon layer, and a step of supplying a processing gas for tungsten silicide film formation and impurities of a P-type into the film formation device, to form a tungsten silicide layer doped with impurities of P-type impurities, on the poly-crystal silicon layer on which no oxide film is formed.Type: ApplicationFiled: January 11, 2002Publication date: May 16, 2002Inventors: Masato Koizumi, Kazuya Okubo, Tsuyoshi Takahashi, Tsuyoshi Hashimoto, Kimihiro Matsuse
-
Publication number: 20010007244Abstract: A film forming apparatus and method of the present invention include a substrate holding section for holding a plurality of substrates in a plane within a chamber, first and second process gas discharge sections provided opposite to the substrate holding section to discharge first and second process gases, a rotation mechanism for rotating the substrate holder, and a heater for heating the substrates. While the substrates are rotating as the substrate holding section rotates, the substrate holding section, first and second mono atomic layers are alternately stacked on the corresponding substrates. A compound film is therefore formed through a reaction involved under heating.Type: ApplicationFiled: January 3, 2001Publication date: July 12, 2001Inventor: Kimihiro Matsuse
-
Patent number: 6251188Abstract: Pre-coating films are formed in a pretreatment by supplying first film-forming gases into a process chamber of a process vessel while heating the process chamber so as to form a first pre-coating film on the inner surface of the process vessel exposed to the process chamber, followed by supplying second film-forming gases into the process chamber to form a second pre-coating film on the first pre-coating film. A semiconductor wafer is loaded into the process chamber. Then, the first gases are supplied into the process chamber while heating the process chamber so as to form a first layer on the wafer, followed by supplying the second gases into the process chamber so as to form a second layer on the first layer. A silane gas is supplied into the process chamber to permit silicon material to be deposited on the surface of the second layer stacked on the first layer. Finally, the wafer having the first and second multi-film is unloaded out of the process vessel.Type: GrantFiled: December 29, 1999Date of Patent: June 26, 2001Assignee: Tokyo Electron LimitedInventors: Tsuyoshi Hashimoto, Kimihiro Matsuse, Kazuya Okubo, Tsuyoshi Takahashi
-
Patent number: 6251191Abstract: One of the disclosed processing apparatus includes a processing vessel having an inner processing space defined by a ceiling portion, a bottom portion, and side walls and capable of being evacuated to a predetermined vacuum, a mounting table which has a first mounting surface for mounting the object thereon and a second mounting surface facing an opposite side to which the first mounting surface faces, which is supported by the ceiling portion of the processing vessel, and which extends toward the bottom portion of the processing vessel in such a way that the first and second mounting surfaces face the side walls of the processing vessel, a process gas supply mechanism, for supplying a process gas to the inner processing space, and a loading/unloading portion having an opening formed in the bottom portion of the processing vessel and an open/close device for opening/closing the opening, for loading/unloading the object into/from the processing vessel.Type: GrantFiled: November 13, 1998Date of Patent: June 26, 2001Assignee: Tokyo Electron LimitedInventor: Kimihiro Matsuse