Abstract: A plasma display panel includes a front plate, and a rear plate disposed oppositely to the front plate and having barrier ribs to partition a discharge cell between the front plate and the rear plate. The front plate has a first electrode and a second electrode in parallel with the first electrode inside the discharge cell. The first electrode includes a first bus electrode, and a plurality of first transparent electrodes electrically connected to the first bus electrode and protruding toward a second-electrode side. The second electrode includes a second bus electrode, and a plurality of second transparent electrodes electrically connected to the second bus electrode and protruding toward a first-electrode side. A discharge gap is provided between tips of the plurality of first transparent electrodes and tips of the plurality of second transparent electrodes.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for covering the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A display panel device includes a plurality of row electrode pairs and a plurality of column electrodes. Each row electrode pair includes a first and second electrodes. Unit light emission areas are formed at intersections of the row electrode pairs and the column electrodes. Each unit light emission area includes a first discharge cell and a second discharge cell. The second discharge cell includes a light-absorbing layer and secondary electron emission material layer. When driving the display panel device, sustain discharge responsible for light emission governing the display image is induced in the first discharge cells, whereas reset discharge and address discharge accompanied by light emission not contributing to the display image is induced in the second discharge cells.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: An object of the present invention is to provide a high definition PDP screen without lowering the PDP luminescence efficiency. The display panel is provided with a plurality of cells that are arranged in a matrix, each of the plurality of cells emitting a different unique luminescent color; wherein a plurality of cells each bearing first luminescent color are disposed on every other line in a vertical direction, and a line of cells each having second luminescent color and a line of cells each having third luminescent color are alternated with a line of said plurality of cells having first luminescent color respectively therebetween.

Abstract: A projecting electrode of each of row electrodes constituting a row electrode pair faces a discharge cell and has a resistance value between 0.05 to 1.0 times inductance of a discharge space during discharge peak current occurring in the discharge cell by discharge that is produced between the row electrodes of the row electrode pair.

Abstract: A plasma display panel includes: a plurality of row electrode pairs (X, Y) provided on a front glass substrate (10); a protective layer (12) on the front glass substrate (10); and a plurality of column electrodes (D) provided in a back substrate (13) at intersections with the row electrode pairs (X, Y) to form discharge cells (C) in the discharge space (S). An ultraviolet region light emissive layer (17) having persistence characteristics allowing continuous emission of ultraviolet light as a result of excitation by ultraviolet rays having 0.1 msec or more of a wavelength is provided at a site facing each discharge cell (C) between the front glass substrate (10) and the back glass substrate (13).

Abstract: A display device capable of preventing erroneous discharge and improving the quality of display. The display panel has a unit light-emitting area formed at the intersection of row and column electrodes which is structured by a first discharge cell and a second discharge cell having a light absorbing layer at a side close to a front substrate and a secondary-electron emitting material layer at a side close to a back substrate. While applying a scanning pulse having a polarity to place the column electrode in low potential to one row electrode of a row electrode pair, a pixel data pulse having a voltage commensurate with pixel data is applied to the column electrode, thereby selectively causing address discharge within the second discharge cell.

Abstract: A plasma display panel comprises a plurality of row electrode pairs (X, Y) provided on a front glass substrate 10, a plurality of column electrodes D provided on a back glass substrate 13 and each intersecting the row electrode pairs, and discharge cells C which are defined in a discharge space S to correspond to the respective intersections. The row electrode Y of each row electrode pair (X, Y) has transparent electrodes Ya each constructed by a leading member Ya1 and a base member Ya2. The column electrode D is provided with enlargement members Da, having a width in a row direction larger than that of the base member Ya2, in a position opposite to the leading member Ya1.

Abstract: A display panel device includes a plurality of row electrode pairs and a plurality of column electrodes. Each row electrode pair includes a first and second electrodes. Unit light emission areas are formed at intersections of the row electrode pairs and the column electrodes. Each unit light emission area includes a first discharge cell and a second discharge cell. The second discharge cell includes a light-absorbing layer and secondary electron emission material layer. When driving the display panel device, sustain discharge responsible for light emission governing the display image is induced in the first discharge cells, whereas reset discharge and address discharge accompanied by light emission not contributing to the display image is induced in the second discharge cells.

Abstract: Each of partition walls 25 comprises vertical walls 25a each positioned between adjacent discharge cells C1 in the row direction and extending in the column direction to form a partition between the adjacent discharge cells C1, and transverse walls 25b bridging the vertical walls 25a to define a top and bottom edge of the discharge cells C1. Each of the transverse walls 25b of the partition wall 25 is provided in a shape that its central part j1 located midway between adjacent vertical walls 25a protrudes beyond its part j2 coupled to the vertical wall 25a toward the outside of the discharge cell C1 in the column direction.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel includes a front glass substrate 1 having the back surface on which a plurality of pairs of row electrodes X1, Y1 are formed, a back glass substrate 4 on which column electrodes D are formed, and partition walls 6 made of dielectric materials and defining individual discharge cells C, in which at least either of the row electrodes X1 and Y1 is placed at a position shifted relatively in the column direction toward decreasing the overlapping of the row electrode and the partition wall in reference to the partition wall 6.

Abstract: A plasma display panel includes a plurality of row electrode pairs (X, Y) forming display lines which are formed on a front glass substrate (10). Each row electrode (X, Y) of the row electrode pair (X, Y) makes up transparent electrodes (Xa, Ya) each formed opposing the corresponding transparent electrode (Xa, Ya) via a discharge gap (g) for each pair, and a bus electrode (Xb, Yb) connected to the transparent electrodes (Xa, Ya). In such plasma display panel, a light-shield layer 20A is formed at least on a portion between the two bus electrodes situated back to back and a required portion in proximal to sides of the bus electrodes (Xb, Yb) connected to the transparent electrodes (Xa, Ya) on the front glass substrate (10).

Abstract: Each of partition walls of a plasma display panel has a pair of transverse walls which are disposed in parallel with each other having a space equal to a width of a discharge cell in the column direction, and vertical walls which are disposed between the pair of vertical walls in parallel with each other having a space equal to a width of the discharge cell in the row direction and which are integrally coupled to the pair of transverse walls. Each partition wall defines discharge cells in each line of the plasma display panel, and is formed such that a width of a portion of the transverse wall situated between the adjacent vertical walls is larger than a width of a portion of the transverse wall coupled to the vertical wall.

Abstract: A surface discharge type plasma display panel has a dielectric layer facing to a discharge gas space and a pair of sustaining electrodes embedded in the dielectric layer and disposed apart from each other by a discharge gap on one of the substrates spaced parallel to each other at the discharge gas space. The dielectric layer includes a pair of first thickness portions formed on far ends of the electrodes from the discharge gap respectively which are larger than a second thickness portion on facing near ends of the facing electrodes. The dielectric layer is provided with a depth from its surface to the substrate larger than that on the second thickness portion between adjacent the electrodes. This plasma display panel prevents any useless expansion of the surface discharge over the sustaining electrodes.