Patents by Inventor Kimio Nakamura

Kimio Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180358320
    Abstract: An electronic device includes a first electronic part that includes a first terminal, a second electronic part disposed to be opposed to the first electronic part, the second electronic part that includes a second terminal including a first end part in contact with the first terminal and a second end part located on an outside of the first terminal, and an adhesive disposed between the first electronic part and the second electronic part, the adhesive maintaining the contact between the first terminal and the first end part by bonding the first electronic part and the second electronic part to each other.
    Type: Application
    Filed: June 4, 2018
    Publication date: December 13, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Kimio Nakamura, NAOKI ISHIKAWA, Hiroshi Kobayashi, Shuichi Takeuchi
  • Publication number: 20170357063
    Abstract: An optical module includes a substrate with a through-hole formed therein, an optical element member that includes a light receiving or emitting part that receives light or emits light at a position on a surface that is opposite to the substrate, the position corresponding to the through-hole, and a post that is formed of a transparent material, covers the light receiving or emitting part and is inserted into the through-hole.
    Type: Application
    Filed: April 14, 2017
    Publication date: December 14, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Shuichi Takeuchi, NAOKI ISHIKAWA, TAKATOYO YAMAKAMI, Kimio Nakamura, Hiroshi Kobayashi, TETSUYA TAKAHASHI
  • Publication number: 20170020000
    Abstract: A component-mounted board includes: a substrate; an electronic component disposed over the substrate; and a conductive via formed in the substrate to be in contact with a bottom surface and a side surface of an electrode of the electronic component in a state where the electronic component is disposed over the substrate.
    Type: Application
    Filed: July 11, 2016
    Publication date: January 19, 2017
    Applicant: FUJITSU LIMITED
    Inventors: TAKATOYO YAMAKAMI, Naoki Ishikawa, Kimio Nakamura, Kenji Iida, Hiromitsu Kobayashi, Kei Fukui
  • Publication number: 20160372441
    Abstract: A semiconductor device includes: a board; a semiconductor chip that is not joined to the board; a wire whose one end is coupled with the semiconductor chip and whose other end is coupled with the board; and a first cover member that covers a first wire coupling portion in which the wire is coupled with the semiconductor chip.
    Type: Application
    Filed: May 24, 2016
    Publication date: December 22, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Kobayashi, Naoki Ishikawa, Shuichi Takeuchi, Takatoyo Yamakami, Kimio Nakamura, Tetsuya Takahashi
  • Patent number: 9391031
    Abstract: A method for manufacturing an electronic device, the method includes: applying an adhesive film on a package board; placing an electronic component on the package board with a bump therebetween; applying a first load to the electronic component while heating the electronic component to a first temperature higher than a reaction start temperature of the adhesive film and lower than a melting point of the bump; reducing the first load to a second load lower than the first load while maintaining the first temperature; and heating the electronic component to a second temperature higher than or equal to the melting point of the bump while maintaining the second load.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: July 12, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Tetsuya Takahashi, Yasuo Moriya, Kimio Nakamura
  • Publication number: 20140084491
    Abstract: A method for manufacturing an electronic device, the method includes: applying an adhesive film on a package board; placing an electronic component on the package board with a bump therebetween; applying a first load to the electronic component while heating the electronic component to a first temperature higher than a reaction start temperature of the adhesive film and lower than a melting point of the bump; reducing the first load to a second load lower than the first load while maintaining the first temperature; and heating the electronic component to a second temperature higher than or equal to the melting point of the bump while maintaining the second load.
    Type: Application
    Filed: June 20, 2013
    Publication date: March 27, 2014
    Inventors: Tetsuya TAKAHASHI, Yasuo MORIYA, Kimio NAKAMURA
  • Patent number: 8679654
    Abstract: Surface flatness of magnetic recording medium to which a magnetic recording layer made of L10 FePt magnetic alloy thin film, with distance between a magnetic head and a magnetic recording medium sufficiently reduced. The magnetic recording layer includes: magnetic layers containing a magnetic alloy including Fe and Pt as principal materials; and one non-magnetic material selected from carbon, oxide and nitride. The first magnetic layer disposed closer to a substrate has a granular structure in which magnetic alloy grains including FePt alloy as the principal material are separated from grain boundaries including the non-magnetic material as the principal material. The second magnetic layer disposed closer to the surface than the first magnetic layer is fabricated so as to have a homogeneous structure in which an FePt alloy and the non-magnetic material are mixed in a state finer than diameters of the FePt magnetic alloy grains in the first magnetic layer.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: March 25, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Hiroaki Nemoto, Ikuko Takekuma, Kimio Nakamura, Junichi Sayama
  • Publication number: 20130255878
    Abstract: A printed circuit board manufacturing method includes: supporting a substrate on a support member; disposing a semiconductor chip on an opposite side of the substrate from the support member and pressing the semiconductor chip against the substrate with a pressing member; and employing as the support member a member formed with a cavity larger than an external profile of the semiconductor chip and formed with a sloping portion towards the center of a bottom face of the cavity.
    Type: Application
    Filed: March 12, 2013
    Publication date: October 3, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuya TAKAHASHI, Yasuo Moriya, Kimio Nakamura
  • Publication number: 20130249087
    Abstract: An electronic component includes a package substrate, a plurality of conductive pads, an insulating material and a semiconductor device. The plurality of conductive pads is disposed on the package substrate. The insulating material is disposed between the plurality of conductive pads. The insulating material includes a top surface located on an identical plane to an upper surface of the plurality of conductive pads. The semiconductor device includes a conductive bump aligned on a corresponding conductive pad of the plurality of conductive pads.
    Type: Application
    Filed: April 22, 2013
    Publication date: September 26, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Kimio Nakamura, Takayoshi Matsumura, Yoshiyuki Satoh, Kuniko Ishikawa, Kenji Kobae
  • Patent number: 8381963
    Abstract: A compression-bonding apparatus includes a support stage and a pressing tool. The pressing tool includes a pressing stage, an elastic member and a plurality of bonding heads. The elastic member is held by the pressing stage. The plurality of bonding heads includes an upper surface attached to the elastic member and a lower surface facing an upper surface of the support stage.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: February 26, 2013
    Assignee: Fujitsu Limited
    Inventors: Kimio Nakamura, Yoshiyuki Satoh, Kenji Kobae
  • Patent number: 8355310
    Abstract: To solve the problem of deterioration in recording quality due to a change of a write waveform caused by changes of temperature and recording powers, aged deterioration and the like. A driver having a function of controlling rise/fall times and an overshoot amount of an optical waveform is used to optimize an optical waveform that changes in recording under the influence of a component of a laser and the like. Specifically, the rise/fall times and the overshoot amount of the optical waveform are optimized by obtaining a waveform control register value from test recording or a table.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: January 15, 2013
    Assignees: Hitachi Consumer Electronics Co., Ltd., Hitachi-LG Data Storage, Inc.
    Inventors: Koichi Watanabe, Kimio Nakamura
  • Patent number: 8351144
    Abstract: Embodiments of the present invention help to suppress the effects of thermal fluctuation in a thermally assisted magnetic field recording, and improve recording density. According to one embodiment, a recording area of a magnetic disk is heated and the full width at half maximum of an optical power distribution of a near field light generator is controlled to be 100 nm or less. Thereby, the cooling time of the magnetic disk is made 2 nm or less and the effects of thermal fluctuation are suppressed. Moreover, although an incomplete area of the magnetization reversal at the rear end of the magnetic domain is created with rapid cooling, by creating an overshoot at the rising end of the magnetic field waveform of the magnetic recording head, the incomplete area of the magnetization reversal can be overwritten, which is created at the rear end of the magnetic domain previously recorded by the overshoot magnetic field.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: January 8, 2013
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Kimio Nakamura, Fumiko Akagi
  • Publication number: 20120230001
    Abstract: An electronic device includes an interposer, a first chip being mounted on a first surface of the interposer, the first chip having a first surface facing the first surface of the interposer and a second surface opposite to the first surface of the first chip, a second chip being mounted on a second surface of the interposer opposite to the first surface of the interposer, the second chip having a first surface facing the second surface of the interposer and a second surface opposite to the first surface of the second chip, a first metal plate being connected to the second surface of the first chip, a second metal surface being provided over the second surface of the second chip, and a via penetrating through the interposer and connected to the first metal plate and the second metal plate.
    Type: Application
    Filed: January 12, 2012
    Publication date: September 13, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuya TAKAHASHI, Kenji KOBAE, Shuichi TAKEUCHI, Yoshiyuki SATOH, Kimio NAKAMURA
  • Publication number: 20120225325
    Abstract: Surface flatness of magnetic recording medium to which a magnetic recording layer made of L10 FePt magnetic alloy thin film, with distance between a magnetic head and a magnetic recording medium sufficiently reduced. The magnetic recording layer includes: magnetic layers containing a magnetic alloy including Fe and Pt as principal materials; and one non-magnetic material selected from carbon, oxide and nitride. The first magnetic layer disposed closer to a substrate has a granular structure in which magnetic alloy grains including FePt alloy as the principal material are separated from grain boundaries including the non-magnetic material as the principal material. The second magnetic layer disposed closer to the surface than the first magnetic layer is fabricated so as to have a homogeneous structure in which an FePt alloy and the non-magnetic material are mixed in a state finer than diameters of the FePt magnetic alloy grains in the first magnetic layer.
    Type: Application
    Filed: February 13, 2012
    Publication date: September 6, 2012
    Inventors: HIROAKI NEMOTO, Ikuko TAKEKUMA, Kimio NAKAMURA, Junichi SAYAMA
  • Patent number: 8186615
    Abstract: A remote controlled helicopter of a single rotor type to be used indoors, having a flying operation that can be stabilized and operability that can be improved. The helicopter includes a center hub that supports a rotor head to a mainmast, and is divided into an upper center hub and a lower center hub. The upper and the lower center hubs are fixed around the shaft of the mainmast with a predetermined angle. A phase angle of a main rotor as an output with respect to an operation input from a swash plate becomes an acute angle, and the main rotor and a stabilizer are mounted to rotate with a phase difference of the acute angle.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: May 29, 2012
    Assignee: Hirobo Co., Ltd
    Inventors: Takakazu Uebori, Kimio Nakamura
  • Publication number: 20120080220
    Abstract: An electronic device includes a circuit board including a first electrode and a second electrode; and an electronic component including a first terminal and a second terminal, wherein the first electrode includes a first pad portion to which the first terminal is connected and a first protrusion portion disposed in a first direction in parallel with a straight line passing through the first electrode and the second electrode with respect to the first pad portion and being into contact with the first terminal, the second electrode includes a second pad portion to which the second terminal is connected and a second protrusion portion disposed in a second direction opposite to the first direction with respect to the second pad portion and being into contact with the second terminal.
    Type: Application
    Filed: August 2, 2011
    Publication date: April 5, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kimio NAKAMURA, Shuichi TAKEUCHI, Yoshiyuki SATOH, Kenji KOBAE
  • Publication number: 20120052330
    Abstract: A perpendicular magnetic recording medium having sufficient perpendicular uniaxial magnetic anisotropy energy and a crystal grain size for realizing an areal recording density of one terabit or more per one square centimeter, and excellent in mass productivity, and a manufacturing method of the same are provided. On a substrate, a substrate-temperature control layer, an underlayer and a magnetic recording layer are sequentially formed. The magnetic recording layer is formed by repeating a magnetic layer stacking step N times (N?2), which includes a first step of heating the substrate in a heat process chamber, and a second step of depositing, in a deposition process chamber, the magnetic recording layer constituted of an alloy mainly composed of FePt to which at least one kind of non-magnetic material selected from a group constituted of C and an Si oxide is added.
    Type: Application
    Filed: August 22, 2011
    Publication date: March 1, 2012
    Applicant: HITACHI, LTD.
    Inventors: Ikuko TAKEKUMA, Kimio NAKAMURA, Junichi SAYAMA, Hiroaki NEMOTO
  • Publication number: 20110079896
    Abstract: A semiconductor device fabrication method, comprising the steps of: forming a solder portion on an electrode of a substrate on which a semiconductor chip is to be mounted; applying a resin layer onto the substrate to a thickness such that a top region of the solder portion is exposed; curing the resin layer; providing a thermosetting underfill material over a region where the semiconductor chip is to be mounted; placing an electrode of the semiconductor chip face down on the solder portion in such a manner that the electrode faces the solder portion; and heating the underfill material and the solder portion.
    Type: Application
    Filed: September 28, 2010
    Publication date: April 7, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki SATOH, Kenji KOBAE, Kimio NAKAMURA, Takayoshi MATSUMURA, Kuniko ISHIKAWA
  • Patent number: 7898908
    Abstract: To reduce background light generated in a circumference of a scatterer in a head for a thermally assisted magnetic recording device using a scatterer having conductivity as an optical near-field generating element, a coil for generating a magnetic field is placed on a bottom portion of a slider, and an optical near-field generating element is placed in an inside of the coil. At this time, an inner diameter of the coil is set not larger than a wavelength of incident light, an interval between leader lines each for conducting an electric current to the coil is set not larger than a half of the wavelength of the light, and the coil for generating the magnetic field is caused to function as a shield for suppressing the background light.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: March 1, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Takuya Matsumoto, Kimio Nakamura, Yoshio Takahashi
  • Patent number: 7864475
    Abstract: Heating power control is performed in thermally assisted magnetic recording using a patterned recording medium. Trial writing is performed by continuously changing a heating power intensity with respect to a pattern row of a trial writing area provided in plurality on the recording medium. From a reproduction signal thereof, a minimum heating power of recording that is a boundary power between recording and non-recording, and a maximum heating power of recording that is a boundary power between recording and a heating power by which recorded information of an adjacent pattern is deleted are determined to decide an optimum recording power.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: January 4, 2011
    Assignee: Hitachi, Ltd.
    Inventor: Kimio Nakamura