Abstract: According to the present disclosure, a semiconductor manufacturing apparatus comprises a pickup stage having a mechanism for lifting and lowering a semiconductor chip having a square shape. The pickup stage comprises first pushing-up blocks at four corners. Each of the first pushing-up blocks comprises a first side parallel to one side of the semiconductor chip, a second side parallel to another side of the semiconductor chip, and an offset portion formed between the first side and the second side to be offset to an inward side of an intersection point of respective extension lines of the first side and the second side.

Abstract: A semiconductor test apparatus according to the present disclosure includes: a stage on which a wafer is to be mounted; a pressurizing wall disposed on a surface of a probe card opposing the stage, extending toward the stage, and having an opening; a mark disposed on a lower surface of the pressurizing wall opposing the stage; a probe disposed in the opening; an air tube to force air into the opening; a detector to detect first spacing between a tip of the probe and the mark; and a controller to control second spacing between the wafer and the lower surface of the pressurizing wall based on the first spacing, wherein, when an electrical property of each of chips of the wafer is measured, the second spacing is controlled to be predetermined spacing by the controller, and the air is forced into the opening through the air tube.

Abstract: A semiconductor test apparatus according to the present disclosure includes: a stage on which a wafer is to be mounted; a pressurizing wall disposed on a surface of a probe card opposing the stage, extending toward the stage, and having an opening; a mark disposed on a lower surface of the pressurizing wall opposing the stage; a probe disposed in the opening; an air tube to force air into the opening; a detector to detect first spacing between a tip of the probe and the mark; and a controller to control second spacing between the wafer and the lower surface of the pressurizing wall based on the first spacing, wherein, when an electrical property of each of chips of the wafer is measured, the second spacing is controlled to be predetermined spacing by the controller, and the air is forced into the opening through the air tube.

Abstract: An evaluation apparatus includes an insulating plate, a plurality of probes fixed to the insulating plate, an insulating portion having a connection portion connected to the insulating plate in a detachable manner and a tip portion continuous with the connection portion, the tip portion being narrower than the connection portion, an insulator formed by combining the insulating portions to surround the plurality of probes in planar view, and an evaluation unit for passing currents through the plurality of probes to evaluate electrical characteristics of an object to be measured.

Abstract: Provided is a technique capable of preventing occurrence of partial discharge. An evaluation apparatus includes a probe disposed on an undersurface of an upper component; a sidewall part disposed on the undersurface of the upper component and enclosing sides of the probe; and a first gas supplying part. The first gas supplying part is capable of supplying a gas to a to-be-measured object that is placed on a stage when the sidewall part comes in proximity to the stage, and to a space enclosed by the stage, the sidewall part, and the upper component when the sidewall part is in contact with the stage.

Abstract: Provided is a technique for detaching a semiconductor chip from a mount tape without failures in the semiconductor chip, such as cracking and chipping. A semiconductor pick-up apparatus includes the following components: a pick-up stage above which a semiconductor chip is to be placed through a mount tape attached to the lower surface of the semiconductor chip; an expander holding and expanding the mount tape; a push-up needle projecting from the upper surface of the pick-up stage, and capable of pushing up the semiconductor chip through the mount tape; and a mechanism pushing up the push-up needle while operating the push-up needle so as to form a spiral shape.

Abstract: A purpose of the present invention is to provide a technique capable of suppressing an electric discharge during evaluation. A semiconductor device includes: a semiconductor base body having an element region and a terminal region; a plurality of electrode pads disposed in an area that is in the element region of the semiconductor base body and is separated from the terminal region, an insulating protection film having an opening provided above each of the electrode pads; and a plurality of conductive layers disposed on the protection film and electrically connected to the plurality of electrode pads, respectively, through the opening. In a planar view, each of the conductive layers is extended to the terminal region or the vicinity of the terminal region.

Abstract: A purpose of the present invention is to provide a semiconductor device that can restrain occurrence of partial discharge in evaluation of electric characteristics and can carry out failure analysis from the upper side of a measurement object. A semiconductor device according to the present invention includes: at least one electrode; a protective layer having at least one opening part provided such that a portion of the electrode is exposed at the opening part, and being formed to cover the other portion of the electrode excluding the portion of the electrode exposed at the opening part, the protective layer being insulative; and a conductive layer formed so as to cover the protective layer and the opening part and be directly connected to the electrode at the opening part.

Abstract: Provided is a technique capable of preventing occurrence of partial discharge. An evaluation apparatus includes a probe disposed on an undersurface of an upper component; a sidewall part disposed on the undersurface of the upper component and enclosing sides of the probe; and a first gas supplying part. The first gas supplying part is capable of supplying a gas to a to-be-measured object that is placed on a stage when the sidewall part comes in proximity to the stage, and to a space enclosed by the stage, the sidewall part, and the upper component when the sidewall part is in contact with the stage.

Abstract: An evaluation apparatus includes an insulating plate, a plurality of probes fixed to the insulating plate, an insulating portion having a connection portion connected to the insulating plate in a detachable manner and a tip portion continuous with the connection portion, the tip portion being narrower than the connection portion, an insulator formed by combining the insulating portions to surround the plurality of probes in planar view, and an evaluation unit for passing currents through the plurality of probes to evaluate electrical characteristics of an object to be measured.

Abstract: A back surface potential lead-out portion has one end portion disposed in a side of a back surface of a semiconductor wafer held by a semiconductor wafer holding portion and the other end portion disposed in a side of a front surface of the semiconductor wafer held by the semiconductor wafer holding portion. The semiconductor wafer and the semiconductor wafer holding portion that holds the semiconductor wafer are movable in an in-plane direction of the semiconductor wafer. In a case where the semiconductor wafer and the semiconductor wafer holding portion that holds the semiconductor wafer are moved in the in-plane direction, a portion of the back surface potential lead-out portion located in the in-plane direction from the semiconductor wafer is fixed close to the outside of a movement region of the semiconductor wafer.

Abstract: A semiconductor evaluation apparatus includes a jig for evaluation and a probe substrate. The jig for evaluation is provided such that a plurality of semiconductor devices can be placed thereon. The probe substrate is provided so as to face the jig for evaluation, and includes a contact probe. The jig for evaluation includes a plurality of housing portions divided by a frame portion such that the plurality of semiconductor devices can be separately placed on the plurality of housing portions, respectively. The semiconductor evaluation apparatus is configured such that the contact probe can be brought into contact with a plurality of elements in the state where a space is provided by bringing the frame portion and the probe substrate in proximity to each other. In this space, each of the plurality of semiconductor devices is placed between a corresponding one of the plurality of housing portions and the probe substrate.

Abstract: A semiconductor device assessment apparatus that electrically assesses a semiconductor device formed on a semiconductor substrate includes a holding unit having a surface to hold the semiconductor substrate thereon, and a detection unit to detect irregularity on the surface of the holding unit. The holding unit on the surface includes a plurality of grooves formed such that when the semiconductor substrate is held on the surface, the grooves overlap a periphery of the semiconductor substrate and also have a portion located outer than the periphery of the semiconductor substrate.

Abstract: A temperature detecting probe as a contact-probe type temperature detector includes a plunger portion contactable with a semiconductor device as an object to be measured, a spring member placed on a base end portion of the plunger portion, a barrel portion pressing the plunger portion the semiconductor device side with the spring member interposed therebetween, and a thermocouple as a temperature measuring portion detecting a temperature of the semiconductor device.

Abstract: A purpose of the present invention is to provide a semiconductor device that can restrain occurrence of partial discharge in evaluation of electric characteristics and can carry out failure analysis from the upper side of a measurement object. A semiconductor device according to the present invention includes: at least one electrode; a protective layer having at least one opening part provided such that a portion of the electrode is exposed at the opening part, and being formed to cover the other portion of the electrode excluding the portion of the electrode exposed at the opening part, the protective layer being insulative; and a conductive layer formed so as to cover the protective layer and the opening part and be directly connected to the electrode at the opening part.

Abstract: A purpose of the present invention is to provide a technique capable of suppressing an electric discharge during evaluation. A semiconductor device includes: a semiconductor base body having an element region and a terminal region; a plurality of electrode pads disposed in an area that is in the element region of the semiconductor base body and is separated from the terminal region, an insulating protection film having an opening provided above each of the electrode pads; and a plurality of conductive layers disposed on the protection film and electrically connected to the plurality of electrode pads, respectively, through the opening. In a planar view, each of the conductive layers is extended to the terminal region or the vicinity of the terminal region.

Abstract: A semiconductor testing jig fixes a measurement target while it is held between a chuck stage and the measurement target. The semiconductor testing jig includes a base on which the measurement target is to be installed and which can be attached to the chuck stage. The base includes: a first main surface to become an installation surface for the measurement target; a second main surface opposite the first main surface and which is to contact the chuck stage; and a porous region containing a porous member. The porous region is provided selectively as seen in plan view, and penetrates through the base from the first main surface toward the second main surface.

Abstract: A semiconductor evaluating device includes a chuck stage for holding a semiconductor device serving as a measuring object, a contact probe for evaluating an electrical characteristic of the semiconductor device by getting contact with the semiconductor device held on the chuck stage, and a fluid spraying portion for spraying a fluid onto the semiconductor device.

Abstract: A back surface potential lead-out portion has one end portion disposed in a side of a back surface of a semiconductor wafer held by a semiconductor wafer holding portion and the other end portion disposed in a side of a front surface of the semiconductor wafer held by the semiconductor wafer holding portion. The semiconductor wafer and the semiconductor wafer holding portion that holds the semiconductor wafer are movable in an in-plane direction of the semiconductor wafer. In a case where the semiconductor wafer and the semiconductor wafer holding portion that holds the semiconductor wafer are moved in the in-plane direction, a portion of the back surface potential lead-out portion located in the in-plane direction from the semiconductor wafer is fixed close to the outside of a movement region of the semiconductor wafer.

Abstract: A method of attaching a wafer by suction, includes a step of mounting a wafer on a right arm and a left arm of a transfer jig, moving the transfer jig toward a wafer suction stage in such a manner that a facing right arm surface of the right arm slides along and in contact with a first side surface of the wafer suction stage and a facing left arm surface of the left arm slides along and in contact with a second side surface of the wafer suction stage until the wafer comes to lie directly above a mounting surface of the wafer suction stage, mounting the wafer on the mounting surface by moving the transfer jig downward toward the wafer suction stage while maintaining the contacts, and attaching the wafer to the mounting surface by suction.