Patents by Inventor Kinya Yamashita

Kinya Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9257316
    Abstract: A semiconductor testing jig is provided with a conductive stage including a plurality of mounting portions on which a plurality of vertical semiconductor devices are each individually disposed with lower surface electrodes being in contact with the plurality of mounting portions, an insulating frame portion having a lattice pattern that is disposed on the stage and surrounds each of the plurality of mounting portions in plan view to define each of the mounting portions, and an abrasive layer disposed in a position in the frame portion, the position facing each of the vertical semiconductor devices disposed on the mounting portions.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: February 9, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akira Okada, Takaya Noguchi, Norihiro Takesako, Kinya Yamashita, Hajime Akiyama
  • Patent number: 9207257
    Abstract: An inspection apparatus includes an insulating substrate, a socket in which a body portion having a through-hole in a wall thereof is integrally formed with a connection portion secured to the insulating substrate, and a contact probe detachably secured to the socket.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: December 8, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akira Okada, Hajime Akiyama, Kinya Yamashita
  • Patent number: 9188624
    Abstract: An inspection apparatus includes a probe substrate, a socket secured to the probe substrate, a heating element wire wound around the socket, a probe tip detachably connected to the socket, a stage on which an object to be measured is mounted, and a heating unit for heating the stage.
    Type: Grant
    Filed: January 14, 2013
    Date of Patent: November 17, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akira Okada, Hajime Akiyama, Kinya Yamashita
  • Patent number: 9157931
    Abstract: It is an object of the present invention to provide a probe card capable of controlling generation of a scratch or an indentation in a connection pad and capable of controlling generation of heat in a connection pad and its vicinity having contacted a contact probe at low cost and in a simple way. A probe card includes a probe substrate, at least one contact probe electrically connected to a signal line provided to an insulating base of the probe substrate and fixed to the insulating base, and at least one engagement member installed on the contact probe at a position near a tip end portion of the contact probe. The engagement member has at least one engagement portion that makes abutting contact with another predetermined member during operation to restrain the operation of the contact probe.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: October 13, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akira Okada, Hajime Akiyama, Kinya Yamashita
  • Patent number: 9117880
    Abstract: A semiconductor wafer is subjected to a protection film formation step process as a process before evaluation of electrical characteristics. In this process, after an insulating film serving as a protection film is formed, a photolithography process and an etching process are performed so as to form a protection film having a plurality of openings exposing an emitter electrode. Then, electrical characteristics are evaluated by bringing a contact probe in contact with the exposed emitter electrode through each opening.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: August 25, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hajime Akiyama, Akira Okada, Kinya Yamashita
  • Publication number: 20150115989
    Abstract: A semiconductor evaluation apparatus includes a jig for evaluation and a probe substrate. The jig for evaluation is provided such that a plurality of semiconductor devices can be placed thereon. The probe substrate is provided so as to face the jig for evaluation, and includes a contact probe. The jig for evaluation includes a plurality of housing portions divided by a frame portion such that the plurality of semiconductor devices can be separately placed on the plurality of housing portions, respectively. The semiconductor evaluation apparatus is configured such that the contact probe can be brought into contact with a plurality of elements in the state where a space is provided by bringing the frame portion and the probe substrate in proximity to each other. In this space, each of the plurality of semiconductor devices is placed between a corresponding one of the plurality of housing portions and the probe substrate.
    Type: Application
    Filed: June 17, 2014
    Publication date: April 30, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akira OKADA, Takaya NOGUCHI, Norihiro TAKESAKO, Kinya YAMASHITA, Hajime AKIYAMA
  • Publication number: 20150091599
    Abstract: A semiconductor testing jig is provided with a conductive stage including a plurality of mounting portions on which a plurality of vertical semiconductor devices are each individually disposed with lower surface electrodes being in contact with the plurality of mounting portions, an insulating frame portion having a lattice pattern that is disposed on the stage and surrounds each of the plurality of mounting portions in plan view to define each of the mounting portions, and an abrasive layer disposed in a position in the frame portion, the position facing each of the vertical semiconductor devices disposed on the mounting portions.
    Type: Application
    Filed: June 27, 2014
    Publication date: April 2, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akira OKADA, Takaya NOGUCHI, Norihiro TAKESAKO, Kinya YAMASHITA, Hajime AKIYAMA
  • Patent number: 8980655
    Abstract: A test apparatus includes a foreign matter removal unit having a first slope provided with an abrasive coating or an adhesive sheet and a second slope provided with an abrasive coating or an adhesive sheet, the second slope facing the first slope in such a manner that an upper end of the second slope is spaced from an upper end of the first slope a greater distance than a lower end of the second slope is spaced from a lower end of the first slope, a test unit for testing electrical characteristics of a semiconductor chip, and a transfer unit for holding and releasing the semiconductor chip at a position above the first and second slopes and transferring the semiconductor chip to the test unit.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: March 17, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akira Okada, Takaya Noguchi, Norihiro Takesako, Kinya Yamashita, Hajime Akiyama
  • Patent number: 8981805
    Abstract: An inspection apparatus includes an insulating substrate, a probe pin having a body portion secured to the insulating substrate, a tip portion connected to one end of the body portion and disposed on the back surface side of the insulating substrate, and a connection portion connected to the other end of the body portion and disposed on the front surface side of the insulating substrate, and a heat-radiating terminal in contact with the connection portion, wherein a current is applied through the heat-radiating terminal and the probe pin to an object to measured, and wherein the heat-radiating terminal discharges heat from the probe pin.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: March 17, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akira Okada, Hajime Akiyama, Kinya Yamashita
  • Publication number: 20150044788
    Abstract: A test apparatus includes a foreign matter removal unit having a first slope provided with an abrasive coating or an adhesive sheet and a second slope provided with an abrasive coating or an adhesive sheet, the second slope facing the first slope in such a manner that an upper end of the second slope is spaced from an upper end of the first slope a greater distance than a lower end of the second slope is spaced from a lower end of the first slope, a test unit for testing electrical characteristics of a semiconductor chip, and a transfer unit for holding and releasing the semiconductor chip at a position above the first and second slopes and transferring the semiconductor chip to the test unit.
    Type: Application
    Filed: April 18, 2014
    Publication date: February 12, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akira OKADA, Takaya NOGUCHI, Norihiro TAKESAKO, Kinya YAMASHITA, Hajime AKIYAMA
  • Publication number: 20140347081
    Abstract: A semiconductor device assessment apparatus that electrically assesses a semiconductor device formed on a semiconductor substrate includes a holding unit having a surface to hold the semiconductor substrate thereon, and a detection unit to detect irregularity on the surface of the holding unit. The holding unit on the surface includes a plurality of grooves formed such that when the semiconductor substrate is held on the surface, the grooves overlap a periphery of the semiconductor substrate and also have a portion located outer than the periphery of the semiconductor substrate.
    Type: Application
    Filed: February 24, 2014
    Publication date: November 27, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hajime AKIYAMA, Akira OKADA, Kinya YAMASHITA
  • Publication number: 20140342544
    Abstract: A semiconductor wafer is subjected to a protection film formation step process as a process before evaluation of electrical characteristics. In this process, after an insulating film serving as a protection film is formed, a photolithography process and an etching process are performed so as to form a protection film having a plurality of openings exposing an emitter electrode. Then, electrical characteristics are evaluated by bringing a contact probe in contact with the exposed emitter electrode through each opening.
    Type: Application
    Filed: February 24, 2014
    Publication date: November 20, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hajime AKIYAMA, Akira OKADA, Kinya YAMASHITA
  • Publication number: 20140210500
    Abstract: A semiconductor evaluating device includes a chuck stage for holding a semiconductor device serving as a measuring object, a contact probe for evaluating an electrical characteristic of the semiconductor device by getting contact with the semiconductor device held on the chuck stage, and a fluid spraying portion for spraying a fluid onto the semiconductor device.
    Type: Application
    Filed: October 28, 2013
    Publication date: July 31, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hajime AKIYAMA, Akira OKADA, Kinya YAMASHITA
  • Publication number: 20140015554
    Abstract: An inspection apparatus includes an insulating substrate, a socket in which a body portion having a through-hole in a wall thereof is integrally formed with a connection portion secured to the insulating substrate, and a contact probe detachably secured to the socket.
    Type: Application
    Filed: March 4, 2013
    Publication date: January 16, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akira OKADA, Hajime AKIYAMA, Kinya YAMASHITA
  • Publication number: 20140009183
    Abstract: A semiconductor testing jig fixes a measurement target while it is held between a chuck stage and the measurement target. The semiconductor testing jig includes a base on which the measurement target is to be installed and which can be attached to the chuck stage. The base includes: a first main surface to become an installation surface for the measurement target; a second main surface opposite the first main surface and which is to contact the chuck stage; and a porous region containing a porous member. The porous region is provided selectively as seen in plan view, and penetrates through the base from the first main surface toward the second main surface.
    Type: Application
    Filed: March 14, 2013
    Publication date: January 9, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hajime AKIYAMA, Akira OKADA, Kinya YAMASHITA
  • Publication number: 20130321019
    Abstract: It is an object of the present invention to provide a probe card capable of controlling generation of a scratch or an indentation in a connection pad and capable of controlling generation of heat in a connection pad and its vicinity having contacted a contact probe at low cost and in a simple way. A probe card includes a probe substrate, at least one contact probe electrically connected to a signal line provided to an insulating base of the probe substrate and fixed to the insulating base, and at least one engagement member installed on the contact probe at a position near a tip end portion of the contact probe. The engagement member has at least one engagement portion that makes abutting contact with another predetermined member during operation to restrain the operation of the contact probe.
    Type: Application
    Filed: March 1, 2013
    Publication date: December 5, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akira OKADA, Hajime AKIYAMA, Kinya YAMASHITA
  • Publication number: 20130321015
    Abstract: An inspection apparatus includes an insulating substrate, a probe pin having a body portion secured to the insulating substrate, a tip portion connected to one end of the body portion and disposed on the back surface side of the insulating substrate, and a connection portion connected to the other end of the body portion and disposed on the front surface side of the insulating substrate, and a heat-radiating terminal in contact with the connection portion, wherein a current is applied through the heat-radiating terminal and the probe pin to an object to measured, and wherein the heat-radiating terminal discharges heat from the probe pin.
    Type: Application
    Filed: March 1, 2013
    Publication date: December 5, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akira OKADA, Hajime AKIYAMA, Kinya YAMASHITA
  • Publication number: 20130285684
    Abstract: An inspection apparatus includes a probe substrate, a socket secured to the probe substrate, a heating element wire wound around the socket, a probe tip detachably connected to the socket, a stage on which an object to be measured is mounted, and a heating unit for heating the stage.
    Type: Application
    Filed: January 14, 2013
    Publication date: October 31, 2013
    Inventors: Akira OKADA, Hajime AKIYAMA, Kinya YAMASHITA
  • Publication number: 20130256964
    Abstract: A method of attaching a wafer by suction, includes a step of mounting a wafer on a right arm and a left arm of a transfer jig, moving the transfer jig toward a wafer suction stage in such a manner that a facing right arm surface of the right arm slides along and in contact with a first side surface of the wafer suction stage and a facing left arm surface of the left arm slides along and in contact with a second side surface of the wafer suction stage until the wafer comes to lie directly above a mounting surface of the wafer suction stage, mounting the wafer on the mounting surface by moving the transfer jig downward toward the wafer suction stage while maintaining the contacts, and attaching the wafer to the mounting surface by suction.
    Type: Application
    Filed: September 14, 2012
    Publication date: October 3, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hajime AKIYAMA, Akira OKADA, Kinya YAMASHITA
  • Patent number: 7691367
    Abstract: The present invention provides branched polyalkylene glycols useful as a chemically modifying agent for physiologically active polypeptides, wherein two single-chain polyalkylene glycols are linked to a group having a cyclic structure other than a plane structure, and wherein a group having reactivity with an amino acid side chain, an N-terminal amino group or a C-terminal carboxyl group in a polypeptide or a group convertible into the group having reactivity is linked to the group having a structure other than a plane structure.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: April 6, 2010
    Assignee: Kyowa Hakko Kirin Co., Ltd.
    Inventors: Motoo Yamasaki, Toshiyuki Suzuwa, Tatsuya Murakami, Noriko Sakurai, Kinya Yamashita, Mayumi Mukai, Takashi Kuwabara, So Ohta, Ichiro Miki