Patents by Inventor Ki-se Kim

Ki-se Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145263
    Abstract: According to an aspect of the present disclosure, there is provided a substrate treating apparatus comprising: a vessel part having a substrate treatment region formed therein and including a supply port through which a treating fluid is supplied to the substrate treatment region and an exhaust port through which the treating fluid is exhausted from the substrate treatment region; a fluid supply unit configured to supply the treating fluid to the substrate treatment region; an exhaust unit configured to exhaust the treating fluid from the vessel part. The exhaust unit comprises: a main line connected to the exhaust port; an extension line branched from at least one of first and second nodes of the main line and including at least one of a first orifice or a first check valve to control an exhaust speed; and an auxiliary line branched from a third node of the main line, where an orifice and a check valve are not formed.
    Type: Application
    Filed: January 20, 2023
    Publication date: May 2, 2024
    Inventors: Seung Hoon OH, Ki Bong KIM, Jong Doo LEE, Young Hun LEE, Mi So PARK, Jin Se PARK, Yong Sun KO
  • Patent number: 11953502
    Abstract: The present invention relates to an epitope of a thioredoxin-1 (Trx1) antigen and a use thereof, and more particularly, to the epitope, and an antibody or an antigen-binding fragment binding thereto. The epitope region of the human Trx1 antigen confirmed in the present invention may be effectively used in the development of an improved antibody to enhance the binding affinity of an anti-Trx1 antibody. In addition, the improved antibody of the present invention is effective in improvement of performance of a breast cancer diagnosis kit due to excellent binding affinity for Trx1 and very high sensitivity and specificity, compared to a conventional anti-Trx1 antibody. Further, the accuracy and reliability of breast cancer diagnosis may significantly increase because exceptionally high sensitivity and specificity are exhibited by detecting the monoclonal antibody of the present invention, which specifically binds to Trx1, rather than detecting CA15-3, another conventional breast cancer diagnostic biomarker.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: April 9, 2024
    Assignee: E&S HEALTHCARE CO., LTD.
    Inventors: Kyong Hoon Suh, Dae Joong Kim, Young Kim, Mi Kyung Kim, Jong Hwan Jung, Ki Se Lee
  • Publication number: 20220259493
    Abstract: The present invention relates to a solar wavelength conversion material with improved efficiency, and a solar cell comprising same. According to one embodiment of the present invention, the present invention provides a solar wavelength conversion material comprising an aluminum hydroxide precursor, and a lanthanide ion or a derivative containing same.
    Type: Application
    Filed: July 15, 2020
    Publication date: August 18, 2022
    Inventors: Ki Se KIM, Jae Hyuck HAN, Do Hoon LEE, Choon Ki KIM, Young Rae KIM, Taejong PAIK, Min Hye KIM, Hyo Joo SHIN
  • Patent number: 9343635
    Abstract: There is provided a light-emitting device with enhanced luminescence efficiency, which simultaneously exhibits excitation enhancement and emission enhancement of a light-emitting material by controlling two or multiple surface plasmon resonance bands of anisotropic metal nanoparticles to be formed in a near ultraviolet light range and a visible light range and optimizing overlapping of a wavelength of a near ultraviolet or blue light source with an absorption wavelength and an emission wavelength of the light-emitting material. There is also provided a light-emitting device with improved color gamut and luminance, which simultaneously exhibit emission enhancement of different types of light-emitting materials by controlling two or multiple surfaces plasmon resonance bands of anisotropic metal nanoparticles to be overlapped with absorption and emission wavelengths of two or more light-emitting materials having different emission wavelengths from one another.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: May 17, 2016
    Assignee: HANWHA TOTAL PETROCHEMICAL CO., LTD.
    Inventors: Ki Se Kim, Do Hoon Lee, Ho Sik Chang, Chang Hyun Choi
  • Publication number: 20160118533
    Abstract: A method of manufacturing a nanostructure semiconductor light emitting device may include: stacking a mask layer on a conductive base layer and forming a through hole penetrating the mask layer; growing a nanocore through the through hole from the conductive base layer using precursor gas including indium-containing precursor gas in a mixed gas atmosphere of nitrogen and hydrogen; removing the mask layer; and sequentially growing an active layer and a first conductivity type semiconductor layer on a surface of the nanocore.
    Type: Application
    Filed: October 20, 2015
    Publication date: April 28, 2016
    Inventors: MISAICHI TAKEUCHI, Sam Mook KANG, Shigeru INOUE, Ki Se KIM
  • Patent number: 9209253
    Abstract: A nitride based semiconductor device includes a first metallic junction layer, a Schottky junction layer on the first metallic junction layer, a first group III nitride semiconductor layer on the Schottky junction layer, a first insulating pattern layer on the first group III nitride semiconductor layer, the first insulating layer pattern including curved protrusions, a second group III nitride semiconductor layer laterally grown on the first group III nitride semiconductor layer, a first type group III nitride semiconductor layer on the second group III nitride semiconductor layer, the first type group III nitride semiconductor layer being simultaneously doped with aluminum (Al) and silicon (Si), an ohmic junction layer formed on the first type group III nitride semiconductor layer, a second metallic junction layer on the ohmic junction layer, and a metallic supporting substrate on the second metallic junction layer.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: December 8, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Hoon Lee, Ki Se Kim
  • Patent number: 9136365
    Abstract: A power device includes a substrate, a silicon carbide (SixC1-x) layer on one surface of the substrate, wherein 0<x<1, and a re-grown gallium nitride (GaN) layer formed by etching a part of the SixC1-x layer and growing GaN from an etched area of the SixC1-x layer.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: September 15, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Hoon Lee, Ki Se Kim
  • Publication number: 20150155449
    Abstract: There is provided a light-emitting device with enhanced luminescence efficiency, which simultaneously exhibits excitation enhancement and emission enhancement of a light-emitting material by controlling two or multiple surface plasmon resonance bands of anisotropic metal nanoparticles to be formed in a near ultraviolet light range and a visible light range and optimizing overlapping of a wavelength of a near ultraviolet or blue light source with an absorption wavelength and an emission wavelength of the light-emitting material. There is also provided a light-emitting device with improved color gamut and luminance, which simultaneously exhibit emission enhancement of different types of light-emitting materials by controlling two or multiple surfaces plasmon resonance bands of anisotropic metal nanoparticles to be overlapped with absorption and emission wavelengths of two or more light-emitting materials having different emission wavelengths from one another.
    Type: Application
    Filed: November 7, 2013
    Publication date: June 4, 2015
    Applicant: SAMSUNG TOTAL PETROCHEMICALS CO., LTD
    Inventors: Ki Se Kim, Do Hoon Lee, Ho Sik Chang, Chang Hyun Choi
  • Patent number: 9029916
    Abstract: Gallium nitride (GaN) based semiconductor devices and methods of manufacturing the same. The GaN-based semiconductor device may include a heat dissipation substrate (that is, a thermal conductive substrate); a GaN-based multi-layer arranged on the heat dissipation substrate and having N-face polarity; and a heterostructure field effect transistor (HFET) or a Schottky electrode arranged on the GaN-based multi-layer. The HFET device may include a gate having a double recess structure. While such a GaN-based semiconductor device is being manufactured, a wafer bonding process and a laser lift-off process may be used.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: May 12, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hoon Lee, Ki-se Kim
  • Patent number: 8969915
    Abstract: Gallium nitride (GaN) based semiconductor devices and methods of manufacturing the same. The GaN-based semiconductor device may include a heterostructure field effect transistor (HFET) or a Schottky diode, arranged on a heat dissipation substrate. The HFET device may include a GaN-based multi-layer having a recess region; a gate arranged in the recess region; and a source and a drain that are arranged on portions of the GaN-based multi-layer at two opposite sides of the gate (or the recess region). The gate, the source, and the drain may be attached to the heat dissipation substrate. The recess region may have a double recess structure. While such a GaN-based semiconductor device is being manufactured, a wafer bonding process and a laser lift-off process may be used.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: March 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hoon Lee, Ki-Se Kim
  • Patent number: 8963151
    Abstract: A high efficiency HFET may include a substrate, a semi-insulating gallium nitride (GaN) layer formed on the substrate, an aluminum gallium nitride (AlGaN) layer formed on the GaN layer, and a silicon carbide (SixC1-x) functional layer formed on the AlGaN layer.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: February 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Hoon Lee, Ki Se Kim
  • Publication number: 20140327049
    Abstract: Gallium nitride (GaN) based semiconductor devices and methods of manufacturing the same. The GaN-based semiconductor device may include a heterostructure field effect transistor (HFET) or a Schottky diode, arranged on a heat dissipation substrate. The HFET device may include a GaN-based multi-layer having a recess region; a gate arranged in the recess region; and a source and a drain that are arranged on portions of the GaN-based multi-layer at two opposite sides of the gate (or the recess region). The gate, the source, and the drain may be attached to the heat dissipation substrate. The recess region may have a double recess structure. While such a GaN-based semiconductor device is being manufactured, a wafer bonding process and a laser lift-off process may be used.
    Type: Application
    Filed: July 22, 2014
    Publication date: November 6, 2014
    Inventors: Jae-Hoon LEE, Ki-Se KIM
  • Patent number: 8815688
    Abstract: A method of manufacturing a power device includes forming a first drift region on a substrate. A trench is formed by patterning the first drift region. A second drift region is formed by growing n-gallium nitride (GaN) in the trench, and alternately disposing the first drift region and the second drift region. A source electrode contact layer is formed on the second drift region. A source electrode and a gate electrode are formed on the source electrode contact layer. A drain electrode is formed on one side of the substrate which is an opposite side of the first drift region.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: August 26, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Hoon Lee, Ki Se Kim, Jung Hee Lee, Ki Sik Im, Dong Seok Kim
  • Patent number: 8815665
    Abstract: Gallium nitride (GaN) based semiconductor devices and methods of manufacturing the same. The GaN-based semiconductor device may include a heterostructure field effect transistor (HFET) or a Schottky diode, arranged on a heat dissipation substrate. The HFET device may include a GaN-based multi-layer having a recess region; a gate arranged in the recess region; and a source and a drain that are arranged on portions of the GaN-based multi-layer at two opposite sides of the gate (or the recess region). The gate, the source, and the drain may be attached to the heat dissipation substrate. The recess region may have a double recess structure. While such a GaN-based semiconductor device is being manufactured, a wafer bonding process and a laser lift-off process may be used.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: August 26, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hoon Lee, Ki-se Kim
  • Publication number: 20140167113
    Abstract: Gallium nitride (GaN) based semiconductor devices and methods of manufacturing the same. The GaN-based semiconductor device may include a heat dissipation substrate (that is, a thermal conductive substrate); a GaN-based multi-layer arranged on the heat dissipation substrate and having N-face polarity; and a heterostructure field effect transistor (HFET) or a Schottky electrode arranged on the GaN-based multi-layer. The HFET device may include a gate having a double recess structure. While such a GaN-based semiconductor device is being manufactured, a wafer bonding process and a laser lift-off process may be used.
    Type: Application
    Filed: February 21, 2014
    Publication date: June 19, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-hoon LEE, Ki-se KIM
  • Patent number: 8698162
    Abstract: Gallium nitride (GaN) based semiconductor devices and methods of manufacturing the same. The GaN-based semiconductor device may include a heat dissipation substrate (that is, a thermal conductive substrate); a GaN-based multi-layer arranged on the heat dissipation substrate and having N-face polarity; and a heterostructure field effect transistor (HFET) or a Schottky electrode arranged on the GaN-based multi-layer. The HFET device may include a gate having a double recess structure. While such a GaN-based semiconductor device is being manufactured, a wafer bonding process and a laser lift-off process may be used.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: April 15, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hoon Lee, Ki-se Kim
  • Publication number: 20140021512
    Abstract: Gallium nitride (GaN) based semiconductor devices and methods of manufacturing the same. The GaN-based semiconductor device may include a heterostructure field effect transistor (HFET) or a Schottky diode, arranged on a heat dissipation substrate. The HFET device may include a GaN-based multi-layer having a recess region; a gate arranged in the recess region; and a source and a drain that are arranged on portions of the GaN-based multi-layer at two opposite sides of the gate (or the recess region). The gate, the source, and the drain may be attached to the heat dissipation substrate. The recess region may have a double recess structure. While such a GaN-based semiconductor device is being manufactured, a wafer bonding process and a laser lift-off process may be used.
    Type: Application
    Filed: September 19, 2013
    Publication date: January 23, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-hoon LEE, Ki-se KIM
  • Patent number: 8629455
    Abstract: A power semiconductor device is provided. The power semiconductor device includes a source electrode disposed on a device activation region and widened in a direction toward a first side, a drain electrode arranged alternately with the source electrode on the device activation region and widened in a direction toward a second side facing the first side, an insulating layer disposed on the source electrode and the drain electrode and configured to include a plurality of via contacts contacting the source electrode and the drain electrode, a source electrode pad disposed in a first region on the insulating layer to be brought into contact with the source electrode, and a drain electrode pad disposed in a second region separated from the first region on the insulating layer and brought into contact with the plurality of via contacts contacting the drain electrode.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: January 14, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung Bae Hur, Heon Bok Lee, Ki Se Kim
  • Publication number: 20130034939
    Abstract: A method of manufacturing a power device includes forming a first drift region on a substrate. A trench is formed by patterning the first drift region. A second drift region is formed by growing n-gallium nitride (GaN) in the trench, and alternately disposing the first drift region and the second drift region. A source electrode contact layer is formed on the second drift region. A source electrode and a gate electrode are formed on the source electrode contact layer. A drain electrode is formed on one side of the substrate which is an opposite side of the first drift region.
    Type: Application
    Filed: July 17, 2012
    Publication date: February 7, 2013
    Inventors: Jae Hoon LEE, Ki Se KIM, Jung Hee LEE, Ki Sik IM, Dong Seok KIM
  • Publication number: 20130026485
    Abstract: A power semiconductor device is provided. The power semiconductor device includes a source electrode disposed on a device activation region and widened in a direction toward a first side, a drain electrode arranged alternately with the source electrode on the device activation region and widened in a direction toward a second side facing the first side, an insulating layer disposed on the source electrode and the drain electrode and configured to include a plurality of via contacts contacting the source electrode and the drain electrode, a source electrode pad disposed in a first region on the insulating layer to be brought into contact with the source electrode, and a drain electrode pad disposed in a second region separated from the first region on the insulating layer and brought into contact with the plurality of via contacts contacting the drain electrode.
    Type: Application
    Filed: July 27, 2012
    Publication date: January 31, 2013
    Inventors: Seung Bae HUR, Heon Bok LEE, Ki Se KIM