Abstract: A method for forming a capacitor and a transistor device on different surface portions of a semiconductor structure includes forming a passivation dielectric layer for the device; forming a bottom electrode for the capacitor; forming a removable layer extending over the bottom electrode and over the passivation dielectric layer with a window therein, such window exposing said bottom electrode; depositing a capacitor dielectric layer of the same or different material as the passivation dielectric layer over the removable layer with first portions passing through the window onto the exposed bottom electrode and second portions being over the removable layer, the thickness of the deposited layer being different from the thickness of the passivation layer; removing the removable layer with the second portions thereon while leaving said first portions on the bottom electrode; and forming a top electrode for the capacitor on the second portions remaining on the bottom electrode.

Abstract: A semiconductor structure having: a semiconductor comprising a indium gallium phosphide and molybdenum metal in Schottky contact with the semiconductor.

Abstract: A semiconductor structure having: a III-V substrate structure; an enhancement mode transistor device disposed in a first region of the structure; a depletion mode transistor device disposed in a laterally displaced second region of the structure; and a RF/microwave/milli-meter wave transistor device formed in a laterally displaced third region thereof.

Abstract: A field effect transistor device and method, such device having source and drain electrodes in ohmic contact a semiconductor. A gate electrode-field plate structure is disposed between the source and drain electrodes. The gate electrode-field plate structure comprises: a dielectric; a first metal in Schottky contact the semiconductor; and a second metal. The second metal has: a first portion disposed over and electrically connected to a portion of the first metal; and a second portion, separated from a second portion of the first metal by a portion of the dielectric and extending beyond an edge of the first metal to an edge of the second metal. The edge of the first metal is further from the drain electrode than the edge of the second metal to provide a field-plate for the field effect transistor.

Abstract: A semiconductor structure a structure with an enhancement mode transistor device disposed in a first region and depletion mode transistor device disposed in a laterally displaced second region. The structure has a channel layer for the depletion mode and enhancement mode transistor devices. An enhancement mode transistor device InGaP etch stop/Schottky contact layer is disposed over the channel layer; a first layer different from InGaP disposed on the InGaP layer; a depletion mode transistor device etch stop layer is disposed on the first layer; and a second layer disposed on the depletion mode transistor device etch stop layer. The depletion mode transistor device has a gate recess passing through the second layer and the depletion mode transistor device etch stop layer and terminating in the first layer. The enhancement mode transistor device has a gate recess passing through the second layer, the depletion mode transistor device etch stop layer, the first layer, and terminating in the InGaP layer.

Abstract: A field effect transistor device and method, such device having source and drain electrodes in ohmic contact a semiconductor. A gate electrode-field plate structure is disposed between the source and drain electrodes. The gate electrode-field plate structure comprises: a dielectric; a first metal in Schottky contact the semiconductor; and a second metal. The second metal has: a first portion disposed over and electrically connected to a portion of the first metal; and a second portion, separated from a second portion of the first metal by a portion of the dielectric and extending beyond an edge of the first metal to an edge of the second metal. The edge of the first metal is further from the drain electrode than the edge of the second metal to provide a field-plate for the field effect transistor.

Abstract: A semiconductor structure a structure with an enhancement mode transistor device disposed in a first region and depletion mode transistor device disposed in a laterally displaced second region. The structure has a channel layer for the depletion mode and enhancement mode transistor devices. An enhancement mode transistor device InGaP etch stop/Schottky contact layer is disposed over the channel layer; a first layer different from InGaP disposed on the InGaP layer; a depletion mode transistor device etch stop layer is disposed on the first layer; and a second layer disposed on the depletion mode transistor device etch stop layer. The depletion mode transistor device has a gate recess passing through the second layer and the depletion mode transistor device etch stop layer and terminating in the first layer. The enhancement mode transistor device has a gate recess passing through the second layer, the depletion mode transistor device etch stop layer, the first layer, and terminating in the InGaP layer.

Abstract: A field effect transistor device and method, such device having source and drain electrodes in ohmic contact a semiconductor. A gate electrode—field plate structure is disposed between the source and drain electrodes. The gate electrode—field plate structure comprises: a dielectric; a first metal in Schottky contact the semiconductor; and a second metal. The second metal has: a first portion disposed over and electrically connected to a portion of the first metal; and a second portion, separated from a second portion of the first metal by a portion of the dielectric and extending beyond an edge of the first metal to an edge of the second metal. The edge of the first metal is further from the drain electrode than the edge of the second metal to provide a field-plate for the field effect transistor.

Abstract: A field effect transistor structure is provided having: a III-V substrate structure; an InGaAs layer disposed over the substrate structure; an AlGaAs layer disposed on the InGaAs layer; an semiconductor layer disposed on the AlGaAs layer, where the bandgap energy of the semiconductor layer is greater than 1.8 eV; an AlGaAs Schottky layer disposed on the semiconductor layer; and a gate electrode in Schottky contact with the an AlGaAs Schottky layer. In one embodiment, an InGaP or ZnSe layer is disposed on the AlGaAs layer, where the bandgap energy of the InGaP layer is greater than 1.8V and the bandgap energy of the ZnSe layer is greater than 2.6 eV; an AlGaAs Schottky layer disposed on the InGaP layer; and a gate electrode in Schottky contact with the an AlGaAs/InGaP or ZnSe composite Schottky layer.

Abstract: A semiconductor structure having: a III-V substrate structure; an enhancement mode transistor device disposed in a first region of the structure; a depletion mode transistor device disposed in a laterally displaced second region of the structure; and a RF/microwave/milli-meter wave transistor device formed in a laterally displaced third region thereof.

Abstract: A semiconductor structure a structure with an enhancement mode transistor device disposed in a first region and depletion mode transistor device disposed in a laterally displaced second region. The structure has a channel layer for the depletion mode and enhancement mode transistor devices. An enhancement mode transistor device InGaP etch stop/Schottky contact layer is disposed over the channel layer; a first layer different from InGaP disposed on the InGaP layer; a depletion mode transistor device etch stop layer is disposed on the first layer; and a second layer disposed on the depletion mode transistor device etch stop layer. The depletion mode transistor device has a gate recess passing through the second layer and the depletion mode transistor device etch stop layer and terminating in the first layer. The enhancement mode transistor device has a gate recess passing through the second layer, the depletion mode transistor device etch stop layer, the first layer, and terminating in the InGaP layer.

Abstract: A semiconductor structure a structure with an enhancement mode transistor device disposed in a first region and depletion mode transistor device disposed in a laterally displaced second region. The structure has a channel layer for the depletion mode and enhancement mode transistor devices. An enhancement mode transistor device InGaP etch stop/Schottky contact layer is disposed over the channel layer; a first layer different from InGaP disposed on the InGaP layer; a depletion mode transistor device etch stop layer is disposed on the first layer; and a second layer disposed on the depletion mode transistor device etch stop layer. The depletion mode transistor device has a gate recess passing through the second layer and the depletion mode transistor device etch stop layer and terminating in the first layer. The enhancement mode transistor device has a gate recess passing through the second layer, the depletion mode transistor device etch stop layer, the first layer, and terminating in the InGaP layer.

Abstract: A method for fabricating a device having a substrate comprising III-N material, such as gallium nitride or aluminum gallium nitride. A surface of the substrate comprising group III-N is oxidized to form an oxide layer comprising III-oxide or III-oxynitride. The layer is formed with a predetermined thickness. Portions of the substrate disposed beneath the upper surface portion remaining un-oxidized. Electrical contacts are formed in ohmic contact without first surface portions of the substrate. An electrical contact is formed in Schottky contact with another surface portion of the substrate after the oxide layer is selectively removed from the upper portion of the substrate.