Patents by Inventor Kiyofumi Abe

Kiyofumi Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230388505
    Abstract: An encoder includes memory and circuitry which: (i) encodes an image block; (ii) when encoding the image block: binarizes coefficient information indicating coefficients of the image block; and controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and (iii) when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is applied to the data string and a predetermined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is applied to the data string and the predetermined condition is satisfied; binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is applied to the data string; and subtracts 1 from a value of an initial non-zero coefficient when no arithmetic encoding is applied to the data string when encoding the image block.
    Type: Application
    Filed: May 22, 2023
    Publication date: November 30, 2023
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Yusuke KATO
  • Publication number: 20230388536
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: derives an average value of motion vector values of two prediction candidates in a prediction candidate list for a merge mode, and registers the average value derived as new motion vector information of a new prediction candidate into the prediction candidate list; and derives new correction processing information regarding correction processing of a prediction image, and registers the new correction processing information derived into the prediction candidate list in association with the new motion vector information.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 30, 2023
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Patent number: 11831903
    Abstract: An encoder that; obtains two prediction images by performing motion compensation using two motion vectors; obtains a gradient value of each of pixels included in the two prediction images; derives a local motion estimation value for each of sub-blocks based on the pixel value and the gradient value of each of the pixels, the sub-blocks being obtained by partitioning the current block; and generates a final prediction image for the current block using the pixel value and the gradient value of each of the pixels, and the local motion estimation value derived for each of the sub-blocks. Each of the pixels in the two prediction images is interpolated with sub-pixel accuracy, and a reference range for the interpolation is included in a normal reference range that is referred to for motion compensation for the current block in normal inter prediction performed without using the local motion estimation value.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: November 28, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Takashi Hashimoto
  • Patent number: 11831864
    Abstract: An encoder is disclosed which includes circuitry and memory. Using the memory, the circuitry, in a first operating mode, derives first motion vectors for a first block obtained by splitting a picture, and generates a prediction image corresponding to the first block, with a bi-directional optical flow flag settable to true, and by referring to spatial gradients of luminance generated based on the first motion vectors. Using the memory, the circuitry, in a second operating mode, derives second motion vectors for a sub-block obtained by splitting a second block, the second block being obtained by splitting the picture, and generates a prediction image corresponding to the sub-block, with the bi-directional optical flow flag set to false.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: November 28, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh
  • Patent number: 11831919
    Abstract: An encoding method includes determining video format information, (i) setting each of all frames or all fields which are included in the video, as a picture, regardless of whether the video format is the interlace format or the progressive format, (ii) setting a POC indicating display order to each of all of the set pictures one by one, the POC being different each other, and encoding a picture to be encoded which is the frame or the field with reference to a picture previously encoded before encoding the picture to be encoded. In the encoding, the video is encoded with a syntax structure which is not dependent on the video format, the video format information is encoded in a header of a sequence which is a unit of the video, and the encoded bit stream is generated.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: November 28, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Kazuhito Kimura, Hideyuki Ohgose, Hiroshi Arakawa, Koji Arimura
  • Patent number: 11831905
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry performs a primary transform on a derived prediction error, performs a secondary transform on a result of the primary transform, quantizes a result of the secondary transform, and encodes a result of the quantization as data of an image. When a current block to be processed has a predetermined shape, the encoder performs the secondary transform using, among secondary transform basis candidates that are secondary bases usable in the secondary transform, only a secondary transform basis candidate having a size that is not largest size containable in the current block.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: November 28, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Tadamasa Toma, Kiyofumi Abe, Takahiro Nishi
  • Patent number: 11825126
    Abstract: A decoder includes memory and a processor coupled to the memory and configured to: generate a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component; clip the first coefficient value such that the clipped first coefficient value is within a first range from ?27 to 27?1; generate a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component; clip the second coefficient value such that the clipped second coefficient value is within a second range different from the first range; generate a third coefficient value by adding the clipped first coefficient value to the clipped second coefficient value; and generate a third reconstructed image sample of the chroma component using the third coefficient value.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: November 21, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Jing Ya Li, Han Boon Teo, Chong Soon Lim, Hai Wei Sun, Che-Wei Kuo, Chu Tong Wang, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Patent number: 11825084
    Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: November 21, 2023
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11825127
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry determines whether to split a current luma virtual pipeline decoding unit (VPDU) into smaller blocks. When it is determined not to split the current luma VPDU into smaller blocks, the circuitry predicts a block of chroma samples without using luma samples. When it is determined to split the luma VPDU into smaller blocks, the circuitry predicts the block of chroma samples using luma samples. The circuitry encodes the block using the predicted chroma samples.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: November 21, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Hai Wei Sun, Han Boon Teo, Jing Ya Li, Che-Wei Kuo, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Patent number: 11818362
    Abstract: An encoder which encodes a current block of a picture includes a processor and memory. Using the memory, the processor: determines whether intra prediction is to be used for the current block; and when it is determined that intra prediction is to be used for the current block, generates first transform coefficients by performing first transform of residual signals of the current block using a first transform basis; quantizes the first transform coefficients when an intra prediction mode for the current block is a determined mode and the first transform basis is different from a determined transform basis; and generates second transform coefficients by performing second transform of the first transform coefficients using a second transform basis, and quantizes the second transform coefficients, when the intra prediction mode for the current block is not the determined mode or when the first transform basis matches the determined transform basis.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: November 14, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Masato Ohkawa, Hideo Saitou, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Publication number: 20230362408
    Abstract: An encoder includes circuitry and memory. The circuitry, using the memory: prohibits a first splitting method when arrangement and shapes of blocks obtained by splitting a first block multiple times by the first splitting method are identical to arrangement and shapes of blocks obtained by splitting the first block multiple times by a second splitting method different from the first splitting method, and when scan order of the blocks obtained by the first splitting method is identical to scan order of the blocks obtained by the second splitting method; and encodes the first block.
    Type: Application
    Filed: July 20, 2023
    Publication date: November 9, 2023
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH
  • Publication number: 20230362397
    Abstract: An image encoder includes circuitry and a memory, wherein the circuitry, in operation, determines whether inter prediction is to be applied to a current block; in response to determining that the inter prediction is to be applied to the current block, performs a partition prediction process; and, in response to determining that the inter prediction is not to be applied, encodes the current block without using the partition prediction process. The partition prediction process includes predicting first values of a set of pixels between a first partition and a second partition in the current block, using a first motion vector for the first partition; predicting second values of the set of pixels, using a second motion vector for the second partition; weighting the first values and the second values; and generating a prediction image for the current block using the weighted first values and the weighted second values.
    Type: Application
    Filed: July 19, 2023
    Publication date: November 9, 2023
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Patent number: 11812024
    Abstract: An encoder includes circuitry and memory connected thereto. The circuitry, in operation: encodes an image; when encoding the image: binarizes coefficient information of the image; controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and outputs a bitstream including the binary data string to which arithmetic encoding has been applied or has not been applied; and when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is to be applied to the binary data string and a determined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is to be applied to the binary data string and the determined condition is satisfied; and binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is to be applied to the binary data string.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: November 7, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Patent number: 11812027
    Abstract: An image encoder or decoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, predicts a first set of samples for a first partition of a current picture with one or more motion vectors including a first motion vector and predicts a second set of samples for a first portion of the first partition with one or more motion vectors from a second partition different from the first partition. The samples of the first set of samples of the first portion of the first partition and of the second set of samples of the first portion of the first partition are weighted. A motion vector for the first portion of the first partition is stored which is based on one or both of the first motion vector and the second motion vector. The first partition is encoded or decoded using at least the weighted samples of the first portion of the first partition.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: November 7, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ru Ling Liao, Chong Soon Lim, Hai Wei Sun, Han Boon Teo, Jing Ya Li, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 11812049
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: November 7, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11812045
    Abstract: According to one aspect of the present disclosure, a decoder includes memory and a processor coupled to the memory. The processor is configured to split a current picture into tiles, generate a slice having a rectangular shape and located at a lower-right corner of the current picture, the slice including at least a part of a tile among the tiles, generate first information on a region of the slice with header information, the header information not including information identical to the first information, and decode the slice with the first information.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: November 7, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Yusuke Kato
  • Patent number: 11812047
    Abstract: An encoding method is provided for encoding a picture to generate a coded stream. The encoding method incldues: generating a first prediction image of a current block included in a current picture by referring to a first region included in a reference picture different from the current picture; operating a bi-directional optical flow process to generate a second prediction image based on the first prediction image by referring to a second region included in the first region, and not operating the bi-directional optical flow process by referring to a third region not included in the first region; and encoding the current block based on the second prediction image.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: November 7, 2023
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Takashi Hashimoto, Kiyofumi Abe, Tadamasa Toma, Takahiro Nishi, Ryuichi Kanoh
  • Publication number: 20230353790
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in response to a first reconstructed image sample being located outside a virtual boundary, duplicates a reconstructed sample located inside and adjacent to the virtual boundary to generate the first reconstructed image sample. The circuitry generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to the first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value.
    Type: Application
    Filed: November 2, 2022
    Publication date: November 2, 2023
    Inventors: Chu Tong WANG, Chong Soon LIM, Han Boon TEO, Hai Wei SUN, Jing Ya LI, Che-Wei KUO, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Yusuke KATO
  • Patent number: 11805273
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry corrects a base motion vector using a correction value in a fixed direction; and encodes a current partition by using the corrected base motion vector corrected. The correction value is specified by an index indicating one of correction values included in a table. The table is selected from among a plurality of tables, wherein the correction values in one of the plurality of tables have different increments from the correction values in another one of the plurality of tables.
    Type: Grant
    Filed: August 11, 2022
    Date of Patent: October 31, 2023
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Jing Ya Li, Chong Soon Lim, Sughosh Pavan Shashidhar, Ru Ling Liao, Hai Wei Sun, Han Boon Teo, Kiyofumi Abe, Tadamasa Toma, Takahiro Nishi
  • Publication number: 20230345035
    Abstract: Provided is an encoder including circuitry and memory coupled to the circuitry. A prediction mode for a current block is an affine mode, and in operation, the circuitry: derives a base motion vector which is a motion vector to be used in a prediction process for the current block, and is a motion vector at an affine-mode control point in the current block; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; if so, modifies a second motion vector different from the base motion vector and the first motion vector, and if not, does not modify the second motion vector; and encodes the current block using the second motion vector modified or the second motion vector not modified.
    Type: Application
    Filed: July 3, 2023
    Publication date: October 26, 2023
    Inventors: Jing Ya LI, Chong Soon LIM, Ru Ling LIAO, Han Boon TEO, Hai Wei SUN, Che Wei KUO, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA