Patents by Inventor Kiyofumi Abe

Kiyofumi Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230421762
    Abstract: An encoder that encodes a current block in a picture includes circuitry and memory. Using the memory, the circuitry: splits the current block into a first sub block, a second sub block, and a third sub block in a first direction, the second sub block being located between the first sub block and the third sub block; prohibits splitting the second sub block into two partitions in the first direction; and encodes the first sub block, the second sub block, and the third sub block.
    Type: Application
    Filed: September 6, 2023
    Publication date: December 28, 2023
    Inventors: Sughosh Pavan SHASHIDHAR, Hai Wei SUN, Chong Soon LIM, Ru Ling LIAO, Han Boon TEO, Jing Ya LI, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH, Tadamasa TOMA
  • Patent number: 11856192
    Abstract: A decoder comprises circuitry and memory. The circuitry, using the memory, in operation, determines a number of first pixels and a number of second pixels used in a deblocking filter process, wherein the first pixels are located at an upper side of a block boundary and the second pixels are located at a lower side of the block boundary, and performs the deblocking filter process on the block boundary. The number of the first pixels and the number of the second pixels are selected from among candidates, wherein the candidates include at least 4 and M larger than 4. Response to a location of the block boundary being a predetermined location, the number of the first pixels used in the deblocking filter process is limited to be 4.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: December 26, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe
  • Patent number: 11856217
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: December 26, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11856193
    Abstract: A decoder comprises circuitry and memory. The circuitry, using the memory, in operation, determines a number of first pixels and a number of second pixels used in a deblocking filter process, wherein the first pixels are located at an upper side of a block boundary and the second pixels are located at a lower side of the block boundary, and performs the deblocking filter process on the block boundary. The number of the first pixels and the number of the second pixels are selected from among candidates, wherein the candidates include at least 4 and M larger than 4. Response to a location of the block boundary being a predetermined location, the number of the first pixels used in the deblocking filter process is limited to be 4.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: December 26, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe
  • Publication number: 20230412832
    Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. In operation, the circuitry: derives a base motion vector to be used in predicting a current block to be encoded; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; modifies the first motion vector when the motion vector difference is determined to be greater than the threshold, and does not modify the first motion vector when the motion vector difference is determined not to be greater than the threshold; and encodes the current block using the first motion vector modified or the first motion vector not modified.
    Type: Application
    Filed: September 1, 2023
    Publication date: December 21, 2023
    Inventors: Jing Ya LI, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Han Boon TEO, Kiyofumi ABE, Tadamasa TOMA, Takahiro NISHI
  • Publication number: 20230412795
    Abstract: An encoder includes memory and circuitry. The circuitry, using the memory, (i) selects a mode from among a plurality of modes each for deriving a motion vector, and derives a motion vector for a current block via the selected mode, and (ii) performs inter prediction encoding on the current block, using the derived motion vector, via one of a skip mode and a non-skip mode different from the skip mode. The plurality of modes include a plurality of first modes each for predicting the motion vector for the current block based on an encoded block neighboring the current block without encoding information indicating a motion vector into a stream. When a second mode included in the plurality of first modes is selected, the current block is encoded via the non-skip mode regardless of presence or absence of a residual coefficient.
    Type: Application
    Filed: September 5, 2023
    Publication date: December 21, 2023
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH
  • Patent number: 11849139
    Abstract: An encoder that encodes a video includes circuitry and memory connected to the circuitry. In operation, the circuitry: generates a prediction image on a per sub-block basis; and when a sub-block size is 4×4, applies a boundary smoothing process only to sub-block boundaries having boundary positions that are integer multiples of 8.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: December 19, 2023
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 11849147
    Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: December 19, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Jing Ya Li, Che Wei Kuo, Chong Soon Lim, Chu Tong Wang, Han Boon Teo, Hai Wei Sun, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
  • Patent number: 11849124
    Abstract: A video image encoding device, in a first mode, variable-length-encodes a residual coefficient to generate a coefficient code string, outputs the coefficient code string and the header information in a state in which the header information is associated with the coefficient code string, in a second mode, directly uses a differential image as a coefficient code string without variable-length-encoding the differential image, and outputs the coefficient code string and the header information in a state in which the header information is associated with the coefficient code string.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: December 19, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Hideyuki Ohgose, Kiyofumi Abe, Hiroshi Arakawa, Tatsuro Juri, Kazuhito Kimura
  • Publication number: 20230403402
    Abstract: An encoder includes circuitry and memory. The circuitry, using the memory: derives a one-dimensional array of a plurality of reference samples for intra prediction; performs smoothing on the one-dimensional array of the plurality of reference samples which has been derived; and generates a prediction image using the plurality of reference samples. In deriving the one-dimensional array, the circuitry projects a value of at least one decoded pixel located on a first line onto a second line perpendicular to the first line, to derive at least one of the plurality of reference samples, and the smoothing is performed on the at least one decoded pixel projected onto the second line.
    Type: Application
    Filed: August 21, 2023
    Publication date: December 14, 2023
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Patent number: 11843799
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: derives a motion vector of a current block by referring to at least one reference picture different from a picture to which the current block belongs; performs a mode for estimating, for each sub-block unit of sub-blocks obtained by splitting the current block, a surrounding region of the motion vector to correct the motion vector; determines whether to apply deblocking filtering to each of boundaries between neighboring ones of the sub-blocks; and applies the deblocking filtering to the boundary, based on a result of the determination.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: December 12, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Publication number: 20230396776
    Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of gradient values in first and second ranges; derives, as a first parameter, a total sum of absolute values of sums of gradient values derived respectively for pairs of relative pixel positions; derives a pixel difference value between pixel values in the first and second ranges; inverts or maintains a plus or minus sign of the pixel difference value, according to a plus or minus sign of the sum of the gradient values indicating the sum of the gradient values in the first and second ranges; derives, as a second parameter, a total sum of pixel difference values each having the plus or minus sign inverted or maintained, the pixel difference values derived respectively for the relative pixel positions; and generates a prediction image using the first and second parameters.
    Type: Application
    Filed: August 16, 2023
    Publication date: December 7, 2023
    Inventors: Jing Ya LI, Ru Ling LIAO, Chong Soon LIM, Han Boon TEO, Hai Wei SUN, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Patent number: 11838550
    Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: December 5, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Jing Ya Li, Che Wei Kuo, Chong Soon Lim, Chu Tong Wang, Han Boon Teo, Hai Wei Sun, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
  • Patent number: 11838505
    Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: December 5, 2023
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Publication number: 20230388549
    Abstract: Provided is an encoder including: circuitry; and memory coupled to the circuitry. In operation, the circuitry: performs a mapping process of Luma Mapping with Chroma Scaling (LMCS) for transforming a first pixel value space applied to a luma display image signal into a second pixel value space applied to a luma encoding process signal, using line segments forming a transform curve, each of which corresponds to a different one of sections obtained by partitioning the first pixel value space; and encodes an image, and in the performing of the LMCS, the circuitry determines the transform curve so that among boundary values in the second pixel value space, a first value obtained by dividing a boundary value by a base width defined according to a bit depth of the image is not equal to a second value obtained by dividing another boundary value by the base width.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Inventors: Masato OHKAWA, Hideo SAITOU, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Yusuke KATO
  • Publication number: 20230388505
    Abstract: An encoder includes memory and circuitry which: (i) encodes an image block; (ii) when encoding the image block: binarizes coefficient information indicating coefficients of the image block; and controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and (iii) when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is applied to the data string and a predetermined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is applied to the data string and the predetermined condition is satisfied; binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is applied to the data string; and subtracts 1 from a value of an initial non-zero coefficient when no arithmetic encoding is applied to the data string when encoding the image block.
    Type: Application
    Filed: May 22, 2023
    Publication date: November 30, 2023
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Yusuke KATO
  • Publication number: 20230388536
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: derives an average value of motion vector values of two prediction candidates in a prediction candidate list for a merge mode, and registers the average value derived as new motion vector information of a new prediction candidate into the prediction candidate list; and derives new correction processing information regarding correction processing of a prediction image, and registers the new correction processing information derived into the prediction candidate list in association with the new motion vector information.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 30, 2023
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Patent number: 11831903
    Abstract: An encoder that; obtains two prediction images by performing motion compensation using two motion vectors; obtains a gradient value of each of pixels included in the two prediction images; derives a local motion estimation value for each of sub-blocks based on the pixel value and the gradient value of each of the pixels, the sub-blocks being obtained by partitioning the current block; and generates a final prediction image for the current block using the pixel value and the gradient value of each of the pixels, and the local motion estimation value derived for each of the sub-blocks. Each of the pixels in the two prediction images is interpolated with sub-pixel accuracy, and a reference range for the interpolation is included in a normal reference range that is referred to for motion compensation for the current block in normal inter prediction performed without using the local motion estimation value.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: November 28, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Takashi Hashimoto
  • Patent number: 11831864
    Abstract: An encoder is disclosed which includes circuitry and memory. Using the memory, the circuitry, in a first operating mode, derives first motion vectors for a first block obtained by splitting a picture, and generates a prediction image corresponding to the first block, with a bi-directional optical flow flag settable to true, and by referring to spatial gradients of luminance generated based on the first motion vectors. Using the memory, the circuitry, in a second operating mode, derives second motion vectors for a sub-block obtained by splitting a second block, the second block being obtained by splitting the picture, and generates a prediction image corresponding to the sub-block, with the bi-directional optical flow flag set to false.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: November 28, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh
  • Patent number: 11831919
    Abstract: An encoding method includes determining video format information, (i) setting each of all frames or all fields which are included in the video, as a picture, regardless of whether the video format is the interlace format or the progressive format, (ii) setting a POC indicating display order to each of all of the set pictures one by one, the POC being different each other, and encoding a picture to be encoded which is the frame or the field with reference to a picture previously encoded before encoding the picture to be encoded. In the encoding, the video is encoded with a syntax structure which is not dependent on the video format, the video format information is encoded in a header of a sequence which is a unit of the video, and the encoded bit stream is generated.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: November 28, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Kazuhito Kimura, Hideyuki Ohgose, Hiroshi Arakawa, Koji Arimura