Patents by Inventor Kiyohiro Kawasaki

Kiyohiro Kawasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080018820
    Abstract: A four-mask process and a three-mask process proposal are constructed for a TN-type liquid crystal display device and an IPS-type liquid crystal device in which the formation of a passivation insulating layer is not required by streamlining the formation of a scan line and a pseudo-pixel element, both comprising a laminate made of a transparent conductive layer and a metal layer, at the same time and the formation of the transparent conductive pixel electrode by removing the metal layer on the pseudo-pixel electrode at the time of the formation of the opening in the gate insulating layer, by streamlining the treatment of the formation process of the contact and the formation process of the protective insulating layer using one photomask due to the introduction of half-tone exposure technology, and the formation of source-drain wires for etch-stop type insulating gate-type transistor using a photosensitive organic insulating layer and leaving the photosensitive organic insulating layer unchanged on source-drai
    Type: Application
    Filed: September 20, 2007
    Publication date: January 24, 2008
    Inventor: Kiyohiro Kawasaki
  • Publication number: 20080018819
    Abstract: A four-mask process and a three-mask process proposal are constructed for a TN-type liquid crystal display device and an IPS-type liquid crystal device in which the formation of a passivation insulating layer is not required by streamlining the formation of a scan line and a pseudo-pixel element, both comprising a laminate made of a transparent conductive layer and a metal layer, at the same time and the formation of the transparent conductive pixel electrode by removing the metal layer on the pseudo-pixel electrode at the time of the formation of the opening in the gate insulating layer, by streamlining the treatment of the formation process of the contact and the formation process of the protective insulating layer using one photomask due to the introduction of half-tone exposure technology, and the formation of source-drain wires for etch-stop type insulating gate-type transistor using a photosensitive organic insulating layer and leaving the photosensitive organic insulating layer unchanged on source-drai
    Type: Application
    Filed: September 20, 2007
    Publication date: January 24, 2008
    Inventor: Kiyohiro Kawasaki
  • Publication number: 20080020501
    Abstract: A four-mask process and a three-mask process proposal are constructed for a TN-type liquid crystal display device and an IPS-type liquid crystal device in which the formation of a passivation insulating layer is not required by streamlining the formation of a scan line and a pseudo-pixel element, both comprising a laminate made of a transparent conductive layer and a metal layer, at the same time and the formation of the transparent conductive pixel electrode by removing the metal layer on the pseudo-pixel electrode at the time of the formation of the opening in the gate insulating layer, by streamlining the treatment of the formation process of the contact and the formation process of the protective insulating layer using one photomask due to the introduction of half-tone exposure technology, and the formation of source-drain wires for etch-stop type insulating gate-type transistor using a photosensitive organic insulating layer and leaving the photosensitive organic insulating layer unchanged on source-drai
    Type: Application
    Filed: September 20, 2007
    Publication date: January 24, 2008
    Inventor: KIYOHIRO KAWASAKI
  • Patent number: 7321404
    Abstract: In the conventional manufacture method that has reduced the number of manufacture processes by forming semiconductor layers and source-drain wires for a channel-etch type insulating gate transistor in a single photo etching process using halftone exposure technology, the channel length increases when the photosensitive resin pattern used at above formation process of source-drain patterning is reduced. Hence the manufacture tolerance (margin) is small, and the yield decreases when the distance between the source wire and drain wire is shortened.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: January 22, 2008
    Assignee: AU Optronics Corporation
    Inventor: Kiyohiro Kawasaki
  • Patent number: 7292288
    Abstract: A four-mask process and a three-mask process proposal are constructed for a TN-type liquid crystal display device and an IPS-type liquid crystal device in which the formation of a passivation insulating layer is not required by streamlining the formation of a scan line and a pseudo-pixel element, both comprising a laminate made of a transparent conductive layer and a metal layer, at the same time and the formation of the transparent conductive pixel electrode by removing the metal layer on the pseudo-pixel electrode at the time of the formation of the opening in the gate insulating layer, by streamlining the treatment of the formation process of the contact and the formation process of the protective insulating layer using one photomask due to the introduction of half-tone exposure technology, and the formation of source-drain wires for etch-stop type insulating gate-type transistor using a photosensitive organic insulating layer and leaving the photosensitive organic insulating layer unchanged on source-drai
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: November 6, 2007
    Assignee: AU Optronics Corporation
    Inventor: Kiyohiro Kawasaki
  • Publication number: 20070242178
    Abstract: Development of 3-mask process to reduce the manufacturing cost of LCD-display device successively following 4-mask process. Opening formation process and pixel electrode formation process which is sequentially done following the opening formation process are treated with one photo-mask without using halftone exposure technology by forming source-drain wires comprising a low-resistance metal layer and a heat-resistant metal layer, the latter is capable of being removed with etching gas for etching gate insulating layer (and passivation insulating layer), giving protection means at least for the channel and the data line of the insulating gate transistor, forming openings in the insulating layers including the gate insulating layer with photosensitive resins having counter-taper cross sections, removing the exposed low-resistance metal in the openings, forming pixel electrode with the photosensitive resins as a lift-off material to lift off the conductive thin film for pixel electrode.
    Type: Application
    Filed: August 9, 2006
    Publication date: October 18, 2007
    Applicants: Quanta Display Inc., Quanta Display Japan Inc.
    Inventors: Kiyohiro Kawasaki, Jia-Tsung Lee, Chien-Hung Chen
  • Patent number: 7023416
    Abstract: To provide a high-response and wide-viewing-angle liquid crystal panel capable of causing a transition of liquid crystal, which is called the OCB mode, into a bend configuration in a short time, there is provided a period in which a potential difference higher than that in a normal image display period is continuously applied between gate lines and opposing electrodes or between pixel electrodes and the opposing electrodes of the liquid crystal panel. Also, ingenuities are exercised on the period in which the potential difference is continuously applied between them and on the structure of picture elements.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: April 4, 2006
    Assignee: Matsushita Electric Industrial Co., LTD
    Inventors: Mika Nakamura, Katsumi Adachi, Kiyohiro Kawasaki, Katsuji Hattori
  • Publication number: 20050212986
    Abstract: A four-mask process and a three-mask process proposal are constructed for a TN-type liquid crystal display device and an IPS-type liquid crystal device in which the formation of a passivation insulating layer is not required by streamlining the formation of a scan line and a pseudo-pixel element, both comprising a laminate made of a transparent conductive layer and a metal layer, at the same time and the formation of the transparent conductive pixel electrode by removing the metal layer on the pseudo-pixel electrode at the time of the formation of the opening in the gate insulating layer, by streamlining the treatment of the formation process of the contact and the formation process of the protective insulating layer using one photomask due to the introduction of half-tone exposure technology, and the formation of source-drain wires for etch-stop type insulating gate-type transistor using a photosensitive organic insulating layer and leaving the photosensitive organic insulating layer unchanged on source-drai
    Type: Application
    Filed: October 14, 2004
    Publication date: September 29, 2005
    Applicant: Quanta Display Inc.
    Inventor: Kiyohiro Kawasaki
  • Publication number: 20050212985
    Abstract: In a conventional manufacturing process where the number of manufacturing processes is reduced to form a semiconductor layer of a channel etch-type insulating gate-type transistor and source-drain wires in one photographic etching processing using half-tone exposure technology, the manufacturing margin is narrow, lowering the yield if the distance between the source and the drain wire shortens.
    Type: Application
    Filed: March 28, 2005
    Publication date: September 29, 2005
    Applicant: Quanta Display Japan Inc.
    Inventor: Kiyohiro Kawasaki
  • Publication number: 20050185126
    Abstract: Four-mask and three-mask process for TN-type liquid crystal display made with combination of the formation process of the signal line and the formation process of the pixel electrode by forming a signal line of a laminate of a transparent conductive layer and a low-resistance metal layer and a pseudo-pixel electrode, removing a low resistance metal layer on the pseudo-pixel electrode during formation of an opening in a passivation insulating layer to obtain a pixel electrode having a transparent conductive layer. Contact formation process by removing the gate insulating layer during formation of the semiconductor layer, and the formation process of the contact and the formation process of the semiconductor layer, or the formation process of the scan line and the formation process of the contact or the formation process of the scan line and the formation process of the semiconductor layer by introducing half-tone exposure technology.
    Type: Application
    Filed: November 24, 2004
    Publication date: August 25, 2005
    Applicant: Quanta Display Inc.
    Inventor: Kiyohiro Kawasaki
  • Publication number: 20050168667
    Abstract: In the 5-mask and 4-mask processes, during the formation of contacts, breakings in the pixel electrodes and unstable contacts that follow tend to occur. Using source-drain wires consisting of a lamination layer of a heat resistant metal layer and an aluminum layer, the undercuts of the passivation insulating layer formed by removing an aluminum layer in the openings on drain electrodes is resolved by adding manufacturing processes to enlarge the said openings.
    Type: Application
    Filed: January 28, 2005
    Publication date: August 4, 2005
    Applicant: Quanta Display Inc.
    Inventors: Kiyohiro Kawasaki, Ching-Lung Chiang
  • Publication number: 20050168666
    Abstract: In the conventional manufacture method that has reduced the number of manufacture processes by forming semiconductor layers and source-drain wires for a channel-etch type insulating gate transistor in a single photo etching process using halftone exposure technology, the channel length increases when the photosensitive resin pattern used at above formation process of source-drain patterning is reduced. Hence the manufacture tolerance (margin) is small, and the yield decreases when the distance between the source wire and drain wire is shortened.
    Type: Application
    Filed: October 14, 2004
    Publication date: August 4, 2005
    Applicant: Quanta Display Inc.
    Inventor: Kiyohiro Kawasaki
  • Publication number: 20050157236
    Abstract: When the channel length is shortened in a conventional manufacturing method with a reduced numbers of processes, the manufacturing margin is decreased, causing a lower yield. A four-mask process and a three-mask process proposal are constructed for a TN type liquid crystal display device made by combining a novel technology for streamlining the signal wire formation process and pixel electrode formation process by adopting a half-tone exposure technology, a novel technology for streamlining the electrode terminal protective layer formation process by adopting a half-tone exposure technology in a publicly known source and drain wiring anodization process, and a novel technology for streamlining the scan line formation process and the semiconductor layer formation process, the scan line formation process and the etch stop layer formation process, and the scan line formation process and the contact formation process.
    Type: Application
    Filed: September 28, 2004
    Publication date: July 21, 2005
    Applicant: Quanta Display Inc.
    Inventor: Kiyohiro Kawasaki
  • Patent number: 6843904
    Abstract: An in-substrate selective electrochemical treatment system for finding and repairing pinholes of an active substrate including holding an insulating substrate having a conductive pattern, supplying a predetermined amount of a specified chemical solution to a specified region on the insulating substrate and confining it in the specified region, locating the reversed polarity electrode plate close to the insulating substrate such that the reversed polarity electrode plate comes in contact with the chemical solution on the upper surface of the insulating substrate, bringing the electrode into contact with the conductive pattern in the periphery of the insulating substrate, applying a specified direct current between the electrode and the reversed polarity electrode plate, and measuring a value of current flowing between the electrode and the reversed polarity electrode plate.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: January 18, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kiyohiro Kawasaki
  • Publication number: 20040222958
    Abstract: To provide a high-response and wide-viewing-angle liquid crystal panel capable of causing a transition of liquid crystal, which is called the OCB mode, into a bend configuration in a short time, there is provided a period in which a potential difference higher than that in a normal image display period is continuously applied between gate lines and opposing electrodes or between pixel electrodes and the opposing electrodes of the liquid crystal panel.
    Type: Application
    Filed: June 15, 2004
    Publication date: November 11, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mika Nakamura, Katsumi Adachi, Kiyohiro Kawasaki, Katsuji Hattori
  • Publication number: 20020186330
    Abstract: In the channel etched TFT 5-mask process, an excessive etching is generated over the drain electrode at the stage of forming an opening. Also, in the passivation insulating layer forming process, the characteristic of the transistor is deteriorated with ease. In addition, the production process is so long that the process cost cannot be reduced.
    Type: Application
    Filed: October 4, 2001
    Publication date: December 12, 2002
    Inventor: Kiyohiro Kawasaki
  • Patent number: 6424400
    Abstract: A display panel capable of supplying necessary signals and power source at low resistance to a semiconductor integrated circuit chip mounted on a display panel is disclosed. Herein, electric signals are supplied to terminal electrodes of the scanning lines and signal lines by mounting a driving integrated circuit chip directly on the terminal electrode disposed on the active substrate. Further, electric connection to the driving integrated circuit chip is achieved by mounting a printed circuit board having a larger opening than the outside shape of the driving integrated circuit chip and forming wiring lines at the mounting position of the driving integrated circuit chip mounted on the active substrate and its vicinity, on outside of the image display region of the active substrate.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: July 23, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kiyohiro Kawasaki
  • Patent number: 6285433
    Abstract: When pressure-bonding a conductive pattern (12) of TCP film (4) to a terminal electrode (5) of an active substrate (2) via a photo-curing resin (23), a translucent resin (22) is filled into openings (21a, 21b) formed to penetrate an opaque film (20) and the conductive pattern (12) to complete pressure-bonding and light rays (30) are applied to the joint surfaces of the conductive pattern (12) and a connection terminal (5) via the translucent resin (22) from the side of the TCP film (4) where the pattern (12) is not formed to cure the photo-curing resin (23), whereby TCP film can be mounted to a liquid crystal panel at low temperatures.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: September 4, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kiyohiro Kawasaki
  • Patent number: 6239856
    Abstract: A metal thin film by laser CVD, or an opaque film 30, by micro-jet application of an organic resin containing either one or both of black pigment and dye, is formed on the outer side of a substrate 200 or a substrate 900 at a position corresponding to a light point defect detected in image inspection after panel assembling step or after mounting step, to convert into a black point, and therefore by converting the light point defect into a black point, the yield is enhanced.
    Type: Grant
    Filed: April 28, 1999
    Date of Patent: May 29, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideyuki Imura, Kiyohiro Kawasaki
  • Patent number: 5459092
    Abstract: A liquid crystal image display device comprising an insulating substrate having plural scanning lines and signal lines and a switching device and a pixel electrode provided for each of pixels, a light-transmissive insulating substrate having a transparent conductive counter electrode and liquid crystal filled between both substrates, wherein said signal lines or scanning lines for supplying electric signals to said switching devices and conductive paths for connecting said switching devices with the pixel electrodes are coated with an thick organic film so as to be electrically isolated from said liquid crystal.
    Type: Grant
    Filed: September 20, 1993
    Date of Patent: October 17, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kiyohiro Kawasaki, Hiroyoshi Takezawa