Patents by Inventor Kiyoshi Adachi
Kiyoshi Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8460011Abstract: A substrate connector utilizes a plurality of conductive terminals, each of which are held in a single terminal-receiving cavity of a substrate. The terminals of the connector have a hook-shape with a retention portions in the form of a fork having a central slot and two free ends spaced apart from the retention portion and which protrude out of their cavities for contacting contact pads on opposing circuit boards. The retention portions engage abutments formed in the cavities to hold the terminals in place but do so in a manner that permits the terminals to move in both the vertical and horizontal directions.Type: GrantFiled: July 9, 2012Date of Patent: June 11, 2013Assignee: Molex IncorporatedInventor: Kiyoshi Adachi
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Publication number: 20120276790Abstract: A substrate connector utilizes a plurality of conductive terminals, each of which are held in a single terminal-receiving cavity of a substrate. The terminals of the connector have a hook-shape with a retention portions in the form of a fork having a central slot and two free ends spaced apart from the retention portion and which protrude out of their cavities for contacting contact pads on opposing circuit boards. The retention portions engage abutments formed in the cavities to hold the terminals in place but do so in a manner that permits the terminals to move in both the vertical and horizontal directions.Type: ApplicationFiled: July 9, 2012Publication date: November 1, 2012Applicant: MOLEX INCORPORATEDInventor: Kiyoshi ADACHI
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Patent number: 8235730Abstract: A substrate connector utilizes a plurality of conductive terminals, each of which are held in a single terminal-receiving cavity of a substrate. The terminals of the connector have a hook-shape with a retention portions in the form of a fork having a central slot and two free ends spaced apart from the retention portion and which protrude out of their cavities for contacting contact pads on opposing circuit boards. The retention portions engage abutments formed in the cavities to hold the terminals in place but do so in a manner that permits the terminals to move in both the vertical and horizontal directions.Type: GrantFiled: December 20, 2007Date of Patent: August 7, 2012Assignee: Molex IncorporatedInventor: Kiyoshi Adachi
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Publication number: 20100173506Abstract: A substrate connector utilizes a plurality of conductive terminals, each of which are held in a single terminal-receiving cavity of a substrate. The terminals of the connector have a hook-shape with a retention portions in the form of a fork having a central slot and two free ends spaced apart from the retention portion and which protrude out of their cavities for contacting contact pads on opposing circuit boards. The retention portions engage abutments formed in the cavities to hold the terminals in place but do so in a manner that permits the terminals to move in both the vertical and horizontal directions.Type: ApplicationFiled: December 20, 2007Publication date: July 8, 2010Applicant: MOLEX INCORPORATEDInventor: Kiyoshi Adachi
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Patent number: 7275938Abstract: A socket (10) for a semiconductor package having a plurality of solder balls (5) at its bottom surface. The socket (10) includes a socket body having a plurality of contacts (11) arranged in a shape to correspond in arrangement to the solder balls (5) of the semiconductor package. Each of the contacts (11) has a first and second contact piece contactable with the corresponding solder ball (5) while clamping the corresponding solder ball (5) from both side. The socket (10) includes a placing plate (13) capable of moving between a first position and a second position. The first, or semiconductor placing, position is where the semiconductor package is placed on the placing plate (13) without contact of the solder balls (5) of the semiconductor package with the first and second contact pieces, and the second, or contact, position is where the solder balls (5) of the placed semiconductor package are contactable with the corresponding first and second contact pieces.Type: GrantFiled: June 13, 2002Date of Patent: October 2, 2007Assignee: Molex IncorporatedInventors: Tomohiro Nakano, Kiyoshi Adachi, Akira Kaneshige
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Patent number: 7021944Abstract: The present invention is directed to a socket connector having a plurality of contacts for contacting with a plurality of solder balls arranged on one of the surface of a semiconductor package, and a socket body in which a plurality of mounting holes are provided for mounting respective contacts. The mounting hole is provided with a through-hole pierced in a height direction of the socket body and a contact support hole of the contact. Each contact is provided with an upright piece extending through the through-hole, and a support piece extending from the upright piece to be inserted into the support hole. A contact portion for contacting with the solder ball is formed at a tip end portion of the upright piece. The support piece extends from the proximal end portion of the upright piece.Type: GrantFiled: October 2, 2002Date of Patent: April 4, 2006Assignee: Molex IncorporatedInventors: Kiyoshi Adachi, Masanori Yagi
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Patent number: 6981881Abstract: The present invention is directed to a socket connector (TS) having a plurality of contacts to be brought into contact with a plurality of solder balls (S) of a semiconductor package, a socket body (15) in which a mounting hole (11) is provided for each contact (10), a through-hole pierced in a height direction of the socket body and a contact support hole (13) are provided. Each contact (10) is provided with an upright piece (101) extending through the through-hole, a support piece extending from a proximal end side of the upright piece to be inserted into the through-hole and a contact portion (103) formed at a free end portion of the upright piece to be brought into contact with the solder ball. Each contact portion is arranged at a height level such that it projects from the surface of the socket body. A guide projection (14) is provided at a position to face an associated contact portion of each contact.Type: GrantFiled: October 2, 2002Date of Patent: January 3, 2006Assignee: Molex IncorporatedInventors: Kiyoshi Adachi, Masanori Yagi
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Publication number: 20050070134Abstract: The present invention is directed to a socket connector having a plurality of contacts for contacting with a plurality of solder balls arranged on one of the surface of a semiconductor package, and a socket body in which a plurality of mounting holes are provided for mounting respective contacts. The mounting hole is provided with a through-hole pierced in a height direction of the socket body and a contact support hole of the contact. Each contact is provided with an upright piece extending through the through-hole, and a support piece extending from the upright piece to be inserted into the support hole. A contact portion for contacting with the solder ball is formed at a tip end portion of the upright piece. The support piece extends from the proximal end portion of the upright piece.Type: ApplicationFiled: October 2, 2002Publication date: March 31, 2005Inventors: Kiyoshi Adachi, Masanori Yagi
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Publication number: 20050070135Abstract: The present invention is directed to a socket connector (TS) having a plurality of contacts to be brought into contact with a plurality of solder balls (S) of a semiconductor package, a socket body (15) in which a mounting hole (11) is provided for each contact (10), a through-hole pierced in a height direction of the socket body and a contact support hole (13) are provided. Each contact (10) is provided with an upright piece (101) extending through the through-hole, a support piece extending from a proximal end side of the upright piece to be inserted into the through-hole and a contact portion (103) formed at a free end portion of the upright piece to be brought into contact with the solder ball. Each contact portion is arranged at a height level such that it projects from the surface of the socket body. A guide projection (14) is provided at a position to face an associated contact portion of each contact.Type: ApplicationFiled: October 2, 2002Publication date: March 31, 2005Inventors: Kiyoshi Adachi, Masanori Yagi
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Patent number: 6859079Abstract: An operation control signal for an oscillator producing an internal clock signal phase-locked with a basic clock signal is applied to a second internal clock generating circuit. In the second internal clock generating circuit, with reference to the applied operation control signal, a control signal adjusting a phase and/or frequency difference between a synchronization target signal and a second internal clock signal is produced to adjust a phase and/or frequency of the second internal clock signal. A plurality of internal clock signals different in phase and/or frequency can be generated accurately and stably.Type: GrantFiled: May 22, 2003Date of Patent: February 22, 2005Assignee: Renesas Technology Corp.Inventors: Yoshiyuki Haraguchi, Kiyoshi Adachi, Takashi Utsumi, Danichi Komatsu, Hiroyuki Kosaka
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Publication number: 20040157576Abstract: A receiver of a communication device includes: a differential amplification circuit; two capacitors for applying only the amplitude components of two input clock signals complementary to each other to the gates of two N-channel MOS transistors of the differential amplification circuit; and an initialization circuit for applying a predetermined reference potential to the gates of the two N-channel MOS transistors in a non data communication state. Thus, it is possible to make a quick and stable transition from a non data communication state to a data communication state.Type: ApplicationFiled: November 19, 2003Publication date: August 12, 2004Applicant: RENESAS TECHNOLOGY CORP.Inventors: Kiyoshi Adachi, Danichi Komatsu, Takashi Utsumi, Yoshiyuki Haraguchi, Hiroyuki Kousaka, Masahiro Yokoyama
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Publication number: 20040104753Abstract: An operation control signal for an oscillator producing an internal clock signal phase-locked with a basic clock signal is applied to a second internal clock generating circuit. In the second internal clock generating circuit, with reference to the applied operation control signal, a control signal adjusting a phase and/or frequency difference between a synchronization target signal and a second internal clock signal is produced to adjust a phase and/or frequency of the second internal clock signal. A plurality of internal clock signals different in phase and/or frequency can be generated accurately and stably.Type: ApplicationFiled: May 22, 2003Publication date: June 3, 2004Applicant: Renesas Technology Corp.Inventors: Yoshiyuki Haraguchi, Kiyoshi Adachi, Takashi Utsumi, Danichi Komatsu, Hiroyuki Kosaka
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Publication number: 20040063241Abstract: A socket (10) for a semiconductor package having a plurality of solder balls (5) at its bottom surface. The socket (10) includes a socket body having a plurality of contacts (11) arranged in a shape to correspond in arrangement to the solder balls (5) of the semiconductor package. Each of the contacts (11) has a first and second contact piece contactable with the corresponding solder ball (5) while clamping the corresponding solder ball (5) from both side. The socket (10) includes a placing plate (13) capable of moving between a first position and a second position. The first, or semiconductor placing, position is where the semiconductor package is placed on the placing plate (13) without contact of the solder balls (5) of the semiconductor package with the first and second contact pieces, and the second, or contact, position is where the solder balls (5) of the placed semiconductor package are contactable with the corresponding first and second contact pieces.Type: ApplicationFiled: August 5, 2003Publication date: April 1, 2004Inventors: Tomohiro Nakano, Kiyoshi Adachi, Akira Kaneshige
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Publication number: 20030098506Abstract: A plurality of patterned lead wires equally spaced are arranged on both side ends of a lead substrate, a plurality of pads equally spaced are arranged on both side ends of a semiconductor chip, and the semiconductor chip is mounted on the lead substrate so as to connect the pads of each side end of the semiconductor chip with the patterned lead wires of the corresponding side end of the lead substrate. Widths of the patterned lead wires are smaller than a width of an open space between each pair of pads adjacent to each other in the semiconductor chip, and widths of the pads of the semiconductor chip are larger than a width of an open space between each pair of patterned lead wires adjacent to each other.Type: ApplicationFiled: May 15, 2002Publication date: May 29, 2003Inventors: Yoshiyuki Haraguchi, Kiyoshi Adachi
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Patent number: 6471524Abstract: An IC socket has a socket body with a plurality of terminal mounting holes, and terminals of electrical connector mounted in the terminal mounting holes and each of the terminals of electrical connector having a contact portion, a spring portion and a tail portion for performing a burn-in test of an IC package by mounting the IC package on the socket body so as to place a solder ball as a contact of the IC package corresponding to the contact portion and contacting the contact portion with the solder ball. The spring portion of each of the terminals of electrical connector is formed into meandering shape as a whole by stacking a plurality of r-shaped portions in series with alternately orienting each r-surface thereof in the opposite direction from the contact portion toward the tail portion.Type: GrantFiled: May 25, 2000Date of Patent: October 29, 2002Assignee: Molex IncorporatedInventors: Tomohiro Nakano, Akira Kaneshige, Kiyoshi Adachi
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Patent number: 6469946Abstract: A semiconductor memory includes a test memory cell block and a test memory cell selector. The test memory cell block includes a plurality of memory cells that store bit values opposite to each other in adjacent memory cells. The test memory cell selector varies the potential of precharged bit lines by asserting one of the word lines of the test memory cell block, and selects as a memory cell to be tested, a memory cell that is connected to a bit line between the bit lines that changes their potentials in the test memory cell block. It can solve a problem of a conventional semiconductor memory in that it is very difficult to test the function of a circuit installed for suppressing the interference between adjacent bit lines.Type: GrantFiled: June 13, 2001Date of Patent: October 22, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takashi Utsumi, Kiyoshi Adachi
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Publication number: 20020054526Abstract: A semiconductor memory includes a test memory cell block and a test memory cell selector. The test memory cell block includes a plurality of memory cells that store bit values opposite to each other in adjacent memory cells. The test memory cell selector varies the potential of precharged bit lines by asserting one of the word lines of the test memory cell block, and selects as a memory cell to be tested, a memory cell that is connected to a bit line between the bit lines that changes their potentials in the test memory cell block. It can solve a problem of a conventional semiconductor memory in that it is very difficult to test the function of a circuit installed for suppressing the interference between adjacent bit lines.Type: ApplicationFiled: June 13, 2001Publication date: May 9, 2002Inventors: Takashi Utsumi, Kiyoshi Adachi
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Patent number: 6353337Abstract: An output buffer includes a reference capacitor; a constant current source connected in series with the reference capacitor, for generating a reference voltage with a constant gradient by charging the reference capacitor; a first transistor having its source connected to a capacitive load, and its gate connected to the connecting point of the reference capacitor and the first constant current source to be supplied with the reference voltage; a second transistor connected between the drain of the first transistor and a voltage source; a third transistor connected between the capacitive load and the voltage source; and a fourth transistor connected to the control terminal of the second transistor and to the control terminal of the third transistor, for switching the second and third transistors from an OFF state to an ON state when the first transistor is turned on.Type: GrantFiled: December 19, 2000Date of Patent: March 5, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Koji Nasu, Kiyoshi Adachi
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Publication number: 20020008543Abstract: An output buffer includes a reference capacitor; a constant current source connected in series with the reference capacitor, for generating a reference voltage with a constant gradient by charging the reference capacitor; a first transistor having its source connected to a capacitive load, and its gate connected to the connecting point of the reference capacitor and the first constant current source to be supplied with the reference voltage; a second transistor connected between the drain of the first transistor and a voltage source; a third transistor connected between the capacitive load and the voltage source; and a fourth transistor connected to the control terminal of the second transistor and to the control terminal of the third transistor, for switching the second and third transistors from an OFF state to an ON state when the first transistor is turned on.Type: ApplicationFiled: December 19, 2000Publication date: January 24, 2002Inventors: Koji Nasu, Kiyoshi Adachi
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Patent number: 5690281Abstract: A socket having a structure which is suitable for electrical connection with ball-shaped lead terminals of an IC package is shown. When a cover (12) is pushed down, a latch (70) moves away, a slide plate (40) slides toward the positive side in an X direction through levers (52) and (50) and movable shaft (58) and both arms of each contact maker (30) open. Each lead terminal (solder ball) (32a) of the BGA package (32) is freely inserted between both arms of a respective contact maker (30) when in the open state. When cover (12) rises to its highest position, slide plate (40) slides in the reverse direction by the spring force of a compression coil spring, thereby returning to the its original position and both arms of each contact (32) engage each lead terminal (32a) in such a way as to hold it from opposite sides with a result that an electrical connection based on compressive engagement is obtained between each contact element (30) and each respective terminal (32a).Type: GrantFiled: August 22, 1995Date of Patent: November 25, 1997Assignee: Texas Instruments IncorporatedInventors: Kiyokazu Ikeya, Kiyoshi Adachi, Masao Tohyama, Tomohiro Nakano