Patents by Inventor Kiyoshi Inoue

Kiyoshi Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11135243
    Abstract: The present invention provides a damaged part treatment composition for repairing a damaged part of a target tissue that includes a stem cell-conditioned medium obtained by culturing stem cells; a damaged part treatment method for repairing or restoring a damaged part of a target tissue that includes administering the damaged part treatment composition to a patient having the target tissue for the damaged part treatment composition in an amount therapeutically effective for repairing the damaged part of the target tissue; a method of treating cerebral infarction that includes administering the damaged part treatment composition to a cerebral infarct patient in an amount effective for repairing a damaged part of the brain; and a method of treating a CNS disease that includes administering, as a CNS disease treatment composition, the damaged part treatment composition to a CNS disease patient in a therapeutically effective amount.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: October 5, 2021
    Assignee: SHED Tech Corporation
    Inventors: Minoru Ueda, Yoichi Yamada, Katsumi Ebisawa, Akihito Yamamoto, Kiyoshi Sakai, Kohki Matsubara, Hisashi Hattori, Masahiko Sugiyama, Takanori Inoue
  • Publication number: 20210302897
    Abstract: A heating device includes a heating unit that heats a member to be heated, which is transported, as a result of a contact portion of the heating unit being in contact with the member to be heated, a heat pipe that is disposed on a portion of the heating unit different from the contact portion in such a manner as to extend in a widthwise direction crossing a transport direction of the member to be heated and that includes a crimped portion formed at a first end of the heat pipe, a rotating body that rotates in such a manner as to press the member to be heated against the contact portion of the heating unit, and a power input unit that is disposed on a second end side of the heat pipe and that inputs a rotational force at least to the rotating body.
    Type: Application
    Filed: August 5, 2020
    Publication date: September 30, 2021
    Applicant: FUJIFILM Business Innovation Corp.
    Inventors: Sou MORIZAKI, Toru INOUE, Kazuyoshi ITOH, Toshiyuki MIYATA, Motoharu NAKAO, Kiyoshi KOYANAGI, Toko HARA
  • Publication number: 20210302881
    Abstract: A heating device includes a surface heater unit including a heater portion that generates heat in a region extending in a longitudinal direction, the surface heater unit heating a heating object; and a heat conducting unit having a hollow space in which working fluid is sealed and including a working-fluid transport unit that transports the working liquid in the longitudinal direction, the heat conducting unit being in contact with the surface heater unit. The working-fluid transport unit is provided unevenly in a direction crossing the longitudinal direction in the hollow space.
    Type: Application
    Filed: July 15, 2020
    Publication date: September 30, 2021
    Applicant: FUJIFILM Business Innovation Corp.
    Inventors: Toshiyuki MIYATA, Kazuyoshi ITOH, Toru INOUE, Toko HARA, Motoharu NAKAO, Sou MORIZAKI, Kiyoshi KOYANAGI
  • Patent number: 11133191
    Abstract: The etching mask 80 for screen printing according to one embodiment of the present invention includes aliphatic polycarbonate. Further, the method of producing an oxide layer (the channel 44) according to one embodiment of the present invention includes: an etching-mask forming step of forming a pattern of the etching mask 80 including aliphatic polycarbonate; a contact step of, after the etching-mask forming step, contacting the oxide layer with a solution for dissolving a portion of the oxide layer (the channel 44) which is not protected by the etching mask 80; and a heating step of, after the contact step, heating the oxide layer (the channel 44) and the etching mask 80 to or above a temperature at which the etching mask 80 is decomposed.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: September 28, 2021
    Assignees: JAPAN ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, SUMITOMO SEIKA CHEMICALS CO., LTD.
    Inventors: Satoshi Inoue, Tatsuya Shimoda, Kazuhiro Fukada, Kiyoshi Nishioka, Nobutaka Fujimoto, Masahiro Suzuki
  • Publication number: 20210276651
    Abstract: A saddle riding vehicle includes a light emitting device (15, 23), an object information acquisition device (17, 26), a control board (20) and an accommodating case (14). The light emitting device (15, 23) radiates light to an outer side of the vehicle, and the object information acquisition device (17, 26) acquires information of an object outside the vehicle. The control board (20), to which the light emitting device (15, 23) is attached, controls the light emitting device. The accommodating case (14) accommodates the light emitting device (20), the object information acquisition device (17, 26), and the control board (20). The object information acquisition device (17, 26) is supported by the control board (20).
    Type: Application
    Filed: August 29, 2017
    Publication date: September 9, 2021
    Inventors: Naoki Murasawa, Kazuhiko Mori, Kiyoshi Katagiri, Taishi Inoue, Manabu Ichikawa, Tsuyoshi Oguchi
  • Patent number: 11106165
    Abstract: A heating device includes a heating unit that heats a member to be heated, which is transported, as a result of a contact portion of the heating unit being in contact with the member to be heated, a heat pipe that is disposed on a portion of the heating unit different from the contact portion in such a manner as to extend in a widthwise direction crossing a transport direction of the member to be heated and that includes a crimped portion formed at a first end of the heat pipe, and a power-supply connection unit that is disposed on a second end side of the heat pipe and that is connected to a wiring line through which power is supplied to the heating unit.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: August 31, 2021
    Assignee: FUJIFILM Business Innovation Corp.
    Inventors: Kazuyoshi Itoh, Toshiyuki Miyata, Toko Hara, Kiyoshi Koyanagi, Sou Morizaki, Motoharu Nakao, Toru Inoue
  • Patent number: 9895911
    Abstract: When trial printing is executed in a repeat printing mode, trial printing is performed in size of an image of one piece in a layout in which a plurality of images are supposed to be printed in the repeat printing mode normally. A user who has checked a finished state of the trial printing sets, when the finished state is in a desired state, the recording paper on which the trial printing is performed to the paper feed portion again and executes the repeat printing. Thereby, in a blank space excluding a print image which is printed with a first time trial printing, a scheduled quantity of a plurality of images are repeatedly printed.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: February 20, 2018
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Kiyoshi Inoue
  • Publication number: 20170066263
    Abstract: When trial printing is executed in a repeat printing mode, trial printing is performed in size of an image of one piece in a layout in which a plurality of images are supposed to be printed in the repeat printing mode normally. A user who has checked a finished state of the trial printing sets, when the finished state is in a desired state, the recording paper on which the trial printing is performed to the paper feed portion again and executes the repeat printing. Thereby, in a blank space excluding a print image which is printed with a first time trial printing, a scheduled quantity of a plurality of images are repeatedly printed.
    Type: Application
    Filed: November 18, 2016
    Publication date: March 9, 2017
    Inventor: Kiyoshi INOUE
  • Patent number: 9535383
    Abstract: When trial printing is executed in a repeat printing mode, trial printing is performed in size of an image of one piece in a layout in which a plurality of images are supposed to be printed in the repeat printing mode normally. A user who has checked a finished state of the trial printing sets, when the finished state is in a desired state, the recording paper on which the trial printing is performed to the paper feed portion again and executes the repeat printing. Thereby, in a blank space excluding a print image which is printed with a first time trial printing, a scheduled quantity of a plurality of images are repeatedly printed.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: January 3, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Kiyoshi Inoue
  • Patent number: 9007830
    Abstract: A nonvolatile memory apparatus includes a control unit, a main storage medium with an electrically reloadable nonvolatile memory adapted to be operable even when faulty memory cells exist therein, and a storage region storing registered address values of faulty regions of the main storage medium containing the faulty memory cells. Data which is stored in the electrically reloadable nonvolatile memory is divided into blocks, each block having a plurality of data to be administrated and which is assigned an access address by the control unit. An administrative information region is provided in each block. The control unit carries out access requests of the main storage medium and the administration of faulty regions and the number of occurrences of reloading of respective memory cells of the main storage medium.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: April 14, 2015
    Assignee: Solid State Storage Solutions, Inc.
    Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
  • Publication number: 20140185380
    Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.
    Type: Application
    Filed: August 6, 2013
    Publication date: July 3, 2014
    Applicant: Solid State Storage Solutions, Inc.
    Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi INOUE, Shigemasa SHIOTA, Masashi NAITO
  • Patent number: 8503235
    Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: August 6, 2013
    Assignee: Solid State Storage Solutions, Inc.
    Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
  • Patent number: 8331153
    Abstract: In a nonvolatile memory apparatus, a system bus receives address, command, and/or control signals. Memory cells store bits of data by shifting a threshold voltage to one of plural ranges. In writing a first page, the threshold voltage of a first memory cell remains in a first range or shifts into a second range. In writing a second page, the threshold voltage remains in the first or second voltages, or shifts into a third range from the first range or into a fourth range from the second range. Before writing the second page, the memory reads data from the first memory cell for generating the second page writing data. A shifting direction of the threshold voltage from the first to the second range is the same as a shifting direction from the first to the third range.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: December 11, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kunihiro Katayama, Takayuki Tamura, Kiyoshi Inoue
  • Publication number: 20120213002
    Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.
    Type: Application
    Filed: November 17, 2011
    Publication date: August 23, 2012
    Inventors: Kunihiro KATAYAMA, Takayuki TAMURA, Satoshi WATATANI, Kiyoshi INOUE, Shigemasa SHIOTA, Masashi NAITO
  • Publication number: 20120127792
    Abstract: In a nonvolatile memory apparatus, a system bus receives address, command, and/or control signals. Memory cells store bits of data by shifting a threshold voltage to one of plural ranges. In writing a first page, the threshold voltage of a first memory cell remains in a first range or shifts into a second range. In writing a second page, the threshold voltage remains in the first or second voltages, or shifts into a third range from the first range or into a fourth range from the second range. Before writing the second page, the memory reads data from the first memory cell for generating the second page writing data. A shifting direction of the threshold voltage from the first to the second range is the same as a shifting direction from the first to the third range.
    Type: Application
    Filed: February 1, 2012
    Publication date: May 24, 2012
    Inventors: Kunihiro KATAYAMA, Takayuki Tamura, Kiyoshi Inoue
  • Patent number: 8156779
    Abstract: In an apparatus for producing a spark plug, approach driving conditions are calculated on the basis of a specified thrust feeding amount so that, while a temporal overlap occurs between a time period of feed-driving toward a rolling position P2 of a workpiece supporting portion (11) and an approach driving time period, in a circumferential direction of a workpiece W, a positional relationship between the starting position of the threaded portion which is rolling-formed, and the joining position of the ground electrode to the tip end face of the workpiece W is constant. The operation of an approach driving portion is controlled on the basis of the calculated approach driving conditions.
    Type: Grant
    Filed: November 22, 2007
    Date of Patent: April 17, 2012
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Hiroshi Ohashi, Kiyoshi Inoue, Masato Nagasaki, Yasuhiro Hori
  • Patent number: 8134869
    Abstract: An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: March 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kunihiro Katayama, Takayuki Tamura, Kiyoshi Inoue
  • Publication number: 20110292727
    Abstract: An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.
    Type: Application
    Filed: August 10, 2011
    Publication date: December 1, 2011
    Inventors: Kunihiro Katayama, Takayuki Tamura, Kiyoshi Inoue
  • Patent number: 8064257
    Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: November 22, 2011
    Assignee: Solid State Storage Solutions, Inc.
    Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
  • Publication number: 20110255131
    Abstract: When trial printing is executed in a repeat printing mode, trial printing is performed in size of an image of one piece in a layout in which a plurality of images are supposed to be printed in the repeat printing mode normally. A user who has checked a finished state of the trial printing sets, when the finished state is in a desired state, the recording paper on which the trial printing is performed to the paper feed portion again and executes the repeat printing. Thereby, in a blank space excluding a print image which is printed with a first time trial printing, a scheduled quantity of a plurality of images are repeatedly printed.
    Type: Application
    Filed: April 15, 2011
    Publication date: October 20, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Kiyoshi Inoue