Patents by Inventor Kiyoshi Kimura

Kiyoshi Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160339847
    Abstract: A lid attached storage device includes: a box body having an opening; left and right lid bodies configured to cover left and right sides of the opening; and left and right opening and closing mechanisms configured to respectively cause the left and right lid bodies to be slidable in the front and rear direction and rotatable in the up and down direction with respect to the box body, each of the left and right opening and closing mechanisms including: a base member; a rotational support portion configured to support the base member so as to be rotatable in the up and down direction about a left or right side of the box body with respect to the box body; and a slide portion configured to slide the lid body in the front and rear direction with respect to the base member.
    Type: Application
    Filed: May 17, 2016
    Publication date: November 24, 2016
    Inventors: Yasuhiro KODAMA, Kiyoshi KIMURA, Hiroshi ZUSHI
  • Patent number: 9441775
    Abstract: When a male member is inserted into a female member to connect a first joint portion of a hydraulic joint structure and a second joint portion thereof, a first open end portion of a first oil passage of the male member and a first open end portion of a first oil passage of the female member are connected at a first axial position, and a second open end portion of a second oil passage of the male member and a second open end portion of a second oil passage of the female member are connected at a second axial position. Thus, two hydraulic oil lines can be easily connected at the same time.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: September 13, 2016
    Assignee: Kabushiki Kaisha Ogura
    Inventor: Kiyoshi Kimura
  • Publication number: 20160003349
    Abstract: A shift position switching device for shifting gears in association with a shift position. The device includes a shift mechanism switching between shift positions using a drive power of a motor, an encoder outputting pulse signals in sync with a rotation of the motor, and a controller rotating the motor to a target rotation position corresponding to an intended gear. The controller rotates the motor toward a dead-end on a first shift position side of the shift mechanism while observing a motor rotation speed or an acceleration of rotation of the motor based on the outputted pulse signals of the encoder. Also, the controller learns, as a reference position on the first shift position side, a first rotation position of the motor.
    Type: Application
    Filed: July 1, 2015
    Publication date: January 7, 2016
    Inventors: Kiyoshi KIMURA, Jun YAMADA
  • Patent number: 9136324
    Abstract: A power semiconductor device includes a first semiconductor layer of a first conductivity type, a first drift layer, and a second drift layer. The first drift layer includes a first epitaxial layer of the first conductivity type, a plurality of first first-conductivity-type pillar layers, and a plurality of first second-conductivity-type pillar layers. The second drift layer is formed on the first drift layer and includes a second epitaxial layer of the first conductivity type, a plurality of second second-conductivity-type pillar layers, a plurality of second first-conductivity-type pillar layers, a plurality of third second-conductivity-type pillar layers, and a plurality of third first-conductivity-type pillar layers. The plurality of second second-conductivity-type pillar layers are connected to the first second-conductivity-type pillar layers. The plurality of second first-conductivity-type pillar layers are connected to the first first-conductivity-type pillar layers.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: September 15, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kiyoshi Kimura, Yasuto Sumi, Hiroshi Ohta, Hiroyuki Irifune
  • Patent number: 9122252
    Abstract: A motor control apparatus includes a motor that rotates a controlled object, an encoder that outputs a pulse signal in synchronization with a rotation of the motor, and a control section that performs a feedback control so as to rotate the motor to the target rotational position. The control section includes a stopping and holding control portion. The stopping and holding control portion performs a stopping and holding process in which the stopping and holding control portion supplies electric current to the motor so as to stop and hold the motor for a current-supply holding time. The stopping and holding control portion sets the current-supply holding time on the basis of a rotation speed of the motor just before the stopping and holding process.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: September 1, 2015
    Assignee: DENSO CORPORATION
    Inventors: Kiyoshi Kimura, Jun Yamada
  • Patent number: 8963470
    Abstract: A motor control apparatus that controls rotation of a rotor of an electric motor powered from an electric power source includes a learning portion that executes an initial drive learning process, and a controller that executes a normal drive operation to sequentially change an exciting phase of the electric motor based on a count value of a counter which is corrected by a correcting portion such that the rotor is rotated to a target position after an initial drive operation is finished. The learning portion re-executes the initial drive learning process after a predetermined condition is satisfied, when the initial drive learning process is failed.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: February 24, 2015
    Assignee: Denso Corporation
    Inventors: Kiyoshi Kimura, Jun Yamada, Masaaki Shinojima
  • Publication number: 20150035463
    Abstract: A SBW-ECU prohibits driving of an electric motor by turning off power supply to the motor by a drive prohibition device, when a diagnosis part of a by-wire control circuit determines that a shift-by-wire system is abnormal or a monitor circuit determines that the by-wire control circuit is abnormal. In this case, the motor is stopped from rotating by execution of power supply phase fixation processing, by which a power supply phase of the motor is fixed without switchover, when the motor is driven to rotate at the time of determination of abnormality of the shift-by-wire system. Then the prohibition device prohibits driving of the motor by stopping the power supply to the motor.
    Type: Application
    Filed: July 21, 2014
    Publication date: February 5, 2015
    Inventors: Kiyoshi KIMURA, Jun YAMADA, Masaaki SHINOJIMA
  • Patent number: 8935067
    Abstract: An electronic control unit senses an actual shift range of a automatic transmission by executing a range determination operation, which determines the actual shift range of the automatic transmission based on a rotational position of a manual shaft that is sensed with an encoder. The control unit prohibits the execution of the range determination operation throughout a range determination operation prohibiting period, which is a predetermined time period and starts from a time point of starting rotation of the rotor of the electric motor unit toward the target rotational position.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: January 13, 2015
    Assignee: Denso Corporation
    Inventors: Jun Yamada, Kiyoshi Kimura
  • Patent number: 8872261
    Abstract: A semiconductor device includes first, second, and third semiconductor layers each having multiple diffusion layers. The first direction widths of the first diffusion layers are the same. The amount of impurity within the first diffusion layers gradually increases from the bottom end towards the top end of the first semiconductor layer. The first direction widths of the second diffusion layers are the same. The amounts of impurity within the second diffusion layers are the same. The first direction widths of the third diffusion layers are narrower than the first direction widths of the first diffusion layers and the first direction widths of the second diffusion layers at the same level, and gradually become narrower from the bottom end towards the top end of the third semiconductor layer. The amount of impurity within the third diffusion layers are the same.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: October 28, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki Irifune, Wataru Saito, Yasuto Sumi, Kiyoshi Kimura, Hiroshi Ohta, Junji Suzuki
  • Patent number: 8860144
    Abstract: In general, according to one embodiment, a power semiconductor device includes a first pillar region, a second pillar region, and an epitaxial layer of a first conductivity type on a first semiconductor layer. The first pillar region is composed of a plurality of first pillar layers of a second conductivity type and a plurality of second pillar layers of the first conductivity type alternately arranged along a first direction. The second pillar region is adjacent to the first pillar region along the first direction and includes a third pillar layer of the second conductivity type, a fourth pillar layer of the first conductivity type, and a fifth pillar layer of the second conductivity type in this order along the first direction. A plurality of second base layers of the second conductivity type electrically connected, respectively, onto the third pillar layer and the fifth pillar layer and spaced from each other.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: October 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Ohta, Yasuto Sumi, Kiyoshi Kimura, Junji Suzuki, Hiroyuki Irifune, Wataru Saito, Syotaro Ono
  • Publication number: 20140117445
    Abstract: A power semiconductor device includes a first semiconductor layer of a first conductivity type, a first drift layer, and a second drift layer. The first drift layer includes a first epitaxial layer of the first conductivity type, a plurality of first first-conductivity-type pillar layers, and a plurality of first second-conductivity-type pillar layers. The second drift layer is formed on the first drift layer and includes a second epitaxial layer of the first conductivity type, a plurality of second second-conductivity-type pillar layers, a plurality of second first-conductivity-type pillar layers, a plurality of third second-conductivity-type pillar layers, and a plurality of third first-conductivity-type pillar layers. The plurality of second second-conductivity-type pillar layers are connected to the first second-conductivity-type pillar layers. The plurality of second first-conductivity-type pillar layers are connected to the first first-conductivity-type pillar layers.
    Type: Application
    Filed: December 23, 2013
    Publication date: May 1, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kiyoshi KIMURA, Yasuto SUMI, Hiroshi OHTA, Hiroyuki IRIFUNE
  • Patent number: 8710042
    Abstract: A method of reducing the contamination amount of mycotoxin in cereals wherein one or more compounds A selected from the group consisting of ammonium salts, primary to quaternary ammonium salts, alkali metal salts, alkaline earth metal salts and polyvalent metal salts of phosphorous acid and phosphite ester are given to the cereals.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: April 29, 2014
    Assignees: Mitsui Chemicals Agro, Inc., Hokusan Co. Ltd.
    Inventors: Daisuke Awakura, Kiyoshi Kimura, Kazuyoshi Masuda
  • Patent number: 8680606
    Abstract: A power semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer provided thereon, mutually separated columnar third semiconductor layers of a second conductivity type extending within the second semiconductor layer, island-like fourth semiconductor layers of the second conductivity type provided on the third semiconductor layers, fifth semiconductor layers of the first conductivity type, sixth semiconductor layers of the second conductivity type, a gate electrode, a first electrode, and a second electrode. The fifth semiconductor layers are selectively provided on the fourth semiconductor layers. The sixth semiconductor layer electrically connects two adjacent fourth semiconductor layers. The first electrode is in electrical connection with the first semiconductor. The second electrode is in electrical connection with the fourth semiconductor layers and the fifth semiconductor layers via the openings in the gate electrode.
    Type: Grant
    Filed: March 19, 2012
    Date of Patent: March 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Ohta, Yasuto Sumi, Kiyoshi Kimura, Junji Suzuki, Hiroyuki Irifune
  • Publication number: 20140034149
    Abstract: When a male member is inserted into a female member to connect a first joint portion of a hydraulic joint structure and a second joint portion thereof, a first open end portion of a first oil passage of the male member and a first open end portion of a first oil passage of the female member are connected at a first axial position, and a second open end portion of a second oil passage of the male member and a second open end portion of a second oil passage of the female member are connected at a second axial position. Thus, two hydraulic oil lines can be easily connected at the same time.
    Type: Application
    Filed: April 16, 2012
    Publication date: February 6, 2014
    Applicant: KABUSHIKI KAISHA OGURA
    Inventor: Kiyoshi Kimura
  • Patent number: 8643056
    Abstract: A power semiconductor device includes a first semiconductor layer of a first conductivity type, a first drift layer, and a second drift layer. The first drift layer includes a first epitaxial layer of the first conductivity type, a plurality of first first-conductivity-type pillar layers, and a plurality of first second-conductivity-type pillar layers. The second drift layer is formed on the first drift layer and includes a second epitaxial layer of the first conductivity type, a plurality of second second-conductivity-type pillar layers, a plurality of second first-conductivity-type pillar layers, a plurality of third second-conductivity-type pillar layers, and a plurality of third first-conductivity-type pillar layers. The plurality of second second-conductivity-type pillar layers are connected to the first second-conductivity-type pillar layers. The plurality of second first-conductivity-type pillar layers are connected to the first first-conductivity-type pillar layers.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: February 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kiyoshi Kimura, Yasuto Sumi, Hiroshi Ohta, Hiroyuki Irifune
  • Publication number: 20140015467
    Abstract: A motor control apparatus includes a motor that rotates a controlled object, an encoder that outputs a pulse signal in synchronization with a rotation of the motor, and a control section that performs a feedback control so as to rotate the motor to the target rotational position. The control section includes a stopping and holding control portion. The stopping and holding control portion performs a stopping and holding process in which the stopping and holding control portion supplies electric current to the motor so as to stop and hold the motor for a current-supply holding time. The stopping and holding control portion sets the current-supply holding time on the basis of a rotation speed of the motor just before the stopping and holding process.
    Type: Application
    Filed: July 11, 2013
    Publication date: January 16, 2014
    Inventors: Kiyoshi KIMURA, Jun YAMADA
  • Patent number: 8626412
    Abstract: When a vehicle electric power source is turned on, and when a target mode position is other than a parking (P)-mode position and a driving (D)-mode position or the target mode position is unfixed, a shift-by-wire electronic control unit (SBW-ECU) does not drive the actuator so that the current actual mode position is maintained. The SBW-ECU accepts only the driver's requirement for changing the mode position to the P-mode position or the D-mode position. When it is required to change the mode position to the P-mode position, a first position learning portion learns a first reference position. When it is required to change the mode position to the D-mode position, a second position learning portion learns a second reference position.
    Type: Grant
    Filed: November 15, 2011
    Date of Patent: January 7, 2014
    Assignee: Denso Corporation
    Inventors: Kiyoshi Kimura, Masaaki Shinojima, Jun Yamada
  • Patent number: 8610210
    Abstract: According to one embodiment, a power semiconductor device includes a first semiconductor layer, and first, second and third semiconductor regions. The first semiconductor layer has a first conductivity type. The first semiconductor regions have a second conductivity type, and are formed with periodicity in a lateral direction in a second semiconductor layer of the first conductivity type. The second semiconductor layer is provided on a major surface of the first semiconductor layer in a device portion with a main current path formed in a vertical direction generally perpendicular to the major surface and in a terminal portion provided around the device portion. The second semiconductor region has the first conductivity type and is a portion of the second semiconductor layer sandwiched between adjacent ones of the first semiconductor regions. The third semiconductor regions have the second conductivity type and are provided below the first semiconductor regions in the terminal portion.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: December 17, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Ohta, Yasuto Sumi, Kiyoshi Kimura, Wataru Sekine, Wataru Saito, Syotaro Ono, Munehisa Yabuzaki, Nana Hatano, Miho Watanabe
  • Publication number: 20130277763
    Abstract: In general, according to one embodiment, a power semiconductor device includes a first pillar region, a second pillar region, and an epitaxial layer of a first conductivity type on a first semiconductor layer. The first pillar region is composed of a plurality of first pillar layers of a second conductivity type and a plurality of second pillar layers of the first conductivity type alternately arranged along a first direction. The second pillar region is adjacent to the first pillar region along the first direction and includes a third pillar layer of the second conductivity type, a fourth pillar layer of the first conductivity type, and a fifth pillar layer of the second conductivity type in this order along the first direction. A plurality of second base layers of the second conductivity type electrically connected, respectively, onto the third pillar layer and the fifth pillar layer and spaced from each other.
    Type: Application
    Filed: June 14, 2013
    Publication date: October 24, 2013
    Inventors: Hiroshi OHTA, Yasuto Sumi, Kiyoshi Kimura, Junji Suzuki, Hiroyuki Irifune, Wataru Saito, Syotaro Ono
  • Patent number: 8487374
    Abstract: In general, according to one embodiment, a power semiconductor device includes a first pillar region, a second pillar region, and an epitaxial layer of a first conductivity type on a first semiconductor layer. The first pillar region is composed of a plurality of first pillar layers of a second conductivity type and a plurality of second pillar layers of the first conductivity type alternately arranged along a first direction. The second pillar region is adjacent to the first pillar region along the first direction and includes a third pillar layer of the second conductivity type, a fourth pillar layer of the first conductivity type, and a fifth pillar layer of the second conductivity type in this order along the first direction. A plurality of second base layers of the second conductivity type electrically connected, respectively, onto the third pillar layer and the fifth pillar layer and spaced from each other.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: July 16, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Ohta, Yasuto Sumi, Kiyoshi Kimura, Junji Suzuki, Hiroyuki Irifune, Wataru Saito, Syotaro Ono