Abstract: A lens drive device may include a first holding body, a second holding body, a fixed body which holds the second holding body, a first drive mechanism to drive the first holding body, a second drive mechanism to drive the second holding body, a third drive mechanism structured to drive the second holding body in a different direction than the second drive mechanism, an elastic member having a fixed part which is fixed to the second holding body and a deformable part, and plural wires in a substantially straight line shape with one end side fixed to the deformable part and the other end side fixed to the fixed body.

Abstract: A photographic optical device may include a movable module having a camera module on which a lens and an imaging element are mounted, a support body, and a shake correction mechanism. The movable module may be provided with a sensor for detecting an inclination of the camera module and a cover member which structures an outer peripheral face of the movable module. The shake correction mechanism may be provided with a swing drive mechanism for swinging the movable module so that the optical axis is inclined. The swing drive mechanism may be provided with a drive magnet and a drive coil.

Abstract: The CPU includes a byte code interpretation unit that sequentially reads intermediate code instructions along an execution route, determining whether or not there is a compilation result of the read intermediate code instruction in the compilation result storage unit, interpreting the intermediate code instruction when there is no compilation result, and designating the compilation result if there is a compilation result; and a program execution unit that, if received the interpretation result of the intermediate code instruction from the byte code interpretation unit, executes the intermediate code instruction and, if received the designation of the compilation result, executes the program by executing designated native code. The CPU includes a compilation execution unit that compiles the intermediate code instruction interpreted by the byte code interpretation unit to generate the native code and stores them in the compilation result storage unit.

Abstract: An optical unit with shake correcting function may include a movable module on which an optical element is mounted, a fixed body which supports the movable module, a shake detection sensor which detects a shake of the movable module, a shake correction magnetic drive mechanism which swings the movable module on the fixed body on a basis of a detection result of the shake detection sensor to correct the shake of the movable module, and a spring member which is connected with the fixed body and the movable module. A stopper mechanism may be structured between the movable module and the fixed body, and the stopper mechanism may moving ranges of the movable module due to the shake.

Abstract: A reference voltage generator includes an output terminal, a load circuit connected between the output terminal and a ground voltage terminal, an output transistor connected between the output terminal and a power supply voltage terminal, a first constant current source connected between the output terminal and the power supply voltage terminal, a first switch circuit that selectively connects the output terminal with the output transistor or the first constant current source, and a control circuit that controls a band-gap current to be supplied to the load circuit. In a first state, the first switch circuit connects the output terminal with the output transistor, and the control circuit controls an activation state of the output transistor. In a second state, the first switch circuit connects the output terminal with the first constant current source, and the control circuit controls the amount of current drawn from the first constant current source.

Abstract: A hierarchical multi-core processor includes a core group for each hierarchy of a hierarchy group constituting a series of communication functions divided according to communication protocol, where a first core group of a given hierarchy among the hierarchy group is connected to a second core group of another hierarchy constituting a first communication function to be executed following a second communication function of the given hierarchy.

Abstract: A display device includes a display panel having scan lines, and a booster circuit configured to generate an output voltage and to supply the output voltage as power source to the display panel. The booster circuit includes a charge pump and a feedback circuit section configured to control a booster operation of the charge pump depending on the output voltage. A mode of the booster operation includes a charge mode that charges the output capacitor and a discharge mode that discharges the output capacitor. The mode is switched depending on the output voltage. The feedback circuit section includes a booster operation control section configured to secure a period during which the mode is not switched between the charge mode and the discharge mode in accordance with an external synchronizing signal. The period includes a timing at which an active scan line is switched among the plurality of scan lines.

Abstract: A multicore processor system includes a processor configured to detect any among a switching process and an assignment process of applications in a multicore processor; acquire upon detecting any among the switching process and the assignment process, a priority level concerning execution of each application assigned to each core of the multicore processor and number of accesses of a shared resource shared by the multicore processor; determine an access ratio of an application whose priority level is highest to each of application remaining after excluding the application whose priority level is highest, among the assigned applications, by comparing the number of accesses by each remaining application and the number of accesses by the application whose priority level is highest; notify an arbiter circuit of the determined access ratios; and arbitrate using the arbiter circuit, the access of the shared resource by the multicore processor, based on the access ratios.

Abstract: A multi-core processor system includes a given core configured to switch at a prescribed switching period, threads assigned to the given core; identify whether the given core has switched threads at a period exceeding the prescribed switching period; correct the prescribed switching period into a shorter switching period, based on a difference of an actual switching period at which the threads have been switched by the given core and the prescribed switching period; and set the corrected switching period as the prescribed switching period.

Abstract: A multicore processor system having multiple cores, includes processors configured to measure bandwidth of a network; compare the measured bandwidth and a given threshold; determine among the cores and based on an obtained comparison result, a core adjustment number by which the number of cores executing a given process related to data communicated through the network is adjusted; calculate the number of executing cores after adjustment by the core adjustment number and based on the number of cores executing the given process before the adjustment and the determined core adjustment number; specify a core executing the given process among the cores and based on the calculated number of executing cores after the adjustment; and distribute the communicated data to the specified core executing the given process.

Abstract: A generating method is executed by a processor. The method includes executing simulation using a simulation model expressing a processor model, a memory model to which the processor model is accessible, and a load source that accesses the memory model according to an access contention rate, to obtain an index value for performance of the processor model, for each access contention rate; and saving to a memory area and as contention characteristics information, the index value for each access contention rate.

Abstract: A multicore processor system includes a processor configured to detect, among cores that have booted with an old boot program in the multicore processor, a core to which no process is assigned; change upon detecting a core to which no process is assigned, a reference area from a storage area for the old boot program to a storage area for a new boot program; and notify the core to which no process is assigned of a reboot instruction specifying the reference area after the change.

Abstract: A software control device includes a processor configured to determine whether starting software and running software are accessing the same common resource; and control the running software to be temporarily suspended upon determining that the starting software and the running software are accessing the same common resource.

Abstract: A booster circuit has: a charge pump configured to perform a booster operation that boosts a voltage supplied from an external power source and outputs the boosted voltage as an output voltage through an output capacitor; and a feedback circuit section configured to control the booster operation depending on the output voltage. A mode of the booster operation includes: a charge mode that charges the output capacitor with the voltage supplied from the external power source; and a discharge mode that discharges the output capacitor. The mode of the booster operation is switched between the charge mode and the discharge mode depending on the output voltage. The feedback circuit section has a booster operation control section that secures a period during which the mode is not switched between the charge mode and the discharge mode in accordance with an external synchronizing signal.

Abstract: A multi-core processor system has a first core executing an OS and multiple applications, and a second core to which a first thread of the applications is assigned. The multi-core processor system includes a processor configured to receive from the first core, an interrupt signal specifying an event that has occurred with an application among the applications, determine whether the event specified by the received interrupt signal is any one among a start event for exclusion and a start event for synchronization for the first thread currently under execution by the second core, save from the second core, the first thread currently under execution, upon determining the specified event to be a start event, and assign a second thread different from the saved first thread and among a group of execution-awaiting threads of the applications, as a thread to be executed by the second core.

Abstract: A multi-core processor system includes a multi-core processor and a storage apparatus storing for each application, a reliability level related to operation, where a given core accesses the storage apparatus and is configured to extract from the storage apparatus, the reliability level for a given application that invokes a given thread; judge based on the extracted reliability level and a specified threshold, whether the given application is an application of high reliability; identify, in the multi-core processor, a core that has not been allocated a thread of an application of low reliability, when judging that the given application is an application of high reliability, and identify in the multi-core processor, a core that has not been allocated a thread of an application of high reliability, when judging that the given application is an application of low reliability; and give to the identified core, an invocation instruction for the given thread.

Abstract: A multi-core processor system includes multiple cores and memory accessible from the cores, where a given core is configured to detect among the cores, first cores having a highest execution priority level; identify among the detected first cores, a second core that caused access conflict of the memory; and control a third core that is among the cores, excluding the first cores and the identified second core, the third core being controlled to execute for a given interval during an interval when the access conflict occurs, a thread that does not access the memory.

Abstract: An optical unit with shake correcting function may include a movable module having a lens, a fixed body supporting the movable module, a shake detection sensor for detecting shake of the movable module, and at least one pair of magnetic drive mechanism for shake correction which is structured on both sides of the movable module so that the movable module is swung with respect to the fixed body on the basis of detection result of the shake detection sensor to correct the shake of the movable module. The magnetic drive mechanism for shake correction is disposed so that a shake correction magnet is held by the fixed body and a shake correction coil is held by the movable module.

Abstract: The lens drive device is equipped with a first supporting body that holds the lens and is movable in the direction of the optical axis, a second supporting body that holds the first supporting body, a fixed body that holds the second supporting body in a manner enabling movement in directions that are roughly orthogonal to the optical axis direction, a first drive mechanism for driving the first supporting body, a second drive mechanism for driving the second supporting body in a first direction, and a third drive mechanism for driving the second supporting body in a second direction. The first supporting body is supported by the second supporting body by means of first supporting members (8, 9), which are formed from an elastic material; and the second supporting body is supported by the fixed body by means of second supporting members, which are formed from an elastic material.

Abstract: Disclosed is an optical unit with a shake correction function which is capable of suppressing interference with swinging of a movable module due to the rigidity of a wiring material and a repelling force generated when the wiring material is deformed, even when the wiring material is extended from the movable module. The optical unit uses a flexible wiring board as the wiring material for electrically interconnecting the movable module and outside. In the flexible wiring board, the connecting portion of a movable-side connecting section and an extending unit is provided, in the optical axis direction, on a side where the swing center of the movable module is positioned with respect to the position of the center of supporting a spring member to the movable module. The swing center, the connecting portion, and a fixed-side connecting section are at the same position in the optical axis direction.