Patents by Inventor Kiyotaka Tabuchi

Kiyotaka Tabuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110024857
    Abstract: Disclosed herein is a solid-state image pickup element, including: a semiconductor substrate; a pixel portion which is formed on the semiconductor substrate and in which a plurality of pixels each having a photoelectric conversion portion are arranged; an insulating layer formed on the semiconductor substrate so as to cover the photoelectric conversion portion; a hole portion formed in the insulating layer and above the photoelectric conversion portion; a silicon nitride layer formed so as to cover a bottom surface and a side surface of the hole portion; and a buried layer formed on the silicon nitride layer, wherein the silicon nitride layer is formed so as to contain a silicon nitride formed by utilizing an atomic layer deposition method.
    Type: Application
    Filed: May 27, 2010
    Publication date: February 3, 2011
    Applicant: SONY CORPORATION
    Inventors: Yoshinori Toumiya, Kiyotaka Tabuchi, Yasuyuki Shiga, Iwao Sugiura, Naoyuki Miyashita, Masanori Iwasaki, Katsunori Kokubun, Tomohiro Yamazaki
  • Patent number: 7670941
    Abstract: A method for production of semiconductor devices which includes the steps of forming, on an interlayer insulating film formed on a substrate, a copper-containing conductive layer in such a way that its surface is exposed, performing heat treatment with a reducing gas composed mainly of hydrogen on the surface of the conductive layer, performing plasma treatment with a reducing gas on the surface of the conductive layer, thereby permitting the surface of the conductive layer to be reduced and the hydrogen adsorbed by the heat treatment to be released, and forming an oxidation resistance film that covers the surface of the conductive layer such that the surface of the conductive layer is not exposed to an oxygen-containing atmospheric gas after the plasma treatment.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: March 2, 2010
    Assignee: Sony Corporation
    Inventors: Koji Kawanami, Kiyotaka Tabuchi
  • Publication number: 20090303359
    Abstract: A solid-state imaging device has: an imaging region in which a plurality of pixels each having a photoelectric conversion element are arranged, and a color filter. The color filter includes: filter components of a first color (2G), filter components of a second color (2R) formed by self-alignment and each being surrounded by the filter components of the first color (2G), and filter components of a third color (2B) formed by self-alignment and each being surrounded by the filter components of the first color (2G).
    Type: Application
    Filed: May 1, 2009
    Publication date: December 10, 2009
    Applicant: Sony Corporation
    Inventors: Yoichi OTSUKA, Yoshiyuki ENOMOTO, Kazunori NAGAHATA, Tadayuki KIMURA, Toshihiko HAYASHI, Kenichi AOYAGI, Kiyotaka TABUCHI, Iwao SUGIURA, Kensaku MAEDA
  • Patent number: 7579286
    Abstract: A fabrication method of a semiconductor device is disclosed by which damage to another film or exfoliation of a film is prevented and an insulating film having a dielectric constant of 2.5 or less can be formed while a film strength is maintained without deteriorating a wiring line characteristic. According to an embodiment, an insulating film is formed on a substrate by a plasma process, which uses film-forming gas having a ring structure of Si—O bonds, such that it maintains the ring structure of the Si—O bonds. According to another embodiment, an insulating film is formed on a substrate by a plasma process, which uses film-forming gas which contains silane-containing gas and oxygen gas or film-forming gas which contains Si—O bond-containing gas, such that it has a ring structure of the Si—O bonds.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: August 25, 2009
    Assignee: Sony Corporation
    Inventor: Kiyotaka Tabuchi
  • Publication number: 20090189235
    Abstract: A solid-state imaging device having a light-receiving section that photoelectrically converts incident light includes an insulating film formed on a light-receiving surface of the light-receiving section and a film and having negative fixed charges formed on the insulating film. A hole accumulation layer is formed on a light-receiving surface side of the light-receiving section. A peripheral circuit section in which peripheral circuits are formed is provided on a side of the light-receiving section. The insulating film is formed between a surface of the peripheral circuit section and the film having negative fixed charges such that a distance from the surface of the peripheral circuit section to the film having negative fixed charges is larger than a distance from a surface of the light-receiving section to the film having negative fixed charges.
    Type: Application
    Filed: December 19, 2008
    Publication date: July 30, 2009
    Applicant: SONY CORPORATION
    Inventors: Harumi Ikeda, Susumu Hiyama, Takashi Ando, Kiyotaka Tabuchi, Tetsuji Yamaguchi, Yuko Ohgishi
  • Publication number: 20070048995
    Abstract: A method for production of semiconductor devices which includes the steps of forming, on an interlayer insulating film formed on a substrate, a copper-containing conductive layer in such a way that its surface is exposed, performing heat treatment with a reducing gas composed mainly of hydrogen on the surface of the conductive layer, performing plasma treatment with a reducing gas on the surface of the conductive layer, thereby permitting the surface of the conductive layer to be reduced and the hydrogen adsorbed by the heat treatment to be released, and forming an oxidation resistance film that covers the surface of the conductive layer such that the surface of the conductive layer is not exposed to an oxygen-containing atmospheric gas after the plasma treatment.
    Type: Application
    Filed: August 18, 2006
    Publication date: March 1, 2007
    Inventors: Koji Kawanami, Kiyotaka Tabuchi
  • Patent number: 7154179
    Abstract: A semiconductor device, wherein an increase of a capacity between wiring layers is suppressed, reliability of wiring and property of withstand voltage of a diffusion prevention insulation film can be improved and the wiring resistance can be maintained low, is provided by comprising an interlayer insulation film formed on a substrate, a wiring formed on a trench pattern formed on the interlayer insulation film, and a diffusion prevention insulation film formed on an upper surfaces of the interlayer insulation film including the wiring and preventing diffusion of metal from the wiring; wherein the diffusion prevention insulation film has a middle layer between a lowermost layer and an uppermost layer, wherein the lowermost layer is formed so as to contact the upper surfaces of the interlayer insulation layer including the wiring, the uppermost layer constitutes an uppermost portion of the diffusion prevention insulation film, and the middle layer has a lower relative dielectric constant than those of the lower
    Type: Grant
    Filed: May 16, 2005
    Date of Patent: December 26, 2006
    Assignees: Sony Corporation, Kabushiki Kaisha Toshiba
    Inventors: Kiyotaka Tabuchi, Hideshi Miyajima, Hideaki Masuda
  • Patent number: 7129175
    Abstract: A semiconductor device manufacturing method comprises forming a first insulating film including silicon, carbon, nitrogen, and hydrogen above a substrate in a first chamber, carrying the substrate into a second chamber other than the first chamber, and discharging a rare gas in the second chamber, and forming a second insulating film including silicon, carbon, oxygen, and hydrogen above the first insulating film after the discharging the rare gas.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: October 31, 2006
    Assignees: Kabushiki Kaisha Toshiba, Sony, Corp.
    Inventors: Hideshi Miyajima, Kazuyuki Higashi, Keiji Fujita, Toshiaki Hasegawa, Kiyotaka Tabuchi
  • Publication number: 20060024979
    Abstract: A fabrication method of a semiconductor device is disclosed by which damage to another film or exfoliation of a film is prevented and an insulating film having a dielectric constant of 2.5 or less can be formed while a film strength is maintained without deteriorating a wiring line characteristic. According to an embodiment, an insulating film is formed on a substrate by a plasma process, which uses film-forming gas having a ring structure of Si—O bonds, such that it maintains the ring structure of the Si—O bonds. According to another embodiment, an insulating film is formed on a substrate by a plasma process, which uses film-forming gas which contains silane-containing gas and oxygen gas or film-forming gas which contains Si—O bond-containing gas, such that it has a ring structure of the Si—O bonds.
    Type: Application
    Filed: June 29, 2005
    Publication date: February 2, 2006
    Inventor: Kiyotaka Tabuchi
  • Publication number: 20060017164
    Abstract: A semiconductor device, wherein an increase of a capacity between wiring layers is suppressed, reliability of wiring and property of withstand voltage of a diffusion prevention insulation film can be improved and the wiring resistance can be maintained low, is provided by comprising an interlayer insulation film formed on a substrate, a wiring formed on a trench pattern formed on the interlayer insulation film, and a diffusion prevention insulation film formed on an upper surfaces of the interlayer insulation film including the wiring and preventing diffusion of metal from the wiring; wherein the diffusion prevention insulation film has a middle layer between a lowermost layer and an uppermost layer, wherein the lowermost layer is formed so as to contact the upper surfaces of the interlayer insulation layer including the wiring, the uppermost layer constitutes an uppermost portion of the diffusion prevention insulation film, and the middle layer has a lower relative dielectric constant than those of the lower
    Type: Application
    Filed: May 16, 2005
    Publication date: January 26, 2006
    Inventors: Kiyotaka Tabuchi, Hideshi Miyajima, Hideaki Masuda
  • Publication number: 20050012122
    Abstract: A threshold voltage change and degradation of the drain saturation current over a period of time of a MOS transistor are prevented by providing a permeable insulating film that serves as an inter-layer etching stopper layer on the surface of a plug, and an inter-layer insulating film that can be made from a low dielectric constant organic insulating film.
    Type: Application
    Filed: August 18, 2004
    Publication date: January 20, 2005
    Applicants: FUJITSU LIMITED, SONY CORPORATION
    Inventors: Katsumi Kakamu, Atsushi Suzuki, Kiyotaka Tabuchi
  • Patent number: 6798625
    Abstract: The present invention provides a spin-valve magnetoresistance sensor in which are formed, on top of the substrate, free layers, and pinned layers, enclosing a nonmagnetic spacer layer, and an antiferromagnetic layer adjacent to the pinned layers. The sensor is also equipped with a back layer including at least two nonmagnetic metal layers adjacent to the free layers on the side of the free layers opposite the nonmagnetic spacer layer. The back layer has at least one nonmagnetic metal layer of Cu with high electrical conductivity, preferably formed adjacent to the free layers, as for example in a two-layer structure of Cu and Ru or a three-layer structure Ru/Cu/Ru. In addition to a high read output, fluctuations in Hint with the film thickness of the back layer can be suppressed and sensor characteristics stabilized, and high recording densities can be realized.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: September 28, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Masaki Ueno, Kiyotaka Tabuchi, Tatsuo Sawasaki, Hiroshi Nishida, Kazuhiro Mizukami, Fuminori Hikami
  • Patent number: 6794693
    Abstract: A threshold voltage change and degradation of the drain saturation current over a period of time of a MOS transistor are prevented by providing a permeable insulating film that serves as an inter-layer etching stopper layer on the surface of a plug, and an inter-layer insulating film that can be made from a low dielectric constant organic insulating film.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: September 21, 2004
    Assignees: Fujitsu Limited, Sony Corporation
    Inventors: Katsumi Kakamu, Atsushi Suzuki, Kiyotaka Tabuchi
  • Publication number: 20040166680
    Abstract: A semiconductor device manufacturing method comprises forming a first insulating film including silicon, carbon, nitrogen, and hydrogen above a substrate in a first chamber, carrying the substrate into a second chamber other than the first chamber, and discharging a rare gas in the second chamber, and forming a second insulating film including silicon, carbon, oxygen, and hydrogen above the first insulating film after the discharging the rare gas.
    Type: Application
    Filed: December 4, 2003
    Publication date: August 26, 2004
    Inventors: Hideshi Miyajima, Kazuyuki Higashi, Keiji Fujita, Toshiaki Hasegawa, Kiyotaka Tabuchi
  • Publication number: 20040041267
    Abstract: A threshold voltage change and degradation of the drain saturation current over a period of time of a MOS transistor are prevented by providing a permeable insulating film that serves as an inter-layer etching stopper layer on the surface of a plug, and an inter-layer insulating film that can be made from a low dielectric constant organic insulating film.
    Type: Application
    Filed: April 8, 2003
    Publication date: March 4, 2004
    Applicants: FUJITSU LIMITED, SONY CORPORATION
    Inventors: Katsumi Kakamu, Atsushi Suzuki, Kiyotaka Tabuchi