Patents by Inventor Kiyotaka Tabuchi
Kiyotaka Tabuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110024857Abstract: Disclosed herein is a solid-state image pickup element, including: a semiconductor substrate; a pixel portion which is formed on the semiconductor substrate and in which a plurality of pixels each having a photoelectric conversion portion are arranged; an insulating layer formed on the semiconductor substrate so as to cover the photoelectric conversion portion; a hole portion formed in the insulating layer and above the photoelectric conversion portion; a silicon nitride layer formed so as to cover a bottom surface and a side surface of the hole portion; and a buried layer formed on the silicon nitride layer, wherein the silicon nitride layer is formed so as to contain a silicon nitride formed by utilizing an atomic layer deposition method.Type: ApplicationFiled: May 27, 2010Publication date: February 3, 2011Applicant: SONY CORPORATIONInventors: Yoshinori Toumiya, Kiyotaka Tabuchi, Yasuyuki Shiga, Iwao Sugiura, Naoyuki Miyashita, Masanori Iwasaki, Katsunori Kokubun, Tomohiro Yamazaki
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Patent number: 7670941Abstract: A method for production of semiconductor devices which includes the steps of forming, on an interlayer insulating film formed on a substrate, a copper-containing conductive layer in such a way that its surface is exposed, performing heat treatment with a reducing gas composed mainly of hydrogen on the surface of the conductive layer, performing plasma treatment with a reducing gas on the surface of the conductive layer, thereby permitting the surface of the conductive layer to be reduced and the hydrogen adsorbed by the heat treatment to be released, and forming an oxidation resistance film that covers the surface of the conductive layer such that the surface of the conductive layer is not exposed to an oxygen-containing atmospheric gas after the plasma treatment.Type: GrantFiled: August 18, 2006Date of Patent: March 2, 2010Assignee: Sony CorporationInventors: Koji Kawanami, Kiyotaka Tabuchi
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Publication number: 20090303359Abstract: A solid-state imaging device has: an imaging region in which a plurality of pixels each having a photoelectric conversion element are arranged, and a color filter. The color filter includes: filter components of a first color (2G), filter components of a second color (2R) formed by self-alignment and each being surrounded by the filter components of the first color (2G), and filter components of a third color (2B) formed by self-alignment and each being surrounded by the filter components of the first color (2G).Type: ApplicationFiled: May 1, 2009Publication date: December 10, 2009Applicant: Sony CorporationInventors: Yoichi OTSUKA, Yoshiyuki ENOMOTO, Kazunori NAGAHATA, Tadayuki KIMURA, Toshihiko HAYASHI, Kenichi AOYAGI, Kiyotaka TABUCHI, Iwao SUGIURA, Kensaku MAEDA
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Patent number: 7579286Abstract: A fabrication method of a semiconductor device is disclosed by which damage to another film or exfoliation of a film is prevented and an insulating film having a dielectric constant of 2.5 or less can be formed while a film strength is maintained without deteriorating a wiring line characteristic. According to an embodiment, an insulating film is formed on a substrate by a plasma process, which uses film-forming gas having a ring structure of Si—O bonds, such that it maintains the ring structure of the Si—O bonds. According to another embodiment, an insulating film is formed on a substrate by a plasma process, which uses film-forming gas which contains silane-containing gas and oxygen gas or film-forming gas which contains Si—O bond-containing gas, such that it has a ring structure of the Si—O bonds.Type: GrantFiled: June 29, 2005Date of Patent: August 25, 2009Assignee: Sony CorporationInventor: Kiyotaka Tabuchi
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Publication number: 20090189235Abstract: A solid-state imaging device having a light-receiving section that photoelectrically converts incident light includes an insulating film formed on a light-receiving surface of the light-receiving section and a film and having negative fixed charges formed on the insulating film. A hole accumulation layer is formed on a light-receiving surface side of the light-receiving section. A peripheral circuit section in which peripheral circuits are formed is provided on a side of the light-receiving section. The insulating film is formed between a surface of the peripheral circuit section and the film having negative fixed charges such that a distance from the surface of the peripheral circuit section to the film having negative fixed charges is larger than a distance from a surface of the light-receiving section to the film having negative fixed charges.Type: ApplicationFiled: December 19, 2008Publication date: July 30, 2009Applicant: SONY CORPORATIONInventors: Harumi Ikeda, Susumu Hiyama, Takashi Ando, Kiyotaka Tabuchi, Tetsuji Yamaguchi, Yuko Ohgishi
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Publication number: 20070048995Abstract: A method for production of semiconductor devices which includes the steps of forming, on an interlayer insulating film formed on a substrate, a copper-containing conductive layer in such a way that its surface is exposed, performing heat treatment with a reducing gas composed mainly of hydrogen on the surface of the conductive layer, performing plasma treatment with a reducing gas on the surface of the conductive layer, thereby permitting the surface of the conductive layer to be reduced and the hydrogen adsorbed by the heat treatment to be released, and forming an oxidation resistance film that covers the surface of the conductive layer such that the surface of the conductive layer is not exposed to an oxygen-containing atmospheric gas after the plasma treatment.Type: ApplicationFiled: August 18, 2006Publication date: March 1, 2007Inventors: Koji Kawanami, Kiyotaka Tabuchi
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Patent number: 7154179Abstract: A semiconductor device, wherein an increase of a capacity between wiring layers is suppressed, reliability of wiring and property of withstand voltage of a diffusion prevention insulation film can be improved and the wiring resistance can be maintained low, is provided by comprising an interlayer insulation film formed on a substrate, a wiring formed on a trench pattern formed on the interlayer insulation film, and a diffusion prevention insulation film formed on an upper surfaces of the interlayer insulation film including the wiring and preventing diffusion of metal from the wiring; wherein the diffusion prevention insulation film has a middle layer between a lowermost layer and an uppermost layer, wherein the lowermost layer is formed so as to contact the upper surfaces of the interlayer insulation layer including the wiring, the uppermost layer constitutes an uppermost portion of the diffusion prevention insulation film, and the middle layer has a lower relative dielectric constant than those of the lowerType: GrantFiled: May 16, 2005Date of Patent: December 26, 2006Assignees: Sony Corporation, Kabushiki Kaisha ToshibaInventors: Kiyotaka Tabuchi, Hideshi Miyajima, Hideaki Masuda
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Patent number: 7129175Abstract: A semiconductor device manufacturing method comprises forming a first insulating film including silicon, carbon, nitrogen, and hydrogen above a substrate in a first chamber, carrying the substrate into a second chamber other than the first chamber, and discharging a rare gas in the second chamber, and forming a second insulating film including silicon, carbon, oxygen, and hydrogen above the first insulating film after the discharging the rare gas.Type: GrantFiled: December 4, 2003Date of Patent: October 31, 2006Assignees: Kabushiki Kaisha Toshiba, Sony, Corp.Inventors: Hideshi Miyajima, Kazuyuki Higashi, Keiji Fujita, Toshiaki Hasegawa, Kiyotaka Tabuchi
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Publication number: 20060024979Abstract: A fabrication method of a semiconductor device is disclosed by which damage to another film or exfoliation of a film is prevented and an insulating film having a dielectric constant of 2.5 or less can be formed while a film strength is maintained without deteriorating a wiring line characteristic. According to an embodiment, an insulating film is formed on a substrate by a plasma process, which uses film-forming gas having a ring structure of Si—O bonds, such that it maintains the ring structure of the Si—O bonds. According to another embodiment, an insulating film is formed on a substrate by a plasma process, which uses film-forming gas which contains silane-containing gas and oxygen gas or film-forming gas which contains Si—O bond-containing gas, such that it has a ring structure of the Si—O bonds.Type: ApplicationFiled: June 29, 2005Publication date: February 2, 2006Inventor: Kiyotaka Tabuchi
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Publication number: 20060017164Abstract: A semiconductor device, wherein an increase of a capacity between wiring layers is suppressed, reliability of wiring and property of withstand voltage of a diffusion prevention insulation film can be improved and the wiring resistance can be maintained low, is provided by comprising an interlayer insulation film formed on a substrate, a wiring formed on a trench pattern formed on the interlayer insulation film, and a diffusion prevention insulation film formed on an upper surfaces of the interlayer insulation film including the wiring and preventing diffusion of metal from the wiring; wherein the diffusion prevention insulation film has a middle layer between a lowermost layer and an uppermost layer, wherein the lowermost layer is formed so as to contact the upper surfaces of the interlayer insulation layer including the wiring, the uppermost layer constitutes an uppermost portion of the diffusion prevention insulation film, and the middle layer has a lower relative dielectric constant than those of the lowerType: ApplicationFiled: May 16, 2005Publication date: January 26, 2006Inventors: Kiyotaka Tabuchi, Hideshi Miyajima, Hideaki Masuda
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Publication number: 20050012122Abstract: A threshold voltage change and degradation of the drain saturation current over a period of time of a MOS transistor are prevented by providing a permeable insulating film that serves as an inter-layer etching stopper layer on the surface of a plug, and an inter-layer insulating film that can be made from a low dielectric constant organic insulating film.Type: ApplicationFiled: August 18, 2004Publication date: January 20, 2005Applicants: FUJITSU LIMITED, SONY CORPORATIONInventors: Katsumi Kakamu, Atsushi Suzuki, Kiyotaka Tabuchi
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Patent number: 6798625Abstract: The present invention provides a spin-valve magnetoresistance sensor in which are formed, on top of the substrate, free layers, and pinned layers, enclosing a nonmagnetic spacer layer, and an antiferromagnetic layer adjacent to the pinned layers. The sensor is also equipped with a back layer including at least two nonmagnetic metal layers adjacent to the free layers on the side of the free layers opposite the nonmagnetic spacer layer. The back layer has at least one nonmagnetic metal layer of Cu with high electrical conductivity, preferably formed adjacent to the free layers, as for example in a two-layer structure of Cu and Ru or a three-layer structure Ru/Cu/Ru. In addition to a high read output, fluctuations in Hint with the film thickness of the back layer can be suppressed and sensor characteristics stabilized, and high recording densities can be realized.Type: GrantFiled: September 26, 2000Date of Patent: September 28, 2004Assignee: Western Digital (Fremont), Inc.Inventors: Masaki Ueno, Kiyotaka Tabuchi, Tatsuo Sawasaki, Hiroshi Nishida, Kazuhiro Mizukami, Fuminori Hikami
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Patent number: 6794693Abstract: A threshold voltage change and degradation of the drain saturation current over a period of time of a MOS transistor are prevented by providing a permeable insulating film that serves as an inter-layer etching stopper layer on the surface of a plug, and an inter-layer insulating film that can be made from a low dielectric constant organic insulating film.Type: GrantFiled: April 8, 2003Date of Patent: September 21, 2004Assignees: Fujitsu Limited, Sony CorporationInventors: Katsumi Kakamu, Atsushi Suzuki, Kiyotaka Tabuchi
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Publication number: 20040166680Abstract: A semiconductor device manufacturing method comprises forming a first insulating film including silicon, carbon, nitrogen, and hydrogen above a substrate in a first chamber, carrying the substrate into a second chamber other than the first chamber, and discharging a rare gas in the second chamber, and forming a second insulating film including silicon, carbon, oxygen, and hydrogen above the first insulating film after the discharging the rare gas.Type: ApplicationFiled: December 4, 2003Publication date: August 26, 2004Inventors: Hideshi Miyajima, Kazuyuki Higashi, Keiji Fujita, Toshiaki Hasegawa, Kiyotaka Tabuchi
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Publication number: 20040041267Abstract: A threshold voltage change and degradation of the drain saturation current over a period of time of a MOS transistor are prevented by providing a permeable insulating film that serves as an inter-layer etching stopper layer on the surface of a plug, and an inter-layer insulating film that can be made from a low dielectric constant organic insulating film.Type: ApplicationFiled: April 8, 2003Publication date: March 4, 2004Applicants: FUJITSU LIMITED, SONY CORPORATIONInventors: Katsumi Kakamu, Atsushi Suzuki, Kiyotaka Tabuchi