Abstract: The invention provides a method for increasing the usable surface area of a semiconductor wafer having a substantially planar surface and a thickness dimension at right angles to said substantially planar surface, the method including the steps of selecting a strip thickness for division of the wafer into a plurality of strips, selecting a technique for cutting the wafer into the strips at an angle to the substantially planar surface, in which the combined strip thickness and width of wafer removed by the cutting is less than the thickness of the wafer, cutting the wafer into strips using the selected technique and separating the strips from each other.

Abstract: An elongate solar cell, comprising a semiconductor body having two mutually opposed faces, at least one of the faces being an active face for receiving incident light, and two mutually opposed edges orthogonal to the faces, the edges comprising electrical contacts thereon for conducting electrical current generated by the solar cell from the light; wherein the electrical contact to at least one of the edges includes an electrically conductive material that contacts only a fractional portion of the at least one edge of the semiconductor body to improve the performance of the solar cell.

Abstract: A solar cell interconnection process for forming a solar cell sub-module for a photovoltaic device, the process including the steps of mounting a plurality of elongate solar cells (101) on a crossbeam (102) on patches of solderable material (201) which is used to maintain solder in position, the elongate solar cells being in a substantially longitudinally parallel and generally co-planar configuration: and establishing one or more conductive pathways (204) extending between adjacent cells to electrically interconnect the elongate solar cells via the contacts (202, 203): wherein the one or more conductive pathways are established by wave soldering.

Abstract: A thin layer of single-crystal silicon is produced by forming first trenches in a silicon substrate having (111) orientation; forming narrower second trenches at the base of the trenches; anisotropically etching lateral channels (4) from the second trenches, until adjacent etch fonts (16) substantially meet; and detaching said layer from the substrate. The trenches may be arranged so that the resultant layer has rows of slots, with the slots in adjacent rows being mutually offset. Solar cells may be formed on strips having two electrical contacts on the same face (6) of each strip (5).

Abstract: The invention provides a method for increasing the usable surface area of a semiconductor wafer having a substantially planar surface and a thickness dimension at right angles to said substantially planar surface, the method including the steps of selecting a strip thickness for division of the wafer into a plurality of strips, selecting a technique for cutting the wafer into the strips at an angle to the substantially planar surface, in which the combined strip thickness and width of wafer removed by the cutting is less than the thickness of the wafer, cutting the wafer into strips using the selected technique and separating the strips from each other.

Abstract: The invention provides a process for texturing a surface of a semiconductor material, the process comprising: applying a layer of a protective substance on said surface wherein said layer is sufficiently thin that it has a plurality of apertures therethrough; and contacting said layer and said semiconductor material with an etchant capable of etching said semiconductor material faster than said protective substance, said etchant making contact with said semiconductor material at least through said apertures, for a time and under conditions in which said semiconductor material is etched by said etchant in the vicinity of said apertures to produce a textured surface on said semiconductor material, but said protective substance is substantially unetched.

Abstract: The invention provides a method for increasing the usable surface area of a semiconductor wafer having a substantially planar surface and a thickness dimension at right angles to said substantially planar surface, the method including the steps of selecting a strip thickness for division of the wafer into a plurality of strips, selecting a technique for cutting the wafer into the strips at an angle to the substantially planar surface, in which the combined strip thickness and width of wafer removed by the cutting is less than the thickness of the wafer, cutting the wafer into strips using the selected technique and separating the strips from each other.

Abstract: The invention provides a method for increasing the usable surface area of a semiconductor wafer having a substantially planar surface and a thickness dimension at right angles to said substantially planar surface, the method including the steps of selecting a strip thickness for division of the wafer into a plurality of strips, selecting a technique for cutting the wafer into the strips at an angle to the substantially planar surface, in which the combined strip thickness and width of wafer removed by the cutting is less than the thickness of the wafer, cutting the wafer into strips using the selected technique and separating the strips from each other.

Abstract: The invention provides a method for increasing the usable surface area of a semiconductor wafer having a substantially planar surface and a thickness dimension at right angles to said substantially planar surface, the method including the steps of selecting a strip thickness for division of the wafer into a plurality of strips, selecting a technique for cutting the wafer into the strips at an angle to the substantially planar surface, in which the combined strip thickness and width of wafer removed by the cutting is less than the thickness of the wafer, cutting the wafer into strips using the selected technique and separating the strips from each other.

Abstract: A method for processing elongate substrates, including forming a plurality of parallel elongate openings (102) through a semiconductor wafer (104) to form a corresponding plurality of elongate substrates (106) between the openings, each of the elongate substrates (106) having opposite edges coplanar with opposite surfaces of the wafer, opposite faces (112) orthogonal to the wafer surfaces, and opposite ends by which the elongate substrates are interconnected; and applying securing means (402) to at least one of the opposite edges of each elongate substrate to engage the edges and thereby inhibit relative movement of the elongate substrates.

Abstract: A solar cell interconnection process for forming a solar cell sub-module for a photovoltaic device, the process including the steps of mounting a plurality of elongate solar cells (101) on a crossbeam (102) on patches of solderable material (201) which is used to maintain solder in position, the elongate solar cells being in a substantially longitudinally parallel and generally co-planar configuration: and establishing one or more conductive pathways (204) extending between adjacent cells to electrically interconnect the elongate solar cells via the contacts (202, 203): wherein the one or more conductive pathways are established by wave soldering.

Abstract: The invention provides a method for increasing the usable surface area of a semiconductor wafer having a substantially planar surface and a thickness dimension at right angles to said substantially planar surface, the method including the steps of selecting a strip thickness for division of the wafer into a plurality of strips, selecting a technique for cutting the wafer into the strips at an angle to the substantially planar surface, in which the combined strip thickness and width of wafer removed by the cutting is less than the thickness of the wafer, cutting the wafer into strips using the selected technique and separating the strips from each other.

Abstract: A thin layer of single-crystal silicon is produced by forming first trenches in a silicon substrate having (111) orientation; forming narrower second trenches at the bases of the trenches; anisotropically etching lateral channels (4) from the second trenches, until adjacent etch fronts (16) substantially meet; and detaching said layer from the substrate. The trenches may be arranged so that the resultant layer has rows of slots, whit the slots in adjacent rows being mutually offset. Solar cells may be formed on strips (5) between the trenches, having lengths of more than 50 mm, widths of up to 5 mm, and thicknesses of less than 100 microns, and having two electrical contacts on the same face (6) of each strip (5).

Abstract: The invention provides a method for increasing the usable surface area of a semiconductor wafer having a substantially planar surface and a thickness dimension at right angles to said substantially planar surface, the method including the steps of selecting a strip thickness for division of the wafer into a plurality of strips, selecting a technique for cutting the wafer into the strips at an angle to the substantially planar surface, in which the combined strip thickness and width of wafer removed by the cutting is less than the thickness of the wafer, cutting the wafer into strips using the selected technique and separating the strips from each other.