Abstract: A method and a system for routing electrical connections of a plurality of chips are disclosed. In one embodiment, a semiconductor device is provided comprising at least one semiconductor chip, at least one routing plane comprising at least one routing line, and at least one connecting line electrically coupled to the at least one routing line and at least one semiconductor chip.

Abstract: A method of manufacturing a stacked die module includes applying a plurality of stacked die structures to a carrier. Each stacked die structure includes a first semiconductor die applied to the carrier and a second semiconductor die stacked over the first semiconductor die. The second semiconductor die has a larger lateral surface area than the first semiconductor die. A dam is applied around each of the stacked die structures, thereby forming an enclosed cavity for each of the stacked die structures. The enclosed cavity for each stacked die structure surrounds the first semiconductor die of the stacked die structure.

Abstract: A semiconductor module includes components in a plastic casing. The semiconductor module includes a plastic package molding compound and a semiconductor chip. Also provided in the module are a first principal surface including an upper side of the plastic package molding compound and at least one active upper side of the semiconductor chip, a second principal surface including a back side of the plastic package molding compound, and a multilayered conductor track structure disposed on the first principal surface and a second metal layer disposed on the second principal surface.

Abstract: Stacked semiconductor chips are disclosed. One embodiment provides an array of first semiconductor chips, covering the array of the first semiconductor chips with a mold material, and placing an array of second semiconductor chips over the array of the first semiconductor chips. The thicknesses of the second semiconductor chips is reduced. The array of the first semiconductor chips are singulated by dividing the mold material.

Abstract: One aspect relates to a method for singulating semiconductor wafers to form semiconductor chips. A semiconductor wafer is provided with semiconductor chip positions arranged in rows and columns, rectilinear separating tracks being arranged between the positions. Crystallographic strains are induced into the region of the separating tracks. This is followed by a laser ablation along the separating tracks, the semiconductor wafer being separated into individual semiconductor chips.

Abstract: A semiconductor module (1) has components (6) for microwave engineering in a plastic casing (7). The semiconductor module (1) has a principal surface (8) with an upper side (9) of a plastic package molding compound (10) and at least one active upper side (11) of a semiconductor chip (12). Disposed on the principal surface (8) is a multilayered conductor track structure (13) which alternately comprises structured metal layers (14, 15) and structured insulation layers (16, 17), where at least one of the insulation layers (16, 17) and/or the plastic package molding compound (10) has at least one microwave insulation region.

Abstract: A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also includes an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.

Abstract: A method of manufacturing a stacked die module includes applying a plurality of stacked die structures to a carrier. Each stacked die structure includes a first semiconductor die applied to the carrier and a second semiconductor die stacked over the first semiconductor die. The second semiconductor die has a larger lateral surface area than the first semiconductor die. A dam is applied around each of the stacked die structures, thereby forming an enclosed cavity for each of the stacked die structures. The enclosed cavity for each stacked die structure surrounds the first semiconductor die of the stacked die structure.

Abstract: A semiconductor device for radio frequencies of more than 10 GHz having a semiconductor chip is disclosed. In one embodiment, the semiconductor chip, on its active top side, having a radio-frequency region and a low-frequency region and/or a region which is supplied with DC voltage. In one embodiment, the low-frequency region and/or the region which is supplied with DC voltage of the semiconductor chip is directly embedded in a plastic housing composition, the plastic housing composition is arranged such that it is spaced apart from the radio-frequency region on the active top side of the semiconductor chip.

Abstract: A semiconductor device and manufacturing method. One embodiment provides a semiconductor chip. An encapsulating material covers the semiconductor chip. A metal layer is over the semiconductor chip and the encapsulating material. At least one of a voltage generating unit and a display unit are rigidly attached to at least one of the encapsulating material and the metal layer.

Abstract: Stacked semiconductor chips are disclosed. One embodiment provides an array of first semiconductor chips, covering the array of the first semiconductor chips with a mold material, and placing an array of second semiconductor chips over the array of the first semiconductor chips. The thicknesses of the second semiconductor chips is reduced. The array of the first semiconductor chips are singulated by dividing the mold material.

Abstract: A substrate including strip conductors with a wiring pattern that connects contact areas to one another. The strip conductors have a small strip conductor width. The contact areas and/or the strip conductors form a narrow connection pitch and include electrically conductive carbon nanotubes.

Abstract: An electronic assembly is disclosed. One embodiment includes at least one semiconductor chip and a package structure embedding the semiconductor chip. The package structure includes at least one conducting line extending into an area of the package structure outside of the outline of the chip. The electronic assembly further includes a substrate embedding the package structure.

Abstract: A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.

Abstract: A semiconductor module includes components in a plastic casing. The semiconductor module includes a plastic package molding compound and a semiconductor chip. Also provided in the module are a first principal surface including an upper side of the plastic package molding compound and at least one active upper side of the semiconductor chip, a second principle surface including a back side of the plastic package molding compound, and a multilayered conductor track structure disposed on the first principal surface and a second metal layer disposed on the second principle surface.

Abstract: One aspect relates to a method for singulating semiconductor wafers to form semiconductor chips. A semiconductor wafer is provided with semiconductor chip positions arranged in rows and columns, rectilinear separating tracks being arranged between the positions. Crystallographic strains are induced into the region of the separating tracks. This is followed by a laser ablation along the separating tracks, the semiconductor wafer being separated into individual semiconductor chips.

Abstract: A substrate including strip conductors with a wiring pattern that connects contact areas to one another. The strip conductors have a small strip conductor width. The contact areas and/or the strip conductors form a narrow connection pitch and include electrically conductive carbon nanotubes.

Abstract: The present invention describes a rewiring plate for components with connection grids of between approx. 100 nm and 10 ?m, which rewiring plate includes a base body and passages with carbon nanotubes, the lower end of the passages opening out into contact connection surfaces, and the carbon nanotubes forming an electrically conductive connection from the contact connection surfaces to the front surface of the base body.

Abstract: A semiconductor module (1) has components (6) for microwave engineering in a plastic casing (7). The semiconductor module (1) has a principal surface (8) with an upper side (9) of a plastic package molding compound (10) and at least one active upper side (11) of a semiconductor chip (12). Disposed on the principal surface (8) is a multilayered conductor track structure (13) which alternately comprises structured metal layers (14, 15) and structured insulation layers (16, 17), where at least one of the insulation layers (16, 17) and/or the plastic package molding compound (10) has at least one microwave insulation region.

Abstract: A semiconductor device for radio frequencies of more than 10 GHz having a semiconductor chip is disclosed. In one embodiment, the semiconductor chip, on its active top side, having a radio-frequency region and a low-frequency region and/or a region which is supplied with DC voltage. In one embodiment, the low-frequency region and/or the region which is supplied with DC voltage of the semiconductor chip is directly embedded in a plastic housing composition, the plastic housing composition is arranged such that it is spaced apart from the radio-frequency region on the active top side of the semiconductor chip.