Abstract: Apparatus and methods of reducing power consumption in solid-state storage devices such as solid-state disks (SSDs) that can reduce idle power levels in an SSD, while maintaining low resume latency upon exiting a reduced power state. By arranging a storage controller and at least one NAND flash package of the SSD in separate power islands, storing context information for the SSD in at least one page buffer of NAND flash memory within the NAND flash package on one power island upon entering the reduced power state, and, once the context information is stored in the page buffer, allowing the NAND flash memory to enter a standby mode, placing the storage controller on the other power island in a predefined low power mode, and removing power from any unneeded components on the same power island as the storage controller, a scalable approach to reducing idle power levels in the SSD can be achieved.

Abstract: A mass storage device such as a disk drive or SSD (solid state drive) employs optimization logic for reduced power consumption in a host personal electronic device that identifies and prioritizes performance and power trade-offs by considering user expectations, user presence and application responsiveness. The storage device receives commands and information from the host device indicative of user expectations about application invocation, data freshness, and usage patterns, and determines a operational state indicative of behavior settings for reducing power consumption while maintaining the performance constraints required by the user expectations. The granularity of performance considerations communicated from the host device to the mass storage device is expanded to permit the storage device to determine, based on performance constraints from user expectations, appropriate and specific power reduction measures for maintaining the user experience.

Abstract: Techniques to utilize a very low power state with a memory subsystem that includes one or more non-volatile memory devices and a volatile memory system. A memory controller is coupled with the one or more non-volatile memory devices and the volatile memory system. The memory controller comprising at least an embedded control agent and memory locations to store state information. The memory controller to selectively enable and disable the one or more non-volatile memory devices. The memory controller transfers the state information to the volatile memory system prior to entering a low power state. Control circuitry is coupled with the memory controller. The control circuitry to selectively enable and disable operation of the memory controller.

Abstract: A memory storage system that includes at least a storage controller, a first non-volatile, solid-state memory and a second non-volatile, solid-state memory. The storage controller has an interface to receive commands from a host system. The first non-volatile, solid-state memory device is coupled with the storage controller to at least store data received from the host system. The second non-volatile, solid-state memory is coupled with the storage controller to store context information corresponding to the data stored in the first non-volatile, solid-state memory device.

Abstract: Described herein are apparatus, system, and method for providing memory access control to protect software (e.g., firmware backup) and other data. The method comprises providing, by a processor, a protected storage area in a memory for storing backup image of software; detecting corruption in the software; accessing the backup image of the software from the protected storage area; and updating the corrupted software using the backup image, wherein the protected storage area is a reserved storage area of the memory.

Abstract: A method for trimming data on non-volatile flash media is generally presented. In this regard, in one embodiment, a method is introduced comprising allocating a temporary file that occupies free space on a flash memory, determining specific blocks of the flash memory that the temporary file occupies, generating TRIM commands for the specific blocks, and deleting the temporary file. Other embodiments are described and claimed.

Abstract: Embodiments of the invention take advantage of an unused state of an interface protocol (or specification), such as the ONFI specification, to control a selector circuit to assert one of a plurality of relatively localized device selection signals (e.g., chip enable signals).

Abstract: A method for trimming data on non-volatile flash media is generally presented. In this regard, in one embodiment, a method is introduced comprising allocating a temporary file that occupies free space on a flash memory, determining specific blocks of the flash memory that the temporary file occupies, generating TRIM commands for the specific blocks, and deleting the temporary file. Other embodiments are described and claimed.

Abstract: According to embodiments of the present invention, endurance management techniques are disclosures. Adherence to endurance and data retention ratings are ensured by managing write accesses to a memory device.

Abstract: Embodiments of the invention take advantage of an unused state of an interface protocol (or specification), such as the ONFI specification, to control a selector circuit to assert one of a plurality of relatively localized device selection signals (e.g., chip enable signals).

Abstract: Methods and arrangements to remap degraded storage blocks on, e.g., IDE/ATA drives are disclosed. Embodiments may comprise a host and/or a data storage device for, e.g., a handheld device. The host may comprise remapping logic. In many embodiments, the remapping logic may track degraded storage blocks as indicated by the data storage device. In several embodiments, the host may remap data from degraded storage blocks in response to indications from the data storage device that the degraded storage blocks have degraded to a point at which further use may risk loss of data. The data storage device may execute error correction code to acquire valid data and if error correction measures exceed a threshold, or are otherwise determined to be excessive, the data storage device may communicate the degradation of the storage block to the host. Other embodiments may be disclosed and claimed.

Abstract: In some embodiments, disk accesses made during normal operation of a disk drive are monitored. One or more data blocks on the disk drive are identified as candidates for replication on the disk drive in response to the monitoring. Each of the identified data blocks are replicated in at least one other place on the disk drive. Other embodiments are described and claimed.

Abstract: A method and apparatus for detecting a presence of a fail over switch is described. In one embodiment, during an Serial ATA sequence initialization handshake, a host transmits a COMRESET to a device. In return, the host receives a COMWAKE from the device. If the host is of a first type of host, then the host identifies a presence of a fail over switch, in response to receipt of the COMWAKE. If the host is of a second type of host, then the host ignores the COMWAKE. The host then receives a COMINIT from the device, in accordance with the Serial ATA sequence handshake. The host transmits a COMWAKE to the device, and the host receives a COMWAKE in return from the device.

Abstract: Embodiments of the invention take advantage of an unused state of an interface protocol (or specification), such as the ONFI specification, to control a selector circuit to assert one of a plurality of relatively localized device selection signals (e.g., chip enable signals).

Abstract: In some embodiments an expected value is compared with a number of times a storage device has been powered up and/or spun up. A cache disassociation is detected in response to the comparing. Other embodiments are described and claimed.

Abstract: A method, device, and computer program to generate operation codes having a maximum hamming distance between them. Utilizing these operation codes it is possible to detect errors immediately upon receipt of a first byte of data in a packet to allow the receiver to immediately act on the received data. This reduces the need for buffer space on both the transmitting and receiving devices. Further, this method reduces the latency for the receiver acting on the incoming data.

Abstract: Data is read in response to a request for a predetermined amount of data. The amount of data that has been read is determined prior to completing reading the predetermined amount of data. The predetermined amount of data may include prefetch data and demand data, where demand data is data for a computer program and prefetch data is data adjacent to the demand data.

Abstract: A method for performing CRC calculations on packets with dynamic headers is disclosed. The header may be changed during transmission across a network. When the header is changed, a CRC associated with the header is recalculated such that a residue of the initial seed value is always obtained. A final CRC covers the entire packet including the header and its header CRC, or just the data portion of the packet. The final CRC remains valid and unchanged during transmission of the packet, allowing an endpoint along the network to confirm the validity of the entire packet. By only changing the CRC associated with the changed portion of the packet (the header CRC), the introduction of errors during transmission of the packet is minimized.

Abstract: According to some embodiments, a current media status is determined for a storage device.

Abstract: According to some embodiments, a presence indication associated with an attachment is provided.