Abstract: Via multiplexing technology is provided which can contribute to high density wiring. For coupling wirings of different wiring layers, a multiple via cell section is used which has vias for electrically coupling wirings bent in an L-shape of different wiring layers on both sides with the L-shaped bent portion therebetween. The vias of the multiple via cell section are on a grid line in an X-direction and a grid line in a Y-direction defined with a minimum wiring pitch, and all or part of the vias of the multiple via cell section are deviated from an intersection of the grid line in the X-direction and the grid line in the Y-direction. The vias of the multiple via cell section are placed on each of the grid line in the X-direction and the grid line in the Y-direction, corresponding to the L-shape, so that there is not much difference between the spatial conditions in the X-direction and the spatial conditions in the Y-direction viewed from the multiple via cell section.

Abstract: Productivity of a semiconductor integrated circuit device is improved. According to how many times the photomask is used, a photomask having an opaque pattern made of metal and a photomask having an opaque pattern made of a resist film are properly used, and thereby an exposure treatment is performed.

Abstract: Productivity of a semiconductor integrated circuit device is improved. According to how many times the photomask is used, a photomask having an opaque pattern made of metal and a photomask having an opaque pattern made of a resist film are properly used, and thereby an exposure treatment is performed.

Abstract: Productivity of a semiconductor integrated circuit device is improved. According to how many times the photomask is used, a photomask having an opaque pattern made of metal and a photomask having an opaque pattern made of a resist film are properly used, and thereby an exposure treatment is performed.

Abstract: In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially with light shielding patterns 3a formed of a resist film, in addition to light shielding patterns formed of a metal.

Abstract: In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially with light shielding patterns 3a formed of a resist film, in addition to light shielding patterns formed of a metal.

Abstract: In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially with a light shielding patterns 3a formed of a resist film, in addition to light shielding patterns formed of a metal.

Abstract: Productivity of a semiconductor integrated circuit device is improved. According to how many times the photomask is used, a photomask having an opaque pattern made of metal and a photomask having an opaque pattern made of a resist film are properly used, and thereby an exposure treatment is performed.

Abstract: Productivity of a semiconductor integrated circuit device is improved. According to how many times the photomask is used, a photomask having an opaque pattern made of metal and a photomask having an opaque pattern made of a resist film are properly used, and thereby an exposure treatment is performed.

Abstract: In order to shorten the time required to change or correct a mask pattern over a mask, light-shielding patterns formed of a resist film for integrated circuit pattern transfer are partly provided over a mask substrate constituting a photomask in addition to light-shielding patterns formed of a metal for the integrated circuit pattern transfer.

Abstract: In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially with light shielding patterns 3a formed of a resist film, in addition to light shielding patterns formed of a metal.

Abstract: In order to shorten the time required to change or correct a mask pattern over a mask, light-shielding patterns formed of a resist film for integrated circuit pattern transfer are partly provided over a mask substrate constituting a photomask in addition to light-shielding patterns formed of a metal for the integrated circuit pattern transfer.

Abstract: In a method of manufacturing a semiconductor integrated circuit capable of making gate electrode patterns of MOS transistors accurately in compliance with design data, exposure masks of the gate electrode patterns have the prior rendition of pattern shape assessment based on optical simulation. The assessment is carried out by optical simulation of a gate electrode pattern based on pattern data of layout design of the semiconductor integrated circuit. The model-based correction is applied to the optical simulation for the pattern shape assessment (S21-23). The model for the pattern shape assessment is formed by comparing test patterns with light intensity (S14) and defines compensation values correlative to dimensional differences of the light intensity patterns from the test patterns (S15). The test patterns are formed on a basis of test pattern data above different underlays on a test wafer and the light intensity patterns are formed by optical simulation based on test pattern data.

Abstract: In order to shorten the time required to change or correct a mask pattern over a mask, light-shielding patterns formed of a resist film for integrated circuit pattern transfer are partly provided over a mask substrate constituting a photomask in addition to light-shielding patterns formed of a metal for the integrated circuit pattern transfer.

Abstract: Well printing a specified pattern even when exposure treatment using a resist mask uses exposure light with a wavelength over 200 nm.

Abstract: In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device there is used, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 which is provided partially with light shielding patterns 3a formed of a resist film in addition to light shielding patterns formed of a metal.

Abstract: The optimization algorithm candidate of a plurality of circuit blocks given with the logic circuit description based on the hardware description language is determined considering the Hamming distance of circuit block (S1 to S3). The common circuit blocks of the optimization algorithm candidate determined in the first process are then grouped considering the coupling degree among circuit blocks (S4 to S6). Result of grouping is the result for the circuit blocks having apparent characteristic in the algorithm candidate and coupling degree and the circuit blocks having uncertain characteristics are also left. In view of optimizing the grouping for the circuit blocks having uncertain characteristics, the grouping of a plurality of circuit blocks is optimized with the hereditary algorithm by reflecting the result of grouping on the initial condition.

Abstract: In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially with light shielding patterns 3a formed of a resist film, in addition to light shielding patterns formed of a metal.

Abstract: In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially with light shielding patterns 3a formed of a resist film, in addition to light shielding patterns formed of a metal.

Abstract: In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially with light shielding patterns 3a formed of a resist film, in addition to light shielding patterns formed of a metal.