Abstract: A component mounting apparatus is provided with a controller that controls a mounting head. The mounting head is provided with a nozzle holder, a nozzle that is elastically supported to be movable up and down with respect to the nozzle holder, a flange that is provided at a position that is offset from the central axis of the nozzle, and a second engaging section that is able to move the nozzle downward by engaging with the flange and pressing down the flange against the elastic force of a nozzle spring.

Abstract: A board work device includes a housing device, a holding device, a moving device, a first lane and a second lane, a corresponding relationship acquisition device, a priority order acquisition device, and a control device. The holding device exchangeably holds a board work tool that performs a board work on a board. The corresponding relationship acquisition device acquires a corresponding relationship between the types of the board work tool and each of the multiple board works for each of the boards. The control device controls the holding device and the moving device such that, when performing the board work based on the acquired corresponding relationship, in a predetermined case, the board work that is capable of being performed in the other lane is performed without exchanging the board work tool currently being held.

Abstract: A mounting device in which a loading distance separating adjacent characteristic components are lined up side by side is shorter than separation distance between suction nozzle and mark camera, processing to image characteristic component by mark camera and recognize the position of characteristic component is performed consecutively or in one batch. With the mounting device, because mounting head is moved a loading distance that is shorter than the separation distance between suction nozzle and mark camera and image processing is performed consecutively or in one batch, the movement distance of mounting head is shorter.

Abstract: A mounting device includes a control device. The control device images an imaging range which includes an illuminant of a light emitting component and acquires a light emitting component image when mounting the light emitting component which includes the illuminant onto a board. Next, the control device detects coordinates (illuminant detected center coordinates) of a center of the illuminant based on the light emitting component image. The control device performs the mounting of the light emitting component such that the light emitting component is held, the light emitting component moves over the board, and a center of the illuminant is positioned at predetermined coordinates on the board based on the illuminant detected center coordinates, without using information relating to an outer shape of the light emitting component which is based on the light emitting component image.

Abstract: A board work device includes a housing device, a holding device, a moving device, a first lane and a second lane, a corresponding relationship acquisition device, a priority order acquisition device, and a control device. The holding device exchangeably holds a board work tool that performs a board work on a board. The corresponding relationship acquisition device acquires a corresponding relationship between the types of the board work tool and each of the multiple board works for each of the boards.

Abstract: An element carrier has a mounting surface where at least one element outputting a high-frequency signal is disposed. A first dielectric layer has a first side surface partially forming the mounting surface and a first main surface connecting to the first side surface and extending in an intersecting direction intersecting with the mounting surface. A first wiring pattern is provided on the first main surface and extends from the first side surface. A second dielectric layer has a second side surface partially forming the mounting surface and a second main surface connecting to the second side surface and extending in the intersecting direction, and is provided on a part of the first main surface of the first dielectric layer where the first wiring pattern is provided. A second wiring pattern is provided on the second main surface of the second dielectric layer and extends from the second side surface.

Abstract: An optical transmission apparatus in which, even if a change is made in the bit rate of modulation signals that are inputted to a plurality of optical modulating units, the modulation signals do not suffer from phase shifting, thereby enabling achieving synchronous modulation in the plurality of optical modulating units and enabling achieving a high optical signal quality. The optical transmission apparatus includes: a plurality of optical modulating units that modulate light on the basis of modulation signals; and a delay amount control unit that, based on bit rate information indicating a bit rate of the modulation signals, controls delay amounts of the modulation signals to be inputted to the plurality of optical modulating units, such that the light is modulated in a synchronous manner in the plurality of optical modulating units.

Abstract: A technique enabling to improve element isolation characteristic of a semiconductor device is provided. An element isolation structure is provided in a semiconductor substrate in which a silicon layer, a compound semiconductor layer and a semiconductor layer are laminated in this order. The element isolation structure is composed of a trench, a semiconductor film, and first and second insulating films. The trench extends through the semiconductor layer and extends to the inside of the compound semiconductor layer. The semiconductor film is provided on the surface of the trench, and the first insulating film is provided on the semiconductor film. The second insulting film is provided on the first insulating film and fills the trench.

Abstract: When a dummy sidewall and source and drain regions are once formed and then the dummy sidewall is removed to extend the source and drain regions, the removal of the dummy sidewall is performed after formation of a protective oxide film on a gate electrode and on the major surfaces of the source and drain regions. This efficiently prevents conventional surface roughness of the upper surface of the gate electrode and the impurity region due to the removal of the dummy sidewall.

Abstract: A barrier layer is formed on an insulating or conducting film provided on a semiconductor substrate, and an electrode or an interconnect made from a conducting film is formed on the barrier layer. The barrier layer includes a tantalum film having the ?-crystal structure.

Abstract: A barrier layer is formed on an insulating or conducting film provided on a semiconductor substrate, and an electrode or an interconnect made from a conducting film is formed on the barrier layer. The barrier layer includes a tantalum film having the ?-crystal structure.

Abstract: A technique enabling to improve element isolation characteristic of a semiconductor device is provided. An element isolation structure is provided in a semiconductor substrate in which a silicon layer, a compound semiconductor layer and a semiconductor layer are laminated in this order. The element isolation structure is composed of a trench, a semiconductor film, and first and second insulating films. The trench extends through the semiconductor layer and extends to the inside of the compound semiconductor layer. The semiconductor film is provided on the surface of the trench, and the first insulating film is provided on the semiconductor film. The second insulting film is provided on the first insulating film and fills the trench.

Abstract: When a dummy sidewall and source and drain regions are once formed and then the dummy sidewall is removed to extend the source and drain regions, the removal of the dummy sidewall is performed after formation of a protective oxide film on a gate electrode and on the major surfaces of the source and drain regions. This efficiently prevents conventional surface roughness of the upper surface of the gate electrode and the impurity region due to the removal of the dummy sidewall.

Abstract: A barrier layer is formed on an insulating or conducting film provided on a semiconductor substrate, and an electrode or an interconnect made from a conducting film is formed on the barrier layer. The barrier layer includes a tantalum film having the &bgr;-crystal structure.

Abstract: A field-effect transistor including a gate electrode, silicon layers, and source and drain regions at a surface of a silicon substrate. Sidewall insulating films on the opposite side surfaces of the gate electrode are located between the gate electrode and the silicon layers and contain respective voids.

Abstract: A method of producing a semiconductor device includes forming a gate electrode on a channel region on a surface of a semiconductor region of a semiconductor substrate, the channel region having a depth in the semiconductor substrate; forming a first pair of side wall spacers on opposite sides of the gate electrode; forming elevated semiconductor layers, each elevated semiconductor layer being elevated relative to the channel region, on regions outside of the pair of side wall spacers and in which source and drain regions of a first conductivity type are to be formed; removing the pair of first side wall spacers; and forming a pair of pocket injection regions of a second conductivity type by introducing, after the side wall spacers are removed, a dopant impurity producing the second conductivity type deeper in the semiconductor substrate than a region where the side wall spacers were formed, the pair of pocket injection regions respectively covering only a neighborhood of respective side surface parts of the c

Abstract: When a dummy sidewall (22) and source and drain regions (23) are once formed and then the dummy sidewall (22) is removed to extend the source and drain regions (23), the removal of the dummy sidewall (22) is performed after formation of a protective oxide film (38) on a gate electrode (21) and on the major surfaces of the source and drain regions (23). This efficiently prevents conventional surface roughness of the upper surface of the gate electrode and the impurity region due to the removal of the dummy sidewall.

Abstract: Source and drain regions include regions of an epitaxial silicon film on the surface of the substrate and regions in the substrate. The depth of junctions of the source and drain regions is identical to or shallower than the depth of junctions of extension regions. As a result, even if the thickness of the side wall layer is reduced, since the depletion layer of the extension regions with lower impurity concentration compared with the source and drain regions is predominant, the short channel effect has a smaller effect.

Abstract: In making a field effect transistor, a dummy gate electrode is formed before a gate electrode is formed. Extension regions, a side wall silicon nitride film, source/drain regions, a silicon oxide film, and other elements are formed with respect to the dummy gate electrode. The dummy gate electrode is removed, and a part of the extension regions diffused into a region immediately under the dummy gate electrode is removed. The removed part is filled with silicon selection epitaxial film. Thereafter, the intended gate electrode is formed. This production method produces a field effect transistor that prevents deterioration of electrical characteristics caused by the short channel effect and parasitic resistance.

Abstract: A barrier layer is formed on an insulating or conducting film provided on a semiconductor substrate, and an electrode or an interconnect made from a conducting film is formed on the barrier layer. The barrier layer includes a tantalum film having the &bgr;-crystal structure.