Abstract: The disclosed apparatus includes a plurality of differential transmitters, and a power supply circuit that supplies a power supply voltage to each of the plurality of differential transmitters. The power supply circuit includes a common circuit unit that defines the power supply voltage supplied to the plurality of differential transmitters, and a plurality of individual circuit units provided in association with the plurality of differential transmitters and each connected to the common circuit unit. Each of the plurality of individual circuit units has an output node that outputs the power supply voltage defined by the common circuit unit to a corresponding differential transmitter of the plurality of differential transmitters, and respective output nodes of the plurality of individual circuit units are connected to each other.

Abstract: A photoelectric conversion apparatus includes a pixel, an A/D conversion portion and an output circuit. The pixel includes first and second photoelectric conversion portions and an accumulation portion configured to accumulate a signal charge in a location other than the photoelectric conversion portions. The A/D conversion portion is configured to perform A/D conversions on signals based on signal charges generated in the photoelectric conversions. The output circuit reads out first and second signals based on first and second signal charges accumulated in the first and second photoelectric conversion portions during an electric charge accumulation period and a third signal based on a third signal charge generated in the second photoelectric conversion portion and accumulated in the accumulation portion during the electric charge accumulation period. Conversion periods for analog-to-digital conversion to be performed on at least two of the first, second, or third signals have different lengths.

Abstract: Provided is a logic circuit including a first circuit including a static D flip-flop and a second circuit including a dynamic D flip-flop. The first circuit receives a clock signal and a first reset signal. The first circuit outputs a second reset signal generated by synchronizing the first reset signal with the clock signal. The second circuit receives the clock signal and a signal based on the second reset signal.

Abstract: An example operation may include one or more of receiving a blockchain request comprising a timestamp added by one or more endorsing nodes included within a blockchain network, identifying that the timestamp added by an endorsing node from among the one or more endorsing nodes is a modification to a previously added timestamp provided by the computing node, determining a reputation value for the endorsing node based on a difference between the timestamp added by the endorsing node and the previously added timestamp provided by the computing node, and transmitting the determined reputation value of the endorsing node to an ordering node within the blockchain network.

Abstract: A semiconductor apparatus of the present disclosure includes: a first semiconductor component in which a first circuit unit is provided; and a second semiconductor component in which a second circuit unit is provided and which is stacked to the first semiconductor component, and the second semiconductor component includes a capacitor unit as a decoupling capacitor having a first node and a second node that are connected to the first circuit unit.

Abstract: A photoelectric conversion apparatus includes a second substrate including a signal processing circuit configured to perform signal processing using machine learning on a signal output from the first substrate. The second substrate is disposed on the first substrate in a multilayer structure. The signal processing circuit is so disposed to overlap with a pixel array but not overlap with a light-shielded pixel area as seen in a plan view.

Abstract: A photoelectric conversion apparatus includes a pixel, an A/D conversion portion and an output circuit. The pixel includes first and second photoelectric conversion portions and an accumulation portion configured to accumulate a signal charge in a location other than the photoelectric conversion portions. The A/D conversion portion is configured to perform A/D conversions on signals based on signal charges generated in the photoelectric conversions. The output circuit reads out first and second signals based on first and second signal charges accumulated in the first and second photoelectric conversion portions during an electric charge accumulation period and a third signal based on a third signal charge generated in the second photoelectric conversion portion and accumulated in the accumulation portion during the electric charge accumulation period. Conversion periods for analog-to-digital conversion to be performed on at least two of the first, second, or third signals have different lengths.

Abstract: A photoelectric conversion apparatus includes a light receiving circuit configured to convert light into an electrical signal, a readout circuit configured to read out an analog signal corresponding to the electrical signal, a ?? A/D converter configured to convert the analog signal into a digital signal, and a control circuit configured to change a gain of the photoelectric conversion apparatus in accordance with a change of a driving mode of the photoelectric conversion apparatus. The analog signal read out by the readout circuit is an analog current signal. The readout circuit includes a variable resistor on a signal path for supplying the analog current signal to the ?? A/D converter. The control circuit changes the gain of the photoelectric conversion apparatus by changing a resistance value of the variable resistor.

Abstract: A photoelectric converter includes a pixel array including a plurality of pixels, a capacitive coupling amplifier configured to amplify a signal output from the pixel array, and a delta-sigma AD converter configured to convert, into a digital signal, an analog signal output from the amplifier. The amplifier is formed by a plurality of first elements including an active element and a capacitive element. The delta-sigma AD converter is formed by a plurality of second elements including an active element and a capacitive element. A breakdown voltage of at least one of the plurality of second elements forming the delta-sigma AD converter is lower than a breakdown voltage of the plurality of first elements forming the amplifier.

Abstract: A photoelectric conversion apparatus includes a pixel, an A/D conversion portion and an output circuit. The pixel includes first and second photoelectric conversion portions and an accumulation portion configured to accumulate a signal charge in a location other than the photoelectric conversion portions. The A/D conversion portion is configured to perform A/D conversions on signals based on signal charges generated in the photoelectric conversions. The output circuit reads out first and second signals based on first and second signal charges accumulated in the first and second photoelectric conversion portions during an electric charge accumulation period and a third signal based on a third signal charge generated in the second photoelectric conversion portion and accumulated in the accumulation portion during the electric charge accumulation period. Conversion periods for analog-to-digital conversion to be performed on at least two of the first, second, or third signals have different lengths.

Abstract: A photoelectric conversion device comprising a pixel unit in which a plurality of pixels each comprising a photoelectric conversion element are arranged in a matrix, and a plurality of delta-sigma AD converters each configured to convert a signal output from the pixel unit into a digital signal, is provided. The plurality of delta-sigma AD converters are divided into at least two groups having different timings of starting AD conversion from each other when converting, into digital signals, signals output from the pixels selected out of the plurality of pixels via a common pixel control line.

Abstract: A photoelectric conversion apparatus includes a light receiving circuit configured to convert light into an electrical signal, a readout circuit configured to read out an analog signal corresponding to the electrical signal, a ?? A/D converter configured to convert the analog signal into a digital signal, and a control circuit configured to change a gain of the photoelectric conversion apparatus in accordance with a change of a driving mode of the photoelectric conversion apparatus. The analog signal read out by the readout circuit is an analog current signal. The readout circuit includes a variable resistor on a signal path for supplying the analog current signal to the ?? A/D converter. The control circuit changes the gain of the photoelectric conversion apparatus by changing a resistance value of the variable resistor.

Abstract: An analog-to-digital conversion circuit includes a comparator circuit configured to perform processing of comparison between an analog signal and a ramp signal, and a counter configured to perform count processing in parallel with the comparison processing by the comparator circuit. The analog-to-digital conversion circuit acquires digital data, which is a count value corresponding to the comparison processing, and subjects the analog signal to analog-to-digital conversion. A period from the start to the end of the analog-to-digital conversion of the one analog signal includes a first period and a second period following the first period. The first and the second periods are switched based on an output of the counter. The count processing is performed at a high speed during the first period and performed at a low speed during the second period.

Abstract: A semiconductor apparatus includes a stack of first and second chips each having a plurality of pixel circuits arranged in a matrix form. The pixel circuit of the a-th row and the e1-th column is connected to the electric circuit of the p-th row and the v-th column. The pixel circuit of the a-th row and the f1-th column is connected to the electric circuit of the q-th row and the v-th column. The pixel circuit of the a-th row and the g1-th column is connected to the electric circuit of the r-th row and the v-th column. The pixel circuit of the a-th row and the h1-th column is connected to the electric circuit of the s-th row and the v-th column.

Abstract: An imaging device includes a first chip on which a plurality of first blocks is arranged in a matrix, and a second chip which includes a first block scanning circuit and a second block scanning circuit. The second chip includes a selection circuit configured to select driving timing given to a plurality of pixels, based on a signal output from the first block scanning circuit and a signal output from the second block scanning circuit. A second block includes a circuit other than the selection circuit.

Abstract: A semiconductor apparatus of the present disclosure includes: a first semiconductor component in which a first circuit unit is provided; and a second semiconductor component in which a second circuit unit is provided and which is stacked to the first semiconductor component, and the second semiconductor component includes a capacitor unit as a decoupling capacitor having a first node and a second node that are connected to the first circuit unit.

Abstract: Provided is a logic circuit including a first circuit including a static D flip-flop and a second circuit including a dynamic D flip-flop. The first circuit receives a clock signal and a first reset signal. The first circuit outputs a second reset signal generated by synchronizing the first reset signal with the clock signal. The second circuit receives the clock signal and a signal based on the second reset signal.

Abstract: A photoelectric conversion device comprising a pixel unit in which a plurality of pixels each comprising a photoelectric conversion element are arranged in a matrix, and a plurality of delta-sigma AD converters each configured to convert a signal output from the pixel unit into a digital signal, is provided. The plurality of delta-sigma AD converters are divided into at least two groups having different timings of starting AD conversion from each other when converting, into digital signals, signals output from the pixels selected out of the plurality of pixels via a common pixel control line.

Abstract: A semiconductor apparatus of the present disclosure includes: a first semiconductor component in which a first circuit unit is provided; and a second semiconductor component in which a second circuit unit is provided and which is stacked to the first semiconductor component, and the second semiconductor component includes a capacitor unit as a decoupling capacitor having a first node and a second node that are connected to the first circuit unit.

Abstract: A photoelectric conversion apparatus includes a first substrate having a pixel area, a second substrate disposed in a multilayer structure on the first substrate, and a heat dissipation structure. The second substrate includes a processing unit configured to execute a machine learning process on an image signal output from the pixel area. The heat dissipation structure is disposed in a region adjacent to or in a region overlapping the processing unit when seen in a plan view, the processing unit. The heat dissipation structure is formed on the first or second substrate by a semiconductor active region, polysilicon, a structure including a metal connection part, a TSV structure, or a cavity structure, or the heat dissipation structure is attached to the first substrate in an area other than the pixel area. When the structure is formed on the first substrate, it is electrically connected to the second substrate.