Patents by Inventor Koichi Fujita
Koichi Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210350962Abstract: A powder magnetic core containing a magnetic particle of an Fe-based Cr-containing amorphous alloy and an organic binding substance is provided as a powder magnetic core with a small loss and high initial permeability. The depth profile of the composition determined from the surface of the magnetic particle in the powder magnetic core has the following characteristics. (1) An oxygen-containing region with an O/Fe ratio of 0.1 or more can be defined from the surface of the magnetic particle, and the oxygen-containing region has a depth of 35 nm or less from the surface. (2) A carbon-containing region with a C/O ratio of 1 or more can be defined from the surface of the magnetic particle, and the carbon-containing region has a depth of 5 nm or less from the surface. (3) The oxygen-containing region has a Cr-concentrated portion with a bulk Cr ratio of more than 1.Type: ApplicationFiled: July 19, 2021Publication date: November 11, 2021Inventors: Akio HANADA, Koichi FUJITA, Seiichi ABIKO, Hisato KOSHIBA
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Patent number: 11081602Abstract: An optical semiconductor device of the invention includes: a semiconductor substrate; an optical communication unit that is provided on the semiconductor substrate, as a light receiving unit for receiving an optical signal or a light emitting unit for emitting an optical signal; an interlayer film that covers the semiconductor substrate and the optical communication unit; a Fresnel lens through which the optical signal passes, that is provided on a planarized surface of the interlayer film placed on its side farther from the semiconductor substrate; and a protective film that covers the Fresnel lens and the interlayer film, whose refractive index is larger than that of the interlayer film, and whose surface placed on its side farther from the interlayer film is planarized.Type: GrantFiled: November 27, 2017Date of Patent: August 3, 2021Assignee: Mitsubishi Electric CorporationInventor: Koichi Fujita
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Publication number: 20210175379Abstract: An optical semiconductor device of the invention includes: a semiconductor substrate; an optical communication unit that is provided on the semiconductor substrate, as a light receiving unit for receiving an optical signal or a light emitting unit for emitting an optical signal; an interlayer film that covers the semiconductor substrate and the optical communication unit; a Fresnel lens through which the optical signal passes, that is provided on a planarized surface of the interlayer film placed on its side farther from the semiconductor substrate; and a protective film that covers the Fresnel lens and the interlayer film, whose refractive index is larger than that of the interlayer film, and whose surface placed on its side farther from the interlayer film is planarized.Type: ApplicationFiled: November 27, 2017Publication date: June 10, 2021Applicant: Mitsubishi Electric CorporationInventor: Koichi FUJITA
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Patent number: 10256336Abstract: A semiconductor device is provided with an N?-type drift layer, a P+-type diffusion well region provided on a surface part of the N?-type drift layer, a P-type channel well region, an N+-type diffusion well region, a gate insulating film, a gate electrode laminated on the gate insulating film, a drain trench, a field plate provided in the drain trench with a silicon oxide film and an insulating film interposed therebetween and a field plate electrode formed on the field plate. The field plate is tapered toward a base part of the drain trench. A distance between a side wall of the drain trench and a side face of the field plate is increased toward the base part side.Type: GrantFiled: October 9, 2015Date of Patent: April 9, 2019Assignee: Mitsubishi Electric CorporationInventor: Koichi Fujita
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Patent number: 9882011Abstract: A semiconductor device having electrodes of three or more levels, includes: a semiconductor substrate; an epitaxial layer formed on the semiconductor substrate; a transistor formed on the epitaxial layer; a source electrode formed on the epitaxial layer and electrically connected to a source of the transistor; and a gate drawing electrode formed on the epitaxial layer and electrically connected to a gate of the transistor, wherein the source electrode includes a first source electrode, a second source electrode which is an electrode at a second or higher level on the first source electrode, and a third source electrode which is an electrode at a third or higher level on the second source electrode and above the gate drawing electrode, and the gate drawing electrode is an electrode at a second or higher level on the first source electrode and surrounded with the first, second, and third source electrodes.Type: GrantFiled: October 6, 2016Date of Patent: January 30, 2018Assignee: Mitsubishi Electric CorporationInventor: Koichi Fujita
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Publication number: 20170229552Abstract: A semiconductor device having electrodes of three or more levels, includes: a semiconductor substrate; an epitaxial layer formed on the semiconductor substrate; a transistor formed on the epitaxial layer; a source electrode formed on the epitaxial layer and electrically connected to a source of the transistor; and a gate drawing electrode formed on the epitaxial layer and electrically connected to a gate of the transistor, wherein the source electrode includes a first source electrode, a second source electrode which is an electrode at a second or higher level on the first source electrode, and a third source electrode which is an electrode at a third or higher level on the second source electrode and above the gate drawing electrode, and the gate drawing electrode is an electrode at a second or higher level on the first source electrode and surrounded with the first, second, and third source electrodes.Type: ApplicationFiled: October 6, 2016Publication date: August 10, 2017Applicant: Mitsubishi Electric CorporationInventor: Koichi FUJITA
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Patent number: 9587997Abstract: A magnetostrictive torque sensor incorporated in an electric power steering apparatus includes first through fourth detection coils, which are disposed face-to-face with a magnetostrictive film across a bobbin winding holder that is disposed around an outer circumferential surface of the magnetostrictive film. A bobbin support, which supports the bobbin winding holder, is disposed on the bobbin winding holder at a central position in the axial direction of the first through fourth detection coils.Type: GrantFiled: March 17, 2016Date of Patent: March 7, 2017Assignee: Honda Motor Co., Ltd.Inventors: Koichi Fujita, Atsuhiko Yoneda
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Publication number: 20160273981Abstract: A magnetostrictive torque sensor incorporated in an electric power steering apparatus includes first through fourth detection coils, which are disposed face-to-face with a magnetostrictive film across a bobbin winding holder that is disposed around an outer circumferential surface of the magnetostrictive film. A bobbin support, which supports the bobbin winding holder, is disposed on the bobbin winding holder at a central position in the axial direction of the first through fourth detection coils.Type: ApplicationFiled: March 17, 2016Publication date: September 22, 2016Inventors: Koichi FUJITA, Atsuhiko YONEDA
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Publication number: 20160181413Abstract: A semiconductor device is provided with an N?-type drift layer, a N+-type diffusion well region provided on a surface part of the N?-type drift layer, a P-type channel well region, an N+-type diffusion well region, a gate insulating film, a gate electrode laminated on the gate insulating film, a drain trench, a field plate provided in the drain trench with a silicon oxide film and an insulating film interposed therebetween and a field plate electrode formed on the field plate. The field plate is tapered toward a base part of the drain trench. A distance between a side wall of the drain trench and a side face of the field plate is increased toward the base part side.Type: ApplicationFiled: October 9, 2015Publication date: June 23, 2016Applicant: Mitsubishi Electric CorporationInventor: Koichi FUJITA
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Patent number: 9202908Abstract: A protection diode includes a semiconductor substrate; a gate side well region of a first conductivity type in the semiconductor substrate; a grounding side well region of the first conductivity type in the semiconductor substrate and joined to the gate side well region; a gate side diffusion region of a second conductivity type in the semiconductor substrate and joined to the gate side well region; a grounding side diffusion region of the second conductivity type in the semiconductor substrate, separated from the gate side diffusion region, and joined to the grounding side well region; a gate side electrode connected between a gate of a transistor and the gate side diffusion region; and a grounding electrode connected to the grounding side diffusion region. Dopant impurity concentration in the grounding side well region is lower than dopant impurity concentration in the gate side well region.Type: GrantFiled: November 4, 2014Date of Patent: December 1, 2015Assignee: MITSUBISHI ELECTRIC CORPORATIONInventor: Koichi Fujita
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Patent number: 9202907Abstract: A protection diode includes: a semiconductor substrate; a well region of a first conductivity type in the semiconductor substrate; a gate side diffusion region of a second conductivity type in the semiconductor substrate and joined to the well region; a grounding side diffusion region of the second conductivity type in the semiconductor substrate, separated from the gate side diffusion region, and joined to the well region; a gate side electrode connected between a gate of a transistor and the gate side diffusion region; a grounding electrode connected to the grounding side diffusion region; and an insulating film on the well region. The grounding electrode extends to the well region on the insulating film.Type: GrantFiled: November 4, 2014Date of Patent: December 1, 2015Assignee: MITSUBISHI ELECTRIC CORPORATIONInventor: Koichi Fujita
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Patent number: 9012959Abstract: A semiconductor device includes: a semiconductor substrate having an upper surface and a lower surface; a field effect transistor having a semiconductor layer on the upper surface of the semiconductor substrate, a gate electrode, a drain electrode, and a source electrode; a P-type diffusion region in the semiconductor substrate and extending to the upper surface of the semiconductor substrate; a first N-type diffusion region in the semiconductor substrate and extending t the upper surface of the semiconductor substrate; a first connection electrode connecting the P-type diffusion region to a grounding point; and a second connection electrode connecting the first N-type diffusion region to the gate electrode or the drain electrode. The P-type diffusion region and the first N-type diffusion region constitute a bidirectional lateral diode.Type: GrantFiled: March 6, 2014Date of Patent: April 21, 2015Assignee: Mitsubishi Electric CorporationInventor: Koichi Fujita
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Publication number: 20150054060Abstract: A protection diode includes: a semiconductor substrate; a well region of a first conductivity type in the semiconductor substrate; a gate side diffusion region of a second conductivity type in the semiconductor substrate and joined to the well region; a grounding side diffusion region of the second conductivity type in the semiconductor substrate, separated from the gate side diffusion region, and joined to the well region; a gate side electrode connected between a gate of a transistor and the gate side diffusion region; a grounding electrode connected to the grounding side diffusion region; and an insulating film on the well region. The grounding electrode extends to the well region on the insulating film.Type: ApplicationFiled: November 4, 2014Publication date: February 26, 2015Inventor: Koichi Fujita
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Publication number: 20150054061Abstract: A protection diode includes a semiconductor substrate; a gate side well region of a first conductivity type in the semiconductor substrate; a grounding side well region of the first conductivity type in the semiconductor substrate and joined to the gate side well region; a gate side diffusion region of a second conductivity type in the semiconductor substrate and joined to the gate side well region; a grounding side diffusion region of the second conductivity type in the semiconductor substrate, separated from the gate side diffusion region, and joined to the grounding side well region; a gate side electrode connected between a gate of a transistor and the gate side diffusion region; and a grounding electrode connected to the grounding side diffusion region. Dopant impurity concentration in the grounding side well region is lower than dopant impurity concentration in the gate side well region.Type: ApplicationFiled: November 4, 2014Publication date: February 26, 2015Inventor: Koichi Fujita
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Patent number: 8907424Abstract: A protection diode includes: a semiconductor substrate; a well region of a first conductivity type in the semiconductor substrate; a gate side diffusion region of a second conductivity type in the semiconductor substrate and joined to the well region; a grounding side diffusion region of the second conductivity type in the semiconductor substrate, separated from the gate side diffusion region, and joined to the well region; a gate side electrode connected between a gate of a transistor and the gate side diffusion region; and a grounding electrode connected to the grounding side diffusion region. Dopant impurity concentration in the grounding side diffusion region is lower than dopant impurity concentration in the gate side diffusion region.Type: GrantFiled: January 11, 2013Date of Patent: December 9, 2014Assignee: Mitsubishi Electric CorporationInventor: Koichi Fujita
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Publication number: 20140353724Abstract: A semiconductor device includes: a semiconductor substrate having an upper surface and a lower surface; a field effect transistor having a semiconductor layer on the upper surface of the semiconductor substrate, a gate electrode, a drain electrode, and a source electrode; a P-type diffusion region in the semiconductor substrate and extending to the upper surface of the semiconductor substrate; a first N-type diffusion region in the semiconductor substrate and extending t the upper surface of the semiconductor substrate; a first connection electrode connecting the P-type diffusion region to a grounding point; and a second connection electrode connecting the first N-type diffusion region to the gate electrode or the drain electrode. The P-type diffusion region and the first N-type diffusion region constitute a bidirectional lateral diode.Type: ApplicationFiled: March 6, 2014Publication date: December 4, 2014Applicant: Mitsubishi Electric CorporationInventor: Koichi Fujita
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Patent number: 8569871Abstract: A semiconductor device having a molded package includes a semiconductor chip, a thick-film lead electrode to which the semiconductor chip is die-bonded, a thin-film lead electrode having a thickness smaller than that of the thick-film lead electrode, a wire which electrically connects the semiconductor chip to the thin-film lead wire, and a molding material in which the semiconductor chip and the wire are encapsulated. A portion of a lower surface of the thick-film lead electrode is exposed at a package lower surface as a heat dissipating electrode. A portion of an upper surface of the thin-film lead electrode is exposed at a package upper surface as an input/output electrode. A portion of an upper surface of the thick-film lead electrode is exposed at the package upper surface as a grounding electrode.Type: GrantFiled: June 13, 2006Date of Patent: October 29, 2013Assignee: Mitsubishi Electric CorporationInventors: Koichi Fujita, Yoji Maruyama, Kenji Hino
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Publication number: 20130264648Abstract: A protection diode includes: a semiconductor substrate; a well region of a first conductivity type in the semiconductor substrate; a gate side diffusion region of a second conductivity type in the semiconductor substrate and joined to the well region; a grounding side diffusion region of the second conductivity type in the semiconductor substrate, separated from the gate side diffusion region, and joined to the well region; a gate side electrode connected between a gate of a transistor and the gate side diffusion region; and a grounding electrode connected to the grounding side diffusion region. Dopant impurity concentration in the grounding side diffusion region is lower than dopant impurity concentration in the gate side diffusion region.Type: ApplicationFiled: January 11, 2013Publication date: October 10, 2013Applicant: Mitsubishi Electric CorporationInventor: Koichi Fujita
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Patent number: 8546610Abstract: A method for preparing a phenylalanine derivative having a quinazoline-dione ring represented by the following formula (1) or a pharmaceutically acceptable salt thereof, comprising the following steps (a), (b) and (c): (a) reacting an acyl phenylalanine derivative represented by the following formula (2): with a carbonyl group-introducing reagent and a specific anthranilic acid derivative to thus form the corresponding carboxy-asymmetric urea derivative; (b) converting the carboxy-asymmetric urea derivative into the corresponding quinazoline-dione derivative in the presence of a carboxyl group-activating agent: (c) if desired, substituting an N-alkyl group for the hydrogen atom bonded to the nitrogen atom present in the quinazoline-dione ring of the quinazoline-dione derivative using an N-alkylation agent and then deprotecting the resulting product, when the substituent R3? which is a group corresponding to R3 is protected.Type: GrantFiled: August 26, 2011Date of Patent: October 1, 2013Assignee: Ajinomoto Co., Inc.Inventors: Noriyasu Kataoka, Kotaro Okado, Tatsuhiro Yamada, Koichi Fujita, Tamotsu Suzuki, Tatsuya Okuzumi, Masayuki Sugiki, Akinori Tatara
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Publication number: 20130041000Abstract: Azole compounds represented by formula I: wherein ring A is isoxazole and the like, R1 is a substituted or unsubstituted aryl group and the like, R2 is a hydrogen atom and the like, and R3 is a substituted or unsubstituted alkyl group and the like, and pharmaceutically acceptable salts thereof inhibit the physiological activity of lysophosphatidic acid (LPA), and are useful as for the prophylaxis or treatment of diseases in which inhibition of the physiological activity of LPA is useful for the prophylaxis or treatment thereof, such as diseases involving the LPA receptor.Type: ApplicationFiled: August 14, 2012Publication date: February 14, 2013Applicant: AJINOMOTO CO., INC.Inventors: Takashi YAMAMOTO, Akira Chiba, Koichi Fujita, Yuka Kataba, Koji Ohsumi, Sayaka Asari, Naoyuki Fukuchi, Misato Noguchi, Itsuya Tanabe, Chiori Ijichi, Naoko Oomuta, Yuko Iida, Satoshi Iwayama