Patents by Inventor Koichi Kanemoto

Koichi Kanemoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070194454
    Abstract: This invention is to provide a nonvolatile memory device that enhances a size reduction and mass productivity while ensuring reliability and signal transmission performance. A nonvolatile memory chip having a first side formed with no pads and a second side formed with pads is mounted on a mounting substrate. A control chip for controlling the nonvolatile memory chip is mounted on the nonvolatile memory chip. The control chip has a first pad row corresponding to the pads of the nonvolatile memory chip. The first pad row is mounted adjacent to the first side of the nonvolatile memory chip. The first pad row of the control chip and a first electrode row formed on the mounting substrate are connected via a first wire group. The pads of the nonvolatile memory chip and a second electrode row formed on the mounting substrate are connected via a second wire group. The first electrode row and the second electrode row are connected through wirings formed in the mounting substrate.
    Type: Application
    Filed: January 23, 2007
    Publication date: August 23, 2007
    Inventors: Kazuko HANAWA, Takashi Kikuchi, Koichi Kanemoto, Michiaki Sugiyama, Chikako Imura
  • Publication number: 20070013083
    Abstract: Improvement in the mountability of a semiconductor device is aimed at. By preparing a package substrate which has a plurality of lands of NSMD structure, and the taking-out wiring and dummy wiring which were connected to each of the lands, and have been arranged mutually in the location of 180° symmetry, and printing solder by a printing method to the lands after the package assembly, the variation in the height of the solder coat between lands can be reduced, and improvement in the mountability of LGA (semiconductor device) is aimed at.
    Type: Application
    Filed: July 10, 2006
    Publication date: January 18, 2007
    Inventors: Takashi Kikuchi, Koichi Kanemoto, Michiaki Sugiyama, Hiroshi Kawakubo