Patents by Inventor Koichi Morikawa
Koichi Morikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160151039Abstract: According to one embodiment, an ultrasound diagnosis apparatus includes a transmitter, a receiver, a needle tip position acquisition unit, a ROI setting unit, an image generator, and a display controller. The transmitter transmits ultrasound beams to a subject into which a puncture needle is inserted while scanning the subject. The receiver receives signals reflected from the subject. The needle tip position acquisition unit successively acquires the position of the needle tip of the puncture needle. The ROI setting unit sets a region of interest at least in a direction in which the puncture needle is inserted. The image generator generates an image of the region of interest according to the position of the needle tip based on the signals. The display controller displays the image of the region of interest.Type: ApplicationFiled: November 25, 2015Publication date: June 2, 2016Applicants: Kabushiki Kaisha Toshiba, Toshiba Medical Systems CorporationInventors: Koichi MORIKAWA, Isao Uchiumi, Nobuyuki Iwama, Toru Hirano, Hironobu Hongou, Yuhei Fukuo
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Publication number: 20160095582Abstract: In general, according to one embodiment, an ultrasonic diagnostic apparatus includes an ultrasonic probe, a plurality of power supplies implemented by circuitry, at least one pulser, and a controller implemented by circuitry. The ultrasonic probe includes a plurality of piezoelectric transducers which generate ultrasonic waves in response to supplied driving signals. The pulser outputs the driving signal based on an applied voltage applied from any one of the plurality of power supplies. The controller switches the plurality of power supplies in accordance with the at least one pulser used for generation of the driving signal in one transmission mode period.Type: ApplicationFiled: October 1, 2015Publication date: April 7, 2016Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Medical Systems CorporationInventors: Nobuyuki IWAMA, Hironobu HONGOU, lsao UCHIUMI, Koichi MORIKAWA, Takatoshi OKUMURA
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Publication number: 20150359511Abstract: An ultrasonic diagnostic device according to an embodiment includes an ultrasonic probe and transformer circuitry. The ultrasonic probe transmits ultrasonic waves to a subject and converts reflection waves reflected by the subject to a reflection wave signal. The transformer circuitry includes an auto transformer that transforms the reflection wave signal at a transformation ratio in accordance with a control signal based on information related to the ultrasonic probe among a plurality of transformation ratios.Type: ApplicationFiled: June 11, 2015Publication date: December 17, 2015Applicants: Kabushiki Kaisha Toshiba, Toshiba Medical Systems CorporationInventors: Isao UCHIUMI, Nobuyuki IWAMA, Yasuo MIYAJIMA, Hironobu HONGOU, Takatoshi OKUMURA, Koichi MORIKAWA
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Publication number: 20150216508Abstract: An ultrasound diagnosis apparatus includes a transmitting and receiving circuitry, an input circuitry, and a processing circuitry. The transmitting and receiving circuitry transmits a first ultrasound wave used for changing the shape of a tissue in the body of a patient and transmits/receives a second ultrasound wave that is transmitted/received with timing different from that of the first ultrasound wave. The input circuitry receives an input of a request indicating that the first ultrasound wave should be transmitted. When the input circuitry has received the input of the request indicating that the first ultrasound wave should be transmitted, the processing circuitry controls the transmission of the first ultrasound wave in accordance with the strength of a reflected-wave signal of the second ultrasound wave or one or more pixel values of an image resulting from an imaging process performed by using the reflected-wave signal of the second ultrasound wave.Type: ApplicationFiled: April 17, 2015Publication date: August 6, 2015Applicants: Kabushiki Kaisha Toshiba, Toshiba Medical Systems CorporationInventors: Nobuyuki IWAMA, Hironobu HONGOU, Isao UCHIUMI, Koichi MORIKAWA, Yasuo MIYAJIMA, Takatoshi OKUMURA
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Publication number: 20150164483Abstract: An ultrasonic diagnosis apparatus includes an ultrasonic probe, an image generation unit, a display unit, and a control unit. The image generation unit generates image data from a reflected wave received from the ultrasonic probe. The display unit displays the image data. The ultrasonic probe includes a plurality of temperature sensors that measure the temperature of the ultrasonic probe and a switching circuit that is connected to the respective temperature sensors and switches connection to any one of the temperature sensors to a valid state to output data from the temperature sensors to a temperature detector. The control unit includes an instruction unit that instructs the switching circuit to switch connection to any one of the temperature sensors to a valid state at a predetermined time interval and a determination unit that determines whether a temperature measured by the temperature detector is within a set temperature range.Type: ApplicationFiled: February 26, 2015Publication date: June 18, 2015Applicants: Kabushiki Kaisha Toshiba, Toshiba Medical Systems CorporationInventors: Yasuo MIYAJIMA, Hironobu HONGOU, Isao UCHIUMI, Nobuyuki IWAMA, Koichi MORIKAWA, Takatoshi OKUMURA
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Patent number: 8420255Abstract: A storage cell includes a storage element including first and second electrodes which are opposite to each other in a predetermined direction, a first terminal bonded to the first electrode, a second terminal bonded to the second electrode, and an outer resin covering the storage element to expose an outer surface of the first terminal and an outer surface of the second terminal from the outer resin. The storage element has substantially a rectangular shape viewing from the predetermined direction. The outer resin has substantially a rectangular shape viewing from the predetermined direction. The outer resin has first and second surfaces opposite to each other, and has a third surface connected with the first surface and the second surface. The first terminal is exposed on the first surface of the outer resin. The second terminal has a shape extending beyond the storage element along the first and third surfaces, and is exposed on the first surface.Type: GrantFiled: August 3, 2007Date of Patent: April 16, 2013Assignee: Panasonic CorporationInventors: Koichi Morikawa, Shinji Nakano, Nario Niibo, Yukio Nishioka, Masayuki Sato, Masashige Ashizaki
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Patent number: 7916452Abstract: A coin-type electrochemical element enables the external lead terminal portions to be accurately and reliably attached to a first lid portion and to a second lid portion of the coin-type electrochemical element, and a method of its production. A coin-type electric double layer capacitor includes a first lid portion and a second lid portion. External lead terminal portions, each having a nearly triangular shape, are separately connected to the outer surfaces of the lid portions. Upon providing the external lead terminal portions having the triangular shape, a welded portion is allowed to have an increased area enabling the coin-type electrochemical element of even a small size to be accurately and reliably welded and making it possible to provide the coin-type electrochemical element having excellent reliability.Type: GrantFiled: November 24, 2005Date of Patent: March 29, 2011Assignee: Panasonic CorporationInventors: Masatoshi Tasei, Nario Niibo, Masashige Ashizaki, Yukio Nishioka, Hirofumi Iwashima, Koichi Morikawa
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Patent number: 7742280Abstract: A coin-shaped storage cell (1) has a pair of polarizable electrodes (17, 18), an insulating separator (21) interposed between the polarizable electrodes, an electrolytic solution (22) impregnated in the polarizable electrodes (17, 18) and the separator (21), a metal case (11) for housing the polarizable electrodes (17, 18), an insulating ring packing (15) arranged in the metal case, and a top lid (13) which is caulked integrally with the metal case (11) via the ring packing (15). The inner bottom surface of the metal case (11) is provided with recessed and projected portions.Type: GrantFiled: March 10, 2009Date of Patent: June 22, 2010Assignee: Panasonic CorporationInventors: Masayuki Sato, Masashige Ashizaki, Koichi Morikawa, Isamu Nishiyama, Nario Niibo, Masayuki Taniguchi
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Patent number: 7675344Abstract: A level shifter that prevents through currents thereat, including a holding circuit having an inverter made up of transistors connected between an internal node and a ground potential and an inverter made up of transistors connected between an internal node and the ground potential. These inverters are connected in loop form thereby to hold signals of nodes. Thus, even when input signals complementary to each other originally are both brought to a level “L”, the signals of the nodes are held at the immediately preceding level, thus making it possible to prevent through currents from flowing through the transistors respectively.Type: GrantFiled: March 20, 2008Date of Patent: March 9, 2010Assignee: Oki Semiconductor Co., Ltd.Inventor: Koichi Morikawa
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Patent number: 7576969Abstract: A coin-shaped storage cell (1) has a pair of polarizable electrodes (17, 18), an insulating separator (21) interposed between the polarizable electrodes, an electrolytic solution (22) impregnated in the polarizable electrodes (17, 18) and the separator (21), a metal case (11) for housing the polarizable electrodes (17, 18), an insulating ring packing (15) arranged in the metal case, and a top lid (13) which is caulked integrally with the metal case (11) via the ring packing (15). The inner bottom surface of the metal case (11) is provided with recessed and projected portions.Type: GrantFiled: December 2, 2004Date of Patent: August 18, 2009Assignee: Panasonic CorporationInventors: Masayuki Sato, Masashige Ashizaki, Koichi Morikawa, Isamu Nishiyama, Nario Niibo, Masayuki Taniguchi
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Publication number: 20090181297Abstract: A storage cell includes a storage element, a first case having a first flat portion contacting an upper surface of the storage element and having a rectangular shape, a second case having a second flat portion contacting a lower surface of the storage element and having a rectangular shape, a gasket allowing the storage element to be accommodated between the first case and the second case, first and second terminal plates joined to the first and second cases, respectively, a first sealing resin for sealing the first case and the gasket, a second sealing resin for sealing the second case and the gasket, and a package resin covering the above components. The gasket has a rectangular frame shape, and has a cross section having substantially an H-shape. Edges of the first and second cases are inserted in recesses in the gasket and sealed with the first and second sealing resins, respectively. This storage cell has a high withstanding temperature and reduces an area having the cell mounted thereto.Type: ApplicationFiled: December 31, 2008Publication date: July 16, 2009Applicant: PANASONIC CORPORATIONInventors: Masashige Ashizaki, Masayuki Sato, Koichi Morikawa, Nario Niibo
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Publication number: 20090176154Abstract: A coin-shaped storage cell (1) has a pair of polarizable electrodes (17, 18), an insulating separator (21) interposed between the polarizable electrodes, an electrolytic solution (22) impregnated in the polarizable electrodes (17, 18) and the separator (21), a metal case (11) for housing the polarizable electrodes (17, 18), an insulating ring packing (15) arranged in the metal case, and a top lid (13) which is caulked integrally with the metal case (11) via the ring packing (15). The inner bottom surface of the metal case (11) is provided with recessed and projected portions.Type: ApplicationFiled: March 10, 2009Publication date: July 9, 2009Inventors: Masayuki SATO, Masashige Ashizaki, Koichi Morikawa, Isamu Nishiyama, Nario Niibo, Masayuki Taniguchi
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Publication number: 20090169989Abstract: A storage cell includes a storage element including first and second electrodes which are opposite to each other in a predetermined direction, a first terminal bonded to the first electrode, a second terminal bonded to the second electrode, and an outer resin covering the storage element to expose an outer surface of the first terminal and an outer surface of the second terminal from the outer resin. The storage element has substantially a rectangular shape viewing from the predetermined direction. The outer resin has substantially a rectangular shape viewing from the predetermined direction. The outer resin has first and second surfaces opposite to each other, and has a third surface connected with the first surface and the second surface. The first terminal is exposed on the first surface of the outer resin. The second terminal has a shape extending beyond the storage element along the first and third surfaces, and is exposed on the first surface.Type: ApplicationFiled: August 3, 2007Publication date: July 2, 2009Applicant: PANASONIC CORPORATIONInventors: Koichi Morikawa, Shinji Nakano, Nario Niibo, Yukio Nishioka, Masayuki Sato, Masashige Ashizaki
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Patent number: 7515395Abstract: There is provided a casing material for a storage cell having sufficient corrosion resistance and strength even under a charging environment of a high voltage exceeding 2.8 V. This casing material for the storage cell comprises C: not more than 0.03 mass %, Si: 0.01-0.50 mass %, Mn: not more than 0.20 mass %, P: not more than 0.04 mass %, S: not more than 0.0010 mass %, Ni: 20.0-40.0 mass %, Cr: 20.0-30.0 mass %, Mo: 5.0-10.0 mass %, Al: 0.001-0.10 mass %, N: 0.10-0.50 mass %, Ca: not more than 0.001 mass %, Mg: 0.0001-0.0050 mass %, 0: not more than 0.005 mass %, provided that contents of Cr, Mo and N satisfy Cr+3.3×Mo+20×N?43, and the balance being substantially Fe and inevitable impurities, in which a content of CaO as an oxide inclusion in steel is not more than 20 mass %.Type: GrantFiled: December 15, 2004Date of Patent: April 7, 2009Assignees: Panasonic Corporation, Nippon Yakin Kogyo Co., Ltd.Inventors: Koichi Morikawa, Masashige Ashizaki, Eri Hirose, Yutaka Kobayashi
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Patent number: 7477566Abstract: A multi-port semiconductor memory in which wrong read-out due to coupling noise is hardly generated and operation speed is fast is provided. When data are written in memory cells from a pair of bit lines for one port, NMOS transistors become on. Electrical potential only at a low-level side is pulled up between the pair of bit lines, because electrical potential at a high-level side is approximately equivalent to power potential. Accordingly, when one of adjacent bit lines is on high-level and the other is on low-level, potential difference is reduced by the pull-up, resulting in reduction of generating time of the coupling noise. Although read-out of data can not be performed while the coupling noise is being generated, since the concerned generating time is reduced in the invention, the operation speed is substantially fast.Type: GrantFiled: November 27, 2006Date of Patent: January 13, 2009Assignee: OKI Semiconductor Co., Ltd.Inventor: Koichi Morikawa
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Publication number: 20080246530Abstract: The present invention provides a level shifter that prevents through currents thereat. In the level shifter, a holding circuit is provided which comprises an inverter made up of transistors connected between an internal node and a ground potential and an inverter made up of transistors connected between an internal node and the ground potential. These inverters are connected in loop form thereby to hold signals of nodes. Thus, even when input signals complementary to each other originally are both brought to a level “L”, the signals of the nodes are held at the immediately preceding level, thus making it possible to prevent through currents from flowing through the transistors respectively.Type: ApplicationFiled: March 20, 2008Publication date: October 9, 2008Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Koichi Morikawa
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Publication number: 20080089011Abstract: A coin-type electrochemical element enabling the external lead terminal portions to be accurately and reliably attached to a first lid portion and to a second lid portion of the coin-type electrochemical element, and a method of its production. Coin-type electric double layer capacitor (11) includes first lid portion (19) and second lid portion (18). External lead terminal portions (28) and (33) having a nearly triangular shape are separately connected to the outer surfaces of the lid portions. Upon providing external lead terminal portions (28) and (33) having the triangular shape, welded portion (35) is allowed to have an increased area enabling the coin-type electrochemical element of even a small size to be accurately and reliably welded and making it possible to provide the coin-type electrochemical element having excellent reliability.Type: ApplicationFiled: November 24, 2005Publication date: April 17, 2008Inventors: Masatoshi Tasei, Nario Niibo, Masashige Ashizaki, Yukio Nishioka, Hirofumi Iwashima, Koichi Morikawa
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Publication number: 20070109721Abstract: A coin-shaped storage cell (1) has a pair of polarizable electrodes (17, 18), an insulating separator (21) interposed between the polarizable electrodes, an electrolytic solution (22) impregnated in the polarizable electrodes (17, 18) and the separator (21), a metal case (11) for housing the polarizable electrodes (17, 18), an insulating ring packing (15) arranged in the metal case, and a top lid (13) which is caulked integrally with the metal case (11) via the ring packing (15). The inner bottom surface of the metal case (11) is provided with recessed and projected portions.Type: ApplicationFiled: December 2, 2004Publication date: May 17, 2007Inventors: Masayuki Sato, Masashige Ashizaki, Koichi Morikawa, Isamu Nishiyama, Nario Niibo, Masayuki Taniguchi
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Publication number: 20070070779Abstract: A multi-port semiconductor memory in which wrong read-out due to coupling noise is hardly generated and operation speed is fast is provided. When data are written in memory cells from a pair of bit lines for one port, NMOS transistors become on. Electrical potential only at a low-level side is pulled up between the pair of bit lines, because electrical potential at a high-level side is approximately equivalent to power potential. Accordingly, when one of adjacent bit lines is on high-level and the other is on low-level, potential difference is reduced by the pull-up, resulting in reduction of generating time of the coupling noise. Although read-out of data can not be performed while the coupling noise is being generated, since the concerned generating time is reduced in the invention, the operation speed is substantially fast.Type: ApplicationFiled: November 27, 2006Publication date: March 29, 2007Inventor: Koichi Morikawa
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Publication number: 20070065717Abstract: There is provided a casing material for a storage cell having sufficient corrosion resistance and strength even under a charging environment of a high voltage exceeding 2.8 V. This casing material for the storage cell comprises C: not more than 0.03 mass %, Si: 0.01-0.50 mass %, Mn: not more than 0.20 mass %, P: not more than 0.04 mass %, S: not more than 0.0010 mass %, Ni: 20.0-40.0 mass %, Cr: 20.0-30.0 mass %, Mo: 5.0-10.0 mass %, Al: 0.001-0.10 mass %, N: 0.10-0.50 mass %, Ca: not more than 0.001 mass %, Mg: 0.0001-0.0050 mass %, 0: not more than 0.005 mass %, provided that contents of Cr, Mo and N satisfy Cr+3.3×Mo+20×N?43, and the balance being substantially Fe and inevitable impurities, in which a content of CaO as an oxide inclusion in steel is not more than 20 mass %.Type: ApplicationFiled: December 15, 2004Publication date: March 22, 2007Inventors: Koichi Morikawa, Masashiga Ashizaki, Eri Hirose, Yutaka Kobayashi