Patents by Inventor Koichi Sugiyama

Koichi Sugiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090084339
    Abstract: A cylinder of an internal combustion engine is communicated with intake ports. Each of intake valves and each of fuel injection valves are provided to a corresponding one of the intake ports to inject fuel into a combustion chamber through a curved portion and an opening of the corresponding intake port. An injection axis of each fuel injection valve intersects with a surface of the corresponding intake valve placed in a close position at an intersecting point that is located on an upstream side of a central axis of the corresponding intake valve.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 2, 2009
    Applicants: DENSO CORPORATION, NIPPON SOKEN, INC.
    Inventors: Hidekazu Oomura, Yukio Tomiita, Yoshinori Yamashita, Koichi Sugiyama, Hideaki Ichihara, Yoshihiro Nakase, Takanori Suzuki
  • Publication number: 20090075116
    Abstract: A novel gravure engraving roll that has a surface-reinforcing coating layer being nontoxic and having no danger of pollution generation at all and that excels in printing life; and a process for producing the same. There is provided a gravure engraving roll comprising: a metal hollow roll; a copper plating layer superimposed on the surface of the hollow roll and on its surface furnished with a multiplicity of gravure cells; a metal layer superimposed on the surface of the copper plating layer; a layer of carbide of said metal superimposed on the surface of the metal layer; and a diamond-like carbon coating covering the surface of the metal carbide layer.
    Type: Application
    Filed: May 24, 2006
    Publication date: March 19, 2009
    Applicant: THINK LABORATORY CO., LTD.
    Inventors: Tatsuo Shigeta, Tsutomu Sato, Koichi Sugiyama, Takayuki Asano
  • Patent number: 7492031
    Abstract: A semiconductor device comprises a first base layer of a first conductive type which has a first surface and a second surface; a second base layer of a second conductive type which is formed on the first surface; first and second gate electrodes which are formed by embedding an electrically conductive material into a plurality of trenches via gate insulating films, the plurality of trenches being formed such that bottoms of the trenches reach the first base layer; source layers of the first conductive type which are formed on a surface area of the second base layer so as to be adjacent to both side walls of the trench provided with the first gate electrode and one side wall of the trench provided with the second gate electrode, respectively; an emitter layer of the second conductive type which is formed on the second surface; emitter electrodes which are formed on the second base layer and the source layers; a collector electrode which is formed on the emitter layer; and first and second terminals which are e
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: February 17, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Sugiyama, Tomoki Inoue, Hideaki Ninomiya, Masakazu Yamaguchi
  • Publication number: 20090039386
    Abstract: A semiconductor device comprises a first base layer of a first conductivity type; a plurality of second base layers of a second conductivity type, provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers, and formed to be deeper than the second base layers; an emitter layer formed along the trench on a surface of the second base layers; a collector layer of the second conductivity type, provided on a second surface of the first base layer opposite to the first surface; an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated from the second base layers and the emitter layer by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being deeper than the second base layers and being electrically isolated from the emitter layer and t
    Type: Application
    Filed: October 10, 2008
    Publication date: February 12, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuneo OGURA, Masakazu Yamaguchi, Tomoki Inoue, Hideaki Ninomiya, Koichi Sugiyama
  • Patent number: 7459751
    Abstract: Disclosed is an insulated gate semiconductor device including a first region having a gate electrode region and a first insulating film region surrounding the gate electrode region; a semiconductor region which includes a channel forming region and is disposed to oppose the gate electrode region with the first insulating film region between them; and a second region which has a conductor region buried in a semiconductor region not including the channel forming region disposed to oppose the gate electrode region with the first insulating film region between them, and has a second insulating film region which separates the conductor region from the semiconductor region.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: December 2, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koichi Sugiyama
  • Patent number: 7456487
    Abstract: This disclosure concerns a semiconductor device that includes a first base layer; second base layers provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers; an emitter layer formed on a surface of the second base layers; a collector layer provided below a second surface of the first base layer, an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being electrically isolated from the emitter layer and the second base layers, wherein the space section includes a semiconductor layer being deeper than the second base layers.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: November 25, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Masakazu Yamaguchi, Tomoki Inoue, Hideaki Ninomiya, Koichi Sugiyama
  • Patent number: 7361954
    Abstract: Disclosed is a power semiconductor device, including: a gate electrode having a cross section having a length in a vertical direction, and having a shape extending in a direction orthogonal to the cross section; a gate insulating film surrounding the gate electrode; an n-type source layer positioning to face the gate electrode via the gate insulating film; a p-type base layer adjacent to the n-type source layer and positioning to face the gate electrode via the gate insulating film; an n-type base layer adjacent to the p-type base layer and positioning to face the gate electrode via the gate insulating film without being in contact with the n-type source layer; and a main electrode being in contact with the n-type source layer and the p-type base layer with plural lateral planes extending in a direction crossing the direction in which the gate electrode is extending.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: April 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Sugiyama, Masakazu Yamaguchi
  • Publication number: 20080089664
    Abstract: Copying, dubbing or reproducing copyrighted digital data can be inhibited or restricted to properly protect a copyright. AV data recorded on a pre-recorded tape is output from a reproducing unit of a first digital VCR with protective information indicating whether the copy of the AV data is inhibited or not. The protective information is input with the A/V data to a second digital VCR. Copy permission information of a blank tape loaded in the second digital VCR is discriminated and the second digital VCR records the AV data supplied from the first digital VCR based on the protective information and the copy permission information.
    Type: Application
    Filed: August 9, 2007
    Publication date: April 17, 2008
    Inventors: Koichi Sugiyama, Etsurou Sakamoto
  • Patent number: 7359137
    Abstract: Copying, dubbing or reproducing copyrighted digital data can be inhibited or restricted to properly protect a copyright. AV data recorded on a pre-recorded tape is output from a reproducing unit of a first digital VCR with protective information indicating whether the copy of the AV data is inhibited or not. The protective information is input with the A/V data to a second digital VCR. Copy permission information of a blank tape loaded in the second digital VCR is discriminated and the second digital VCR records the AV data supplied from the first digital VCR based on the protective information and the copy permission information.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: April 15, 2008
    Assignee: Sony Corporation
    Inventors: Koichi Sugiyama, Etsurou Sakamoto
  • Patent number: 7344093
    Abstract: A tubular member is arranged radially inward of a coil to cover outer peripheral parts of a movable core and of a stationary core. The stationary core has a tapered portion in an opposing portion, which is opposed to the movable core. The stationary core also has a large diameter portion on a counter movable core side of the tapered portion. An outer diameter of the tapered portion is increased from an opposing end surface side part toward the large diameter portion. The outer diameter of the opposing end surface of the opposing portion, which is opposed to the movable core, is generally the same as an outer diameter of the movable core. An outer diameter of the large diameter portion of the stationary-core is larger than the outer diameter of the movable core.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: March 18, 2008
    Assignee: Denso Corporation
    Inventors: Shinsuke Yamamoto, Masaki Akutagawa, Koichi Sugiyama
  • Publication number: 20080013200
    Abstract: Copying, dubbing or reproducing copyrighted digital data can be inhibited or restricted to properly protect a copyright. AV data recorded on a pre-recorded tape is output from a reproducing unit of a first digital VCR with protective information indicating whether the copy of the AV data is inhibited or not. The protective information is input with the A/V data to a second digital VCR. Copy permission information of a blank tape loaded in the second digital VCR is discriminated and the second digital VCR records the AV data supplied from the first digital VCR based on the protective information and the copy permission information.
    Type: Application
    Filed: August 9, 2007
    Publication date: January 17, 2008
    Inventors: Koichi Sugiyama, Etsurou Sakamoto
  • Patent number: 7319579
    Abstract: A snubber circuit has a voltage detection circuit which detects that a voltage between first and second terminals exceeds a predetermined voltage, a protection circuit which performs control to prevent an overvoltage between the first and second terminals when the voltage detection circuit detects that the voltage between the first and second terminals exceeds the predetermined voltage, and a voltage control circuit which bypasses a portion of a main current flowing between the first and second terminals to the protection circuit when the voltage detection circuit detects that the voltage between the first and second terminals exceeds the predetermined voltage.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: January 15, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoki Inoue, Koichi Sugiyama
  • Publication number: 20070278566
    Abstract: A semiconductor device includes a base layer of a first conductivity type, a barrier layer of a first conductivity type formed on the base layer, a trench formed from the surface of the barrier layer to such a depth as to reach a region in the vicinity of an interface between the barrier layer and the base layer, a gate electrode formed in the trench via a gate insulating film, a contact layer of a second conductivity type selectively formed in a surface portion of the barrier layer, a source layer of the first conductivity type selectively formed in the surface portion of the barrier layer so as to contact the contact layer and a side wall of the gate insulating film in the trench, and a first main electrode formed so as to contact the contact layer and the source layer.
    Type: Application
    Filed: August 3, 2007
    Publication date: December 6, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuneo Ogura, Tomoki Inoue, Hideaki Ninomiya, Koichi Sugiyama
  • Patent number: 7303846
    Abstract: An electrophotographic toner contains at least a binder resin and a colorant, and log10{[Cu]/[C]} satisfies the following equation (1): ?5.0?log10{[Cu]/[C]}??3.5 ??(1) in which, [C] represents a carbon content (%) and [Cu] represents a copper content (%), measured with fluorescent X-ray. An electrophotographic developer containing the toner, a method for producing the toner, and a method for forming an image by using the toner are also provided.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: December 4, 2007
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Teruo Sakai, legal representative, Yuka Ishihara, Atsuhiko Eguchi, Masahiro Okita, Jun Igarashi, Koichi Sugiyama, Susumu Yoshino, Sueko Sakai, deceased
  • Patent number: 7289134
    Abstract: To provide a thermal printer capable of easily improving a recording quality, a plurality of recording units, arranged along a carrying path of a recording medium, are respectively provided with a recording head, a platen which opposes the recording head with the carrying path interposed therebetween and is brought into contact with and separated from the recording head, a carrying unit including a carrying roller arranged on the downstream side of the recording head, and a friction unit including a friction roller arranged on the downstream side of the carrying unit in order to prevent the disturbance generated on the downstream side from propagating upstream via the recording medium, between the respective recording units.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: October 30, 2007
    Assignee: Alps Electric Co., Ltd.
    Inventors: Hiroyuki Murayama, Hiroshi Takahashi, Koichi Sugiyama
  • Patent number: 7277248
    Abstract: Copying, dubbing or reproducing copyrighted digital data can be inhibited or restricted to properly protect a copyright. AV data recorded on a pre-recorded tape is output from a reproducing unit of a first digital VCR with protective information indicating whether the copy of the AV data is inhibited or not. The protective information is input with the A/V data to a second digital VCR. Copy permission information of a blank tape loaded in the second digital VCR is discriminated and the second digital VCR records the AV data supplied from the first digital VCR based on the protective information and the copy permission information.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: October 2, 2007
    Assignee: Sony Corporation
    Inventors: Koichi Sugiyama, Etsurou Sakamoto
  • Publication number: 20070210350
    Abstract: A power semiconductor device includes: a semiconductor layer having a trench extending along a first direction in a stripe configuration; a gate electrode buried in the trench for controlling a current flowing in the semiconductor layer; and a gate plug made of a material having higher electrical conductivity than the gate electrode, the gate plug having the stripe configuration and being connected to the gate electrode along the first direction. The semiconductor layer includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided partially in an upper face of the first semiconductor layer; a third semiconductor layer of the first conductivity type provided partially on the second semiconductor layer; and a fourth semiconductor layer of the second conductivity type provided on a lower face of the first semiconductor layer.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 13, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ichiro Omura, Yoko Sakiyama, Hideki Nozaki, Atsushi Murakoshi, Masanobu Tsuchitani, Koichi Sugiyama, Tsuneo Ogura, Masakazu Yamaguchi, Tatsuo Naijo
  • Patent number: 7268390
    Abstract: A semiconductor device includes a base layer of a first conductivity type, a barrier layer of a first conductivity type formed on the base layer, a trench formed from the surface of the barrier layer to such a depth as to reach a region in the vicinity of an interface between the barrier layer and the base layer, a gate electrode formed in the trench via a gate insulating film, a contact layer of a second conductivity type selectively formed in a surface portion of the barrier layer, a source layer of the first conductivity type selectively formed in the surface portion of the barrier layer so as to contact the contact layer and a side wall of the gate insulating film in the trench, and a first main electrode formed so as to contact the contact layer and the source layer.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: September 11, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Tomoki Inoue, Hideaki Ninomiya, Koichi Sugiyama
  • Patent number: RE40705
    Abstract: A high-breakdown-voltage semiconductor apparatus is provided, wherein when a gate capacitance of that portion of a gate electrode, under which a channel is formed, is Cg [F], a resistance in a channel length direction of that portion of the gate electrode, under which the channel is formed, is Rg [?], a threshold voltage, which is to be applied to the gate electrode and application of which permits flow of a drain current, is Vth [V], a voltage to be applied to the gate electrode to cut off the drain current is Voff [V], and a ratio of increase in the drain voltage per unit time at the time of cutting off the drain current is dV/dt [V/s], the following condition is satisfied: |Vt?Voff|?0.5·Cg·Rg·(dV/dt).
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: May 5, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuya Nakayama, Koichi Sugiyama
  • Patent number: RE40712
    Abstract: A high-breakdown-voltage semiconductor apparatus is provided, wherein when a gate capacitance of that portion of a gate electrode, under which a channel is formed, is Cg[F], a resistance in a channel length direction of that portion of the gate electrode, under which the channel is formed, is Rg [?], a threshold voltage, which is to be applied to the gate electrode and application of which permits flow of a drain current, is Vth [V], a voltage to be applied to the gate electrode to cut off the drain current is Voff [V], and a ratio of increase in the drain voltage per unit time at the time of cutting off the drain current is dV/dt [V/s], the following condition is satisfied: |Vth?Voff|?0.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: May 19, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuya Nakayama, Koichi Sugiyama