Patents by Inventor Koichi Takeda

Koichi Takeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096101
    Abstract: A server includes a control unit. The control unit determines whether a parked vehicle is used as a shelter based on a first image which is included in an image captured by a camera and which is obtained by imaging the vehicle and surroundings of the vehicle.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yui SUGIE, Koichi SUZUKI, Naoki UENOYAMA, Hiroki TAKEDA, Hirohiko MORIKAWA, Genshi KUNO
  • Publication number: 20230402080
    Abstract: A clamp element 46 applies a fixed potential to a bit line BL at a time of a readout operation. A reference current source RCS generates a reference current Iref. An offset current source OCS1 is activated at a time of a readout operation for an OTP cell OTPC, and at a time of being activated, generates an offset current Iof1 to be subtracted from a cell current Icel. At the time of the readout operation for the OTP cell OTPC, the sense amplifier SA detects a magnitude relationship between the reference current Iref and a readout current Ird obtained by subtracting the offset current Iof1 from the cell current Icel.
    Type: Application
    Filed: May 15, 2023
    Publication date: December 14, 2023
    Inventors: Koichi TAKEDA, Akihiko KANDA, Takahiro SHIMOI
  • Publication number: 20230402081
    Abstract: A semiconductor device capable of increasing readout margin in a nonvolatile resistive random access memory is provided. A clamping circuit applies fixed potential to each of a memory element and a reference resistive element. A pre-charge circuit pre-charges first and second nodes to power-source potential. A sense amplifier amplifies the potential difference between the potential of the first node and the potential of the second node generated after a discharge period based on cell current and reference current after pre-charging made by the pre-charge circuit. A third node is coupled to the first and second nodes through a capacitor. An electric-charge supply circuit is connected to the third node, and supplies electric charge to the third node in the discharge period.
    Type: Application
    Filed: May 8, 2023
    Publication date: December 14, 2023
    Inventor: Koichi TAKEDA
  • Publication number: 20230145662
    Abstract: Speed enhancement of data reading is achieved while suppressing an influence of an offset voltage of a differential amplifier.
    Type: Application
    Filed: October 13, 2022
    Publication date: May 11, 2023
    Inventors: Koichi TAKEDA, Takahiro SHIMOI, Masaya NAKANO, Hidenori MITANI, Yoshinobu KANEDA
  • Publication number: 20230025357
    Abstract: A semiconductor device capable of changing a data programming process in a simple manner according to a situation is provided. The semiconductor device includes a plurality of memory cells, a programming circuit for supplying a programming current to the memory cell, and a power supply circuit for supplying power to the programming circuit. The power supply circuit includes a charge pump circuit for boosting the external power supply, a voltage of the external power supply according to the selection indication, and a selectable circuit capable of switching the boosted voltage boosted by the charge pump circuit. The control circuit further includes a control circuit for executing data programming processing by the programming circuit by switching the selection indication.
    Type: Application
    Filed: June 23, 2022
    Publication date: January 26, 2023
    Inventors: Genta WATANABE, Ken MATSUBARA, Tomoya SAITO, Akihiko KANDA, Koichi TAKEDA, Takahiro SHIMOI
  • Patent number: 11465254
    Abstract: One object is to provide a polishing machine and a polishing method capable of improving a processing accuracy on the surface of an object. A method of polishing an object is provided. Such a method comprises: a first step of polishing an object by moving the object and a first polishing pad having a smaller dimension than that of the object relative to each other while the first polishing pad is made to contact the object, a second step of polishing the object, after the first step of polishing, by moving the object and a second polishing pad having a larger dimension than that of the object relative to each other while the second polishing pad is made to contact the object, and a step of detecting the state of the surface of the object before the first step of polishing.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: October 11, 2022
    Assignee: Ebara Corporation
    Inventors: Itsuki Kobata, Katsuhide Watanabe, Hozumi Yasuda, Yuji Yagi, Nobuyuki Takahashi, Koichi Takeda
  • Publication number: 20220080116
    Abstract: A drug administration device according to the present invention is a drug administration device for subcutaneously administering a drug, and includes a main body portion configured to be arranged on skin of a patient, and a movable portion to which at least one needle member protruding toward the skin is attached. The movable portion is configured to be capable of being moved between a first position that is spaced apart from the skin and a second position that is near the skin. The leading end portion of the needle member is to be inserted into the skin when the movable portion is located at the second position. The drug is to be discharged from a hole provided in the needle member.
    Type: Application
    Filed: December 25, 2019
    Publication date: March 17, 2022
    Applicants: HIROSAKI UNIVERSITY, OTSUKA PHARMACEUTICAL FACTORY, INC.
    Inventors: Tadashi KOBAYASHI, Hiroki MAITA, Hiroyuki KATO, Takashi AKIMOTO, Hidetoshi MISAWA, Takehito HAYASHI, Koichi TAKEDA, Toshimitsu TERAO, Tomoki MORITA, Shinichiro ITO
  • Patent number: 11267097
    Abstract: A non-transitory computer-readable storage medium storing a program of stretching operation of an elastic membrane which can enhance elasticity of an elastic membrane in a short time without using a dummy wafer is disclosed. The non-transitory computer-readable storage medium storing a program of stretching operation of an elastic membrane in a substrate holding apparatus, the program causes a computer to perform stretching operation of supplying a pressurized fluid to a pressure chamber formed by the elastic membrane and allowing the pressure chamber to be open to the atmosphere a predetermined number of times by a pressure regulating device in a state where the substrate holding apparatus is positioned above a polishing table during standby operation of a polishing apparatus.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: March 8, 2022
    Assignee: EBARA CORPORATION
    Inventors: Kazuya Otsu, Koichi Takeda, Kunimasa Matsushita
  • Patent number: 11120862
    Abstract: A semiconductor device capable of enlarging a read margin of a memory cell and a method of surrounding a read of a memory are provided. The reference word line RWL is activated in a time division manner with respect to the plurality of word lines WL. The precharge circuit PRE applies the read potential VRD to the bit line BL, and the precharge circuit PRE flows the read current Icel from the selected memory cell MC and the read reference current Iref from the reference cell RC to the bit line BL in a time division manner. A detection currents Ird2a, Irr2a, each of which is a current proportional to the current flowing through the bitline BL, flows through the current detection line CDL.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: September 14, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Koichi Takeda
  • Patent number: 10926374
    Abstract: The present disclosure provides a substrate processing apparatus including: a substrate holding unit that holds a substrate; a pressure regulator that regulates a pressure of a gas supplied into an elastic membrane; and a controller that controls the pressure regulator to make the pressure of the gas supplied into the elastic membrane variable in order to separate the substrate from the elastic membrane.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: February 23, 2021
    Assignee: EBARA CORPORATION
    Inventors: Hiroyuki Shinozaki, Shuichi Kamata, Koichi Takeda, Ryuichi Kosuge
  • Publication number: 20200327921
    Abstract: A semiconductor device capable of enlarging a read margin of a memory cell and a method of surrounding a read of a memory are provided. The reference word line RWL is activated in a time division manner with respect to the plurality of word lines WL. The precharge circuit PRE applies the read potential VRD to the bit line BL, and the precharge circuit PRE flows the read current Icel from the selected memory cell MC and the read reference current Iref from the reference cell RC to the bit line BL in a time division manner. A detection currents Ird2a, Irr2a, each of which is a current proportional to the current flowing through the bitline BL, flows through the current detection line CDL.
    Type: Application
    Filed: March 24, 2020
    Publication date: October 15, 2020
    Inventor: Koichi TAKEDA
  • Publication number: 20200171618
    Abstract: One object is to provide a polishing machine and a polishing method capable of improving a processing accuracy on the surface of an object. A method of polishing an object is provided. Such a method comprises a first step of polishing an object by moving the object and a first polishing pad having a smaller dimension than that of the object relative to each other while the first polishing pad is made to contact the object, a second step of polishing the object, after the first step of polishing, by moving the object and a second polishing pad having a larger dimension than that of the object relative to each other while the second polishing pad is made to contact the object, and a step of detecting the state of the surface of the object before the first step of polishing.
    Type: Application
    Filed: February 11, 2020
    Publication date: June 4, 2020
    Applicant: Ebara Corporation
    Inventors: Itsuki KOBATA, Katsuhide WATANABE, Hozumi YASUDA, Yuji YAGI, Nobuyuki TAKAHASHI, Koichi TAKEDA
  • Patent number: 10665271
    Abstract: According to an embodiment, a word line driver includes: a first inverter that is driven by a first power supply voltage and inverts and outputs a decode signal; a second inverter that is driven by a second power supply voltage and inverts and outputs the decode signal; a first PMOS transistor that is controlled to be turned on or off on the basis of an output signal of the second inverter; a first NMOS transistor that is controlled to be turned on or off on the basis of an output signal of the first inverter; and a second PMOS transistor that is provided between a power supply voltage terminal to which the second power supply voltage is supplied and the gate of the first PMOS transistor and is temporarily turned on in synchronization with falling of the decode signal.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: May 26, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Koichi Takeda, Takashi Iwase
  • Patent number: 10644679
    Abstract: A level shift circuit includes a pulse signal generation unit generating first and second pulse signals with respect to an input signal, a first level conversion unit converting the first pulse signal at a first voltage to a third pulse signal at a second voltage, a second level conversion unit converting the second pulse signal at the first voltage to a fourth pulse signal at the second voltage, and a flip flop circuit making an output signal at the second voltage rise according to the third pulse signal, and making the output signal at the second voltage fall according to the fourth pulse signal. The pulse signal generation unit compares the input signal with the output signal of the flip flop circuit, and generates the first pulse signal when the input signal rises and the second pulse signal when the input signal falls, based on a non-matching comparison result.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: May 5, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Koichi Takeda
  • Patent number: 10634162
    Abstract: An axial fan comprises an impeller. The impeller comprises a hub and a plurality of blades disposed on an outer circumference of the hub. A pressure surface of each of the blades is at least partially a convex surface bulging from a suction surface side to a pressure surface side. The convex surface is provided within a predetermined region of the pressure surface of the blade on a hub side. The predetermined region is arranged as part of a radial width of the blade.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: April 28, 2020
    Assignee: MINEBEA MITSUMI INC.
    Inventors: Tomoyoshi Sasajima, Yukihiro Higuchi, Naoya Murakami, Koichi Takeda
  • Patent number: 10615782
    Abstract: To stably operate a negative-voltage level shifter even when a voltage value of a high level of an input signal is lowered, a negative-voltage level shifter in a semiconductor device includes a first level shifter, a second level shifter, and a first medium-voltage generating circuit. The first level shifter converts a high level of an input signal from a positive first power-supply voltage to a first medium voltage. The second level shifter converts a low level of an output signal of the first level shifter from a third power-supply voltage to a negative fourth power-supply voltage that is lower than the third power-supply voltage. The first medium-voltage generating circuit generates the first medium voltage in such a manner that the first medium voltage is higher than the first power-supply voltage and is lower than a second power-supply voltage, and includes a source-follower NMOS transistor and a clamping PMOS transistor.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: April 7, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoji Kashihara, Koichi Takeda
  • Patent number: 10498270
    Abstract: A control device for a stepping motor gradually increases an absolute value of the excitation current in phase A from when the start until the end of the hold period such that the amount of change in the excitation current per unit time is smaller than or equal to a first predetermined value. From the start of the hold period until a predetermined time elapses, an absolute value of the excitation current in phase B gradually increases such that the amount of change in the excitation current per unit time is smaller than or equal to the first predetermined value. By the end of the hold period after the predetermined time has elapsed, the excitation current in phase B reaches zero. When the hold period ends, one-phase excitation operation starts and the excitation current flows in phase A first with the same polarity as at the end of the hold period.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: December 3, 2019
    Assignee: MINEBEA MITSUMI INC.
    Inventors: Koichi Takeda, Kazuo Takada, Shigeki Miyaji, Kei Yamazaki
  • Patent number: 10414016
    Abstract: According to one embodiment of the present disclosure, provided is a method of calibrating a relationship among a pressure command value, a pressure in an air-bag, and a pressure read value of the air-bag in a substrate polishing apparatus, the substrate polishing apparatus including: a polishing table; the air-bag configured to press a substrate against the polishing table, the pressure for pressing the substrate being variable; and a pressure control unit configured to control the pressure in the air-bag in accordance with the pressure command value inputted to the pressure control unit, and read the pressure in the air-bag.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: September 17, 2019
    Assignee: Ebara Corporation
    Inventor: Koichi Takeda
  • Patent number: D973199
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: December 20, 2022
    Assignee: OTSUKA PHARMACEUTICAL FACTORY, INC.
    Inventor: Koichi Takeda
  • Patent number: D975845
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: January 17, 2023
    Assignees: HIROSAKI UNIVERSITY, OTSUKA PHARMACEUTICAL FACTORY, INC.
    Inventors: Tadashi Kobayashi, Hiroki Maita, Hiroyuki Kato, Takashi Akimoto, Takehito Hayashi, Koichi Takeda, Toshimitsu Terao, Tomoki Morita, Shinichiro Ito, Tadashi Komuro, Teruyuki Iwama