Abstract: A semiconductor apparatus, comprising a decoder arranged in a path between a first power supply line and a second power supply line and configured to receive a signal and decode the signal, a switch portion arranged, in series with the decoder, in the path between the first power supply line and the second power supply line, and a control unit configured to set the switch portion in a conductive state so as to cause the decoder to decode the signal after the signal has changed from one of high level and low level to the other.

Abstract: A solid-state imaging apparatus includes: a plurality of first unit pixels configured to generate a signal by a photoelectric conversion; a first output line connected to the plurality of first unit pixels; and a first amplifier configured to amplify a signal from the first output line, wherein the first amplifier includes an operational amplifier (401), an initializing switch (404) having one terminal connected to an output terminal of the operational amplifier, and an offset adjusting unit (402) connected between the other terminal of the initializing switch and an input terminal of the operational amplifier, and the offset adjusting unit has a transistor having a source and a drain connected to each other.

Abstract: A photoelectric conversion apparatus includes, on one substrate, a pixel driving unit and a signal processing unit that includes a digital circuit configured to execute signal processing. A first voltage and a second voltage different in value from the first voltage are supplied to the digital circuit of the pixel driving unit. A third voltage and a fourth voltage different in value from the third voltage are supplied to the digital circuit of the signal processing unit. A main portion of a first conductor that supplies the first voltage to the digital circuit of the pixel driving unit and a main portion of a second conductor that supplies the third voltage to the digital circuit of the signal processing unit are isolated from each other.

Abstract: First processing of causing a hold unit to hold a first signal from an amplification unit based on reset of the amplification unit, second processing of performing AD conversion of the held first signal and outputting a second signal obtained by superposing a signal based on charges generated in a photoelectric conversion unit of a first-row pixel on the first signal, third processing of performing an operation of performing AD conversion of the held second signal and an operation of resetting the amplification unit at least partly in parallel, and fourth processing of causing the hold unit to hold a fourth signal obtained by superposing a signal based on charges generated in the photoelectric conversion unit of a second-row pixel on a third signal from the amplification unit based on resetting of the amplification unit and is output from the amplification unit are performed.

Abstract: A driving method of an imaging apparatus comprises: horizontally transferring, by a horizontal scanning circuit, a signal based on a photoelectric conversion portion of a first pixel unit held in a signal holding capacitor to a common line; before ending of the horizontal transfer; applying, by a reset switch of a second pixel unit, a selection reset voltage to a floating diffusion region of the second pixel unit; and after the horizontal transfer, transferring, by a transfer switch of the second pixel unit, a signal of a photoelectric conversion portion of the second pixel unit to the floating diffusion region of the second pixel unit and amplifying, by an amplification transistor of the second pixel unit, a signal of the floating diffusion region of the second pixel unit to output the signal to an output line.

Abstract: An imaging apparatus includes a pixel unit, an amplifying transistor, and a control unit. The pixel unit includes a first photoelectric conversion unit generating a first charge based on incident light of a first color, a second photoelectric conversion unit generating a second charge based on incident light of the first color, and a third photoelectric conversion unit generating a third charge based on incident light of a second color. The amplifying transistor is provided in common to the first to third photoelectric conversion units, and outputs a signal based on the first, second, and third charges generated by the first, second, and third photoelectric conversion units, respectively. The control unit sets the pixel unit to a selected state or a non-selected state according to an electric potential of a control terminal of the amplifying transistor.

Abstract: A photoelectric conversion device includes a counter circuit configured to count a first clock signal to output a count signal thereof, a second clock signal generation unit configured to generate a second clock signal based on the first clock signal, and a clock synchronization unit configured to output a count start signal in synchronization with the second clock signal, wherein the counter circuit performs a counting operation in response to the count start signal synchronized with the second clock signal.

Abstract: Column signal processing units are provided in correspondence with respective columns of a pixel array. The column signal processing unit includes a sample-and-hold unit configured to hold an analog signal output from a pixel, a buffer unit configured to buffer the signal held in the sample-and-hold unit, and an AD conversion unit. The AD conversion unit converts the signal held by the sample-and-hold unit and buffered by the buffer unit into a digital signal.

Abstract: A solid-state imaging apparatus includes: a plurality of pixels arranged in a matrix; a plurality of amplifier circuits each arranged correspondingly to each of columns of the pixels, for amplifying a signal from the pixel; and a current source transistor whose source is supplied with a power source voltage and which supplies the amplifier circuit with a bias current. When the current source transistor is operating in the saturation region, the gate voltage of the current source transistor that is supplied from the bias line is sampled and held. The gate voltage of the current source transistor with respect to the power source voltage is controlled to the sampled voltage, thereby suppressing variation. This suppression can, in turn, suppress occurrence of line noise and a lateral smear due to difference of drop in voltage of a power source line concerning a column circuit on each row.

Abstract: A solid-state image sensor has a plurality of pixel units, each pixel unit including a plurality of pixels, and a charge-voltage converter shared by the plurality of pixels. The sensor includes a structural portion including a plurality of wiring layers, an interlayer insulating film, and light waveguides configured by embedding, in portions of the interlayer insulating film located above the photoelectric converters, a material having a refractive index higher than that of the interlayer insulating film. A dummy pattern is formed in the structural portion to reduce a difference between a sensitivity of a first pixel and that of a second pixel, which is produced by a difference between a structure in a periphery of the light waveguide arranged above the photoelectric converter of the first pixel and that of the second pixel.

Abstract: A solid-state imaging device includes a plurality of pixels arranged in a matrix, a plurality of readout circuits provided in each column of the plurality of pixels arranged in a matrix, configured to read out for each column a signal of the plurality of pixels, a plurality of comparison units configured to compare a signal output from the plurality of readout circuits with a reference signal whose level changes with time, a counter configured to perform a count operation from when the level of the reference signal starts to change, first and second buffers each configured to buffer a count value of the counter, and a plurality of storing units connected to the plurality of comparison units, configured to store a count value of the counter when a magnitude relation between a signal output from the plurality of the readout circuits and the reference signal is inverted.

Abstract: An imaging apparatus includes a plurality of unit pixels arranged in a matrix and configured to generate a signal by photoelectric conversion, a plurality of pixel output lines connected to each column of the unit pixels, a plurality of column amplifiers configured to amplify a signal of the pixel output lines, and a driving circuit configured to generate a control signal of the column amplifiers. Each of the column amplifiers includes first and second input terminals, an output terminal, an input capacitance between the first and second input terminals, and a first switch between the second input and output terminals. The driving circuit is configured to generate the control signal so as to make a period for switching the first switch from a conductive state to a non-conductive state longer than a period for switching the first switch from the non-conductive state to the conductive state.

Abstract: A photoelectric conversion device includes a plurality of pixels arranged in a plurality of columns, a plurality of comparators provided correspondingly to the respective columns, a reference signal generation unit configured to supply a reference signal to the plurality of comparators, a counter configured to generate a count signal that includes a plurality of bits in synchronization with a first clock signal, a synchronization unit configured to synchronize the plurality of bits with a second clock signal to generate a synchronized count signal and to output the generated synchronized count signal, and a plurality of memories provided correspondingly to the respective comparators, the memories each being configured to store the synchronized count signal in response to a change in an output of a corresponding one of the comparators.

Abstract: The present invention reduces differences in the influence of electric charge leakage from a non-read out region into multiple read out regions adjacent to a non-read out region. Reset scanning of that row in the non-read out region which adjoins the first or second read out region is started before read out scanning of the first and second read out regions.

Abstract: A solid-state imaging apparatus includes: a plurality of first unit pixels configured to generate a signal by a photoelectric conversion; a first output line connected to the plurality of first unit pixels; and a first amplifier configured to amplify a signal from the first output line, wherein the first amplifier includes an operational amplifier (401), an initializing switch (404) having one terminal connected to an output terminal of the operational amplifier, and an offset adjusting unit (402) connected between the other terminal of the initializing switch and an input terminal of the operational amplifier, and the offset adjusting unit has a transistor having a source and a drain connected to each other.

Abstract: A system includes: a plurality of pixels arranged in a matrix; a reference signal generating unit for generating a ramp signal; A/D converters each arranged correspondingly to each of columns to A/D-convert a signal from the pixel; a counter that performs a count operation according to an output of the ramp signal, and supplies the count signal through the count signal line to the A/D converter; and a counter test circuit that is provided independently from the A/D converter, and tests the counter, based on a matching of the expected value of the count signal with the count signal supplied through the count signal line from the counter. This configuration allows the count signal to be checked concurrently with imaging of an object.

Abstract: An image sensing apparatus includes a pixel array including an optical black region and effective pixel region, and a scanning unit which scans the pixel array. The scanning unit includes a first shift register which scans the optical black region by a shift operation, and a second shift register which scans the effective pixel region by a shift operation. The second shift register starts the shift operation during a first period when the first shift register scans the optical black region, and scans a readout region serving as a partial region of the effective pixel region during a second period following the first period.

Abstract: A solid-state imaging apparatus includes: a plurality of pixels arranged in a matrix; a plurality of amplifier circuits each arranged correspondingly to each of columns of the pixels, for amplifying a signal from the pixel; and a current source transistor whose source is supplied with a power source voltage and which supplies the amplifier circuit with a bias current. When the current source transistor is operating in the saturation region, the gate voltage of the current source transistor that is supplied from the bias line is sampled and held. The gate voltage of the current source transistor with respect to the power source voltage is controlled to the sampled voltage, thereby suppressing variation. This suppression can, in turn, suppress occurrence of line noise and a lateral smear due to difference of drop in voltage of a power source line concerning a column circuit on each row.

Abstract: A photoelectric conversion apparatus includes, on one substrate, a pixel driving unit and a signal processing unit that includes a digital circuit configured to execute signal processing. A first voltage and a second voltage different in value from the first voltage are supplied to the digital circuit of the pixel driving unit. A third voltage and a fourth voltage different in value from the third voltage are supplied to the digital circuit of the signal processing unit. A main portion of a first conductor that supplies the first voltage to the digital circuit of the pixel driving unit and a main portion of a second conductor that supplies the third voltage to the digital circuit of the signal processing unit are isolated from each other.

Abstract: A photoelectric conversion device includes a counter circuit configured to count a first clock signal to output a count signal thereof, a second clock signal generation unit configured to generate a second clock signal based on the first clock signal, and a clock synchronization unit configured to output a count start signal in synchronization with the second clock signal, wherein the counter circuit performs a counting operation in response to the count start signal synchronized with the second clock signal.