Abstract: A multilayer ceramic capacitor includes a multilayer structure having a substantially rectangular parallelepiped shape and including dielectric layers and internal electrode layers that are alternately stacked, the dielectric layers being mainly composed of BaTiO3, the internal electrode layers being alternately exposed to two edge faces of the multilayer chip opposite to each other. A Zr/Ti ratio is 0.02 or more and 0.10 or less in a capacity section. A Ba/Ti ratio is more than 0.900 and less than 1.010 in the capacity section. A Eu/Ti ratio is 0.005 or more and 0.05 or less in the capacity section. A Mn/Ti ratio is 0.0005 or more and 0.05 or less in the capacity section. A total amount of a rare earth element or rare earth elements is less than the amount of Eu.

Abstract: A multi-layer ceramic electronic component includes a ceramic body including: a multi-layer unit including a capacitance forming unit including ceramic layers laminated in a first direction and internal electrodes disposed therebetween, a side surface facing in a second direction orthogonal to the first direction, an end surface facing in a third direction orthogonal to the above directions, a drawn portion extending from the capacitance forming unit in the third direction, the internal electrodes being drawn to the end surface, and a cover that covers the capacitance forming unit and the drawn portion in the first direction; and a side margin that covers the side surface. The drawn portion includes a first region and a second region disposed between the cover and the first region, an end portion of each internal electrode in the second region being positioned inward in the second direction relative to that in the first region.

Abstract: A multilayer ceramic capacitor includes: a multilayer structure having a parallelepiped shape in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the multilayer structure, a main component of the plurality of dielectric layers being a ceramic; and a first cover layer and a second cover layer that sandwich the multilayer structure in a stacking direction of the multilayer structure, a main component of the first cover layer and the second cover layer being the same as that of the dielectric layers, wherein the first cover layer includes a first region spaced from the multilayer structure by at least 50 ?m, is thicker than the second cover layer, and has a thickness more than 50 ?m.

Abstract: A multilayer ceramic capacitor includes: a ceramic multilayer structure having a structure in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the ceramic multilayer structure; and a pair of external electrodes that are formed on the two edge faces, wherein when an average value of insulation resistances of each pair of the internal electrode adjacent to each other in a stacking direction is IRave and a minimum value of the insulation resistances is IRmin, (IRave?IRmin)/IRave<0.50 is satisfied.

Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked. A ceramic protection section includes a cover layer and a side margin. A main component ceramic of the ceramic protection section is a ceramic material having a perovskite structure expressed as a general formula ABO3. An A site of the perovskite structure includes at least Ba. A B site of the perovskite structure includes at least Ti and Zr. A Zr/Ti ratio which is a molar ratio of Zr and Ti is 0.010 or more and 0.25 or less. An A/B ratio which is a molar ratio of the A site and the B site is 0.990 or less.

Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which dielectric layers and internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the multilayer structure; and a first cover layer and a second cover layer that sandwich the multilayer structure, a main component of the first cover layer and the second cover layer being the same as that of the dielectric layers, wherein the first cover layer is thicker than the second cover layer, wherein a concentration of Mn of at least a part of the first cover layer is higher than a concentration of Mn of the dielectric layers in an effective capacity region in which a set of internal electrode layers exposed to a first edge face of the multilayer structure face with another set of internal electrode layers exposed to a second edge face of the multilayer structure.

Abstract: A ceramic electronic device includes: a multilayer structure in which each of dielectric layers and each of internal electrode layers are alternately stacked, a main component of the dielectric layers being ceramic, wherein a relationship of IA/IB>1.40 is satisfied in a TSDC (Thermally Stimulated Depolarization Currents) of temperature elevation rate of 10 degrees C./min under a condition of 130 degrees C., 5 V/?m and a polarization of 30 min, when a peak current value on a lower temperature side in a temperature range of 130 degrees C. to 190 degrees C. is IA and a peak current value on a higher temperature side in a temperature range of 190 degrees C. to 280 degrees C. is IB.

Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which each of ceramic dielectric layers and each of internal electrode layers are alternately stacked, the plurality of internal electrode layers being alternately exposed to a first edge face and a second edge face of the multilayer structure, wherein: a region in which a set of internal electrode layers exposed to the first edge face of the multilayer structure face with another set of internal electrode layers exposed to the second edge face of the multilayer structure is a capacity region; at least a part of the circumference region around the capacity region has a protective region of which an average grain diameter of a main component ceramic is larger than that of the capacity region and of which a concentration of a donor element in the main component ceramic is larger than that of the capacity region.

Abstract: In some embodiments, a multilayer ceramic capacitor 10 has 23 unit capacitors UC1 to UC23, where these 23 unit capacitors UC1 to UC23 constitute: a first low-capacitance area LA1 constituted by three unit capacitors UC1 to UC3; a high-capacitance area HA constituted by 17 unit capacitors UC4 to UC20 whose unit capacitance is greater than that of the three unit capacitors UC1 to UC3; a second low-capacitance area LA2 constituted by three unit capacitors UC21 to UC23 whose unit capacitance is smaller than that of the 17 unit capacitors UC4 to UC20; a first variable-capacitance part which is present between the first low-capacitance area LA1 and high-capacitance area HA, and which includes the two adjacent unit capacitors UC3, UC4; and a second variable-capacitance part which is present between the high-capacitance area HA and second low-capacitance area LA2, and which includes the two adjacent unit capacitors UC20, UC21.

Abstract: A multi-layer ceramic electronic component includes a ceramic body including: a multi-layer unit including a capacitance forming unit including ceramic layers laminated in a first direction and internal electrodes disposed therebetween, a side surface facing in a second direction orthogonal to the first direction, an end surface facing in a third direction orthogonal to the above directions, a drawn portion extending from the capacitance forming unit in the third direction, the internal electrodes being drawn to the end surface, and a cover that covers the capacitance forming unit and the drawn portion in the first direction; and a side margin that covers the side surface. The drawn portion includes a first region and a second region disposed between the cover and the first region, an end portion of each internal electrode in the second region being positioned inward in the second direction relative to that in the first region.

Abstract: A multilayer ceramic capacitor includes: a pair of external electrodes; a first internal electrode containing a base metal and coupled to one of the external electrodes; a dielectric layer stacked on the first internal electrode and containing the base metal and a ceramic material mainly composed of barium titanate; and a second internal electrode stacked on the dielectric layer, containing the base metal, and coupled to another one of the external electrodes, wherein a concentration of the base metal in each of five regions, which are equally divided regions between locations 50 nm away from the first and second internal electrodes in a stacking direction between the first and second internal electrodes, is within ±20% of an average of the concentrations of the base metal in the five regions, and an atomic concentration ratio of Mg to Ti is 0 or greater and less than 0.002 in the dielectric layer.

Abstract: A multilayer ceramic capacitor includes: a pair of external electrodes; a first internal electrode containing a base metal and coupled to one of the external electrodes; a dielectric layer stacked on the first internal electrode and containing a ceramic material and the base metal; and a second internal electrode stacked on the dielectric layer, containing the base metal, and coupled to another one of the external electrodes, wherein a concentration of the base metal in each of five regions, which are equally divided regions of a region between locations 50 nm away from the first and second internal electrodes in a stacking direction between the first and second internal electrodes, is within ±20% of an average of the concentrations of the base metal in the five regions, and an average grain size in the dielectric layer is 200 nm or less.

Abstract: A multilayer ceramic capacitor includes: a pair of external electrodes; a first internal electrode containing a base metal and coupled to one of the pair external electrodes; a dielectric layer stacked on the first internal electrode and containing a ceramic material and the base metal; and a second internal electrode stacked on the dielectric layer, containing the base metal, and coupled to another one of the external electrodes, wherein a concentration of the base metal in each of five regions, which are equally divided regions of a region between locations 50 nm away from the first and second internal electrodes in a stacking direction between the first and second internal electrodes, is within ±20% of an average of the concentrations of the base metal in the five regions, and thicknesses of the first internal electrode and the second internal electrode are 0.2 ?m or greater.

Abstract: Disclosed is a linear motor that can exert a high propulsive force and reduce cogging. A stator has a plurality of core units in a stroke direction. Each of the core units has a first core having a first magnetic pole and a second magnetic pole, which is different in polarity from the first magnetic pole, coils wound around the first core, a second core having a third magnetic pole and a fourth magnetic pole, which is different in polarity from the third magnetic pole, and coils wound around the second core. The third magnetic pole faces the first magnetic pole, and the fourth magnetic pole faces the second magnetic pole. A movable element is sandwiched between the first magnetic poles and the third magnetic poles, and between the second magnetic poles and the fourth magnetic poles.

Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which dielectric layers and internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the multilayer structure; and a first cover layer and a second cover layer that sandwich the multilayer structure, a main component of the first cover layer and the second cover layer being the same as that of the dielectric layers, wherein the first cover layer is thicker than the second cover layer, wherein a concentration of Mn of at least a part of the first cover layer is higher than a concentration of Mn of the dielectric layers in an effective capacity region in which a set of internal electrode layers exposed to a first edge face of the multilayer structure face with another set of internal electrode layers exposed to a second edge face of the multilayer structure.

Abstract: A multilayer ceramic capacitor includes: a ceramic multilayer structure having a structure in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the ceramic multilayer structure; and a pair of external electrodes that are formed on the two edge faces, wherein when an average value of insulation resistances of each pair of the internal electrode adjacent to each other in a stacking direction is IRave and a minimum value of the insulation resistances is IRmin, (IRave?IRmin)/IRave<0.50 is satisfied.

Abstract: A ceramic electronic component includes a ceramic body and external electrodes. The ceramic body includes ceramic layers formed of a ceramic material and laminated in a first axis direction, and internal electrode layers each including an extracted portion and disposed between the ceramic layers, the extracted portion being extracted to a circumference of each of the ceramic layers and having a width of 100 ?m or less along the circumference. The external electrodes contain the ceramic material, the external electrodes being provided to a surface of the ceramic body and each connected to the extracted portion.

Abstract: A multilayer ceramic capacitor includes: a pair of external electrodes; a first internal electrode that is coupled to one of the pair of external electrodes; a dielectric layer that is stacked on the first internal electrode and contains BaTiO3 and Ni; and a second internal electrode that is stacked on the dielectric layer, contains Ni, and is coupled to another one of the pair of external electrodes, wherein Ni is contained in five regions, which are equally divided region of a region between locations 50 nm away from the first and second internal electrodes in a stacking direction between the first and second internal electrodes, and a Ni concentration in at least one of end regions located closest to the first internal electrode and the second internal electrode among the five regions is greater than a Ni concentration in a central region of the five regions by 10% or more.

Abstract: A multilayer ceramic capacitor includes: a pair of external electrodes; a first internal electrode containing a base metal and coupled to one of the external electrodes; a dielectric layer stacked on the first internal electrode and containing a ceramic material and the base metal; and a second internal electrode stacked on the dielectric layer, containing the base metal, and coupled to another one of the external electrodes, wherein a concentration of the base metal in each of five regions is within ±20% of an average of the concentrations of the base metal in the five regions, the five regions being obtained by dividing a region from a location 50 nm away from the first internal electrode of the dielectric layer to a location 50 nm away from the second internal electrode of the dielectric layer in a stacking direction between the first and second internal electrodes equally into five.

Abstract: A multilayer ceramic capacitor includes: a pair of external electrodes; a first internal electrode containing a base metal and coupled to one of the external electrodes; a dielectric layer stacked on the first internal electrode and containing a ceramic material and the base metal; and a second internal electrode stacked on the dielectric layer, containing the base metal, and coupled to another one of the pair external electrodes, a concentration of the base metal in each of five regions, which are equally divided regions of a region between locations 50 nm away from the first and second internal electrodes in a stacking direction between the first and second internal electrodes, being within ±20% of an average of the concentrations of the base metal in the five regions, an average grain number in the dielectric layer being three or less in the stacking direction between the first and second internal electrodes.