Abstract: In a laminated ceramic capacitor, a cylindrical ceramic part of its ceramics includes, in a manner not exposed to the surface of the ceramics, a cylinder-shaped high-void-ratio part which has a void ratio higher than the void ratio in the cylindrical ceramic part other than the high-void-ratio part and which has two layered parts facing the left and right sides of each layered conductor, respectively, as well as two layered parts facing the outer surfaces of the two outermost layered conductors, respectively. The laminated ceramic electronic component inhibits cracking of its sintered chip.

Abstract: A multilayer ceramic capacitor, whose CR product can be prevented from dropping with certainty even at a thickness of 1.0 ?m or less, includes multiple unit capacitors wherein a part constituted by two adjacent internal electrode layers in the laminating direction and one dielectric layer present between the two internal electrode layers is defined as a unit capacitor. The capacitances of the unit capacitors arranged in the laminating direction exhibit a distribution that gradually increases from both ends in the laminating direction toward the inside, while gradually decreasing from the two apexes of increase toward the center in the laminating direction.

Abstract: A multi-layer ceramic capacitor has a structure where its dielectric layers are constituted by a sintered compact that contains a mol of ReO3/2, b mol of SiO2, c mol of MOx, d mol of ZrO2, and e mol of MgO (where Re is a rare earth element, M is a metal element (except for Ba, Ti, Re, Si, Zr, Mg, and rare earth elements), and x is a valance) per 100 mol of BaTiO3, and a, b, c, d, and e mentioned above which indicate the mol numbers of respective constituents per 100 mol of BaTiO3 are 0.1?a?1.0, 0.1?b?1.5, 0.1?c?0.4, 0?d?1.0, and 0?e?0.03, respectively.

Abstract: In some embodiments, a multilayer ceramic capacitor 10 has 23 unit capacitors UC1 to UC23, where these 23 unit capacitors UC1 to UC23 constitute: a first low-capacitance area LA1 constituted by three unit capacitors UC1 to UC3; a high-capacitance area HA constituted by 17 unit capacitors UC4 to UC20 whose unit capacitance is greater than that of the three unit capacitors UC1 to UC3; a second low-capacitance area LA2 constituted by three unit capacitors UC21 to UC23 whose unit capacitance is smaller than that of the 17 unit capacitors UC4 to UC20; a first variable-capacitance part which is present between the first low-capacitance area LA1 and high-capacitance area HA, and which includes the two adjacent unit capacitors UC3, UC4; and a second variable-capacitance part which is present between the high-capacitance area HA and second low-capacitance area LA2, and which includes the two adjacent unit capacitors UC20, UC21.

Abstract: With a multilayer ceramic capacitor whose average grain size of the dielectric grains present at the outermost layer position P1 in the laminate is given by D1, average grain size of the dielectric grains present at the center position P2 in the laminate is given by D2, and average grain size of the dielectric grains present at the 25%-penetrated position P3 which is a position penetrated into the laminate by 25% is given by D3, growth of the dielectric grains occurring as a result of sintering is partially suppressed in such a way that the relationships of average grain sizes D1, D2, and D3 satisfy the conditions of 1.5×D1<D3 and 1.2×D2<D3. This way, a sufficient CR product can be obtained even with a dielectric thickness of 1 ?m or less.

Abstract: A multi-layer ceramic capacitor is constituted by ceramic dielectric layers alternately laminated with conductive layers, wherein the ceramic dielectric layers are sintered in such a way that core-shell grains having a core-shell structure are mixed with uniform solid-solution grains resulting from uniform progression of the solid solution process. Such multi-layer ceramic capacitor is characterized in that the area ratio of the core-shell grains to all sintered grains constituting the ceramic dielectric layer is 5 to 15% and that the average grain size of all sintered grains including the core-shell grains and uniform solid-solution grains is 0.3 to 0.5 ?m.

Abstract: A multi-layer ceramic capacitor has a laminate of dielectric layers and internal electrode layers laminated alternately with one another, as well as cover layers formed as the outermost layers at the top and bottom of the laminate in the laminating direction, wherein the dielectric layers are constituted by a sintered compact containing a barium titanate and a silicon compound, and a fresnoite phase having an average grain size of 1 ?m or less is present in the dielectric layers.

Abstract: A multi-layer ceramic capacitor is constituted by ceramic dielectric layers alternately laminated with conductive layers, wherein the ceramic dielectric layers are sintered in such a way that core-shell grains having a core-shell structure are mixed with uniform solid-solution grains resulting from uniform progression of the solid solution process. Such multi-layer ceramic capacitor is characterized in that the area ratio of the core-shell grains to all sintered grains constituting the ceramic dielectric layer is 5 to 15% and that the average grain size of all sintered grains including the core-shell grains and uniform solid-solution grains is 0.3 to 0.5 ?m.

Abstract: A multi-layer ceramic capacitor includes dielectric layers and internal electrode layers alternately laminated with the dielectric layers, wherein the proportion of dielectric grains constituting a dielectric layer that exists in one-layer-one-grain form is greater than 50%, and the average value of an electrode-grain aspect ratio, which represents the ratio of the maximum length, which is perpendicular to the thickness direction, to the maximum thickness of electrode grains constituting an internal electrode layer, is greater than 3.

Abstract: A multi-layer ceramic capacitor has a structure where the dispersion, nd, of average grain size of the dielectric grains constituting the dielectric layer (a value (D90/D10) obtained by dividing D90 which is a grain size including 90% cumulative abundance of grains by D10 which is a grain size including 10% cumulative abundance of grains) is smaller than 4.

Abstract: A multi-layer ceramic capacitor has a structure where its dielectric layers are constituted by a sintered compact that contains a mol of ReO3/2, b mol of SiO2, c mol of MOx, d mol of ZrO2, and e mol of MgO (where Re is a rare earth element, M is a metal element (except for Ba, Ti, Re, Si, Zr, Mg, and rare earth elements), and x is a valance) per 100 mol of BaTiO3, and a, b, c, d, and e mentioned above which indicate the mol numbers of respective constituents per 100 mol of BaTiO3 are 0.1?a?1.0, 0.1?b?1.5, 0.1?c?0.4, 0?d?1.0, and 0?e?0.03, respectively. Provide a multi-layer ceramic capacitor that allows for high-density layering and still achieves improved reliability by means of suppressing the grain growth when the dielectric grains constituting the dielectric layers are sintered and thereby ensuring sufficient grain boundary, while also setting a high dielectric constant per unit grain size.

Abstract: A multi-layer ceramic capacitor is constituted by ceramic dielectric layers alternately laminated with conductive layers, wherein the ceramic dielectric layers are sintered in such a way that core-shell grains having a core-shell structure are mixed with uniform solid-solution grains resulting from uniform progression of the solid solution process. Such multi-layer ceramic capacitor is characterized in that the area ratio of the core-shell grains to all sintered grains constituting the ceramic dielectric layer is 5 to 15% and that the average grain size of all sintered grains including the core-shell grains and uniform solid-solution grains is 0.3 to 0.5 ?m.

Abstract: With a multilayer ceramic capacitor whose average grain size of the dielectric grains present at the outermost layer position P1 in the laminate is given by D1, average grain size of the dielectric grains present at the center position P2 in the laminate is given by D2, and average grain size of the dielectric grains present at the 25%-penetrated position P3 which is a position penetrated into the laminate by 25% is given by D3, growth of the dielectric grains occurring as a result of sintering is partially suppressed in such a way that the relationships of average grain sizes D1, D2, and D3 satisfy the conditions of 1.5×D1<D3 and 1.2×D2<D3. This way, a sufficient CR product can be obtained even with a dielectric thickness of 1 ?m or less.

Abstract: A multilayer ceramic capacitor, whose CR product can be prevented from dropping with certainty even at a thickness of 1.0 ?m or less, includes multiple unit capacitors wherein a part constituted by two adjacent internal electrode layers in the laminating direction and one dielectric layer present between the two internal electrode layers is defined as a unit capacitor. The capacitances of the unit capacitors arranged in the laminating direction exhibit a distribution that gradually increases from both ends in the laminating direction toward the inside, while gradually decreasing from the two apexes of increase toward the center in the laminating direction.

Abstract: In a laminated ceramic capacitor, a cylindrical ceramic part of its ceramics includes, in a manner not exposed to the surface of the ceramics, a cylinder-shaped high-void-ratio part which has a void ratio higher than the void ratio in the cylindrical ceramic part other than the hjigh-void-ratio part and which has two layered parts facing the left and right sides of each layered conductor, respectively, as well as two layered parts facing the outer surfaces of the two outermost layered conductors, respectively. The laminated ceramic electronic component inhibits cracking of its sintered chip.

Abstract: In a dielectric ceramic composition comprising: 100 mol % of an oxide of Ba, Ti and Zr; 0.25 to 1.5 mol % of an oxide of Re, Re representing one or more elements selected from the group consisting of Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Y; 0.1 to 0.4 mol % of an oxide of Mg; and 0.03 to 0.6 mol % of oxides of one or more elements selected from the group consisting of Mn, V and Cr, the content of the oxide of the Ba, Ti and Zr is calculated by assuming that the oxide thereof is Ba(Ti1−xZrx)O3; the contents of the oxides of the Re and Mg being calculated by assuming that the oxides thereof are Re2O3 and MgO, respectively; the contents of the oxides of the Mn, V and Cr being calculated by assuming that the oxides thereof are Mn2O3, V2O5 and Cr2O3, respectively. A ratio of Ba/(Ti1−xZrx) ranges from about 1.000 to about 1.010 and x in Ti1−xZrx ranges from about 0.05 to about 0.26.

Abstract: A ceramic capacitor containing at least one dielectric layer formed from a dielectric ceramic composition comprising a sintered body containing ceramic particles having a core/shell structure in an amount of 15% or more based on the total ceramic particles of the sintered body, the core/shell structured particle being composed of a core portion, which is BaTiO3 crystal, and a shell portion surrounding the core portion, which is made of a solid solution comprising BaTiO3 as a major component, has excellent temperature characteristics and a long life-time.

Abstract: A dielectric ceramic composition includes 100 mol % of an oxide of Ba, Ti and Zr, 0.25 to 1.5 mol % of an oxide of Re, Re representing one or more elements selected from the group consisting of Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Y, 0.1 to 0.4 mol % of an oxide of Mg, 0.03 to 0.6 mol % of oxides of one or more elements selected from the group consisting of Mn, V and Cr and 0.02 to 0.3 mol % of oxides of one or two elements of Mo and W. The ceramic composition further includes a glass component having SiO2 and x in the oxide of Ba(Ti1−xZrx)O3 ranges from about 0.05 to about 0.26.

Abstract: A dielectric ceramic composition includes sintered ceramic grains having a core-shell structure, wherein 50%˜80% of the grains have a domain width of twin smaller than 20 nm; not greater than 30% of the grains have a domain width of twin in the range from 20 nm to 50 nm; not smaller than 10% of the grains have a domain width of twin greater than 50 nm or have no twin.

Abstract: A dielectric ceramic composition includes 100 mol % of an oxide of Ba, Ti and Zr, 0.25 to 1.5 mol % of an oxide of Re, Re representing one or more elements selected from the group consisting of Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Y, 0.1 to 0.4 mol % of an oxide of Mg, 0.03 to 0.6 mol % of oxides of one or more elements selected from the group consisting of Mn, V and Cr and 0.02 to 0.3 mol % of oxides of one or two elements of Mo and W. The ceramic composition further includes a glass component having SiO2 and x in the oxide of Ba(Ti1−xZrx)O3 ranges from about 0.05 to about 0.26.